FS6128-04 / FS6128-05 / FS6128-06 PLL Clock Generator IC with VCXO 1.0 Features 2.0 * Phase-locked loop (PLL) device synthesizes output clock frequency from crystal oscillator or external reference clock * On-chip tunable voltage-controlled crystal oscillator (VCXO) allows precise system frequency tuning * Typically used for generation of MPEG-2 decoder clock * 3.3V supply voltage * Very low phase noise PLL * Use with "pullable" 14pF crystals - no external padding capacitors required * Small circuit board footprint (8-pin 0.150 SOIC) * Custom frequency selections available - contact your local AMI Sales Representative for more information Description The FS6128 is a monolithic CMOS clock generator IC designed to minimize cost and component count in digital video/audio systems. At the core of the FS6128 is circuitry that implements a voltage-controlled crystal oscillator (VCXO) when an external resonator (nominally 13.5MHz) is attached. The VCXO allows device frequencies to be precisely adjusted for use in systems that have frequency matching requirements, such as digital satellite receivers. A high-resolution phase-locked loop generates an output clock (CLK) through a post-divider. The CLK frequency is ratiometrically derived from the VCXO frequency. The locking of the CLK frequency to other system reference frequencies can eliminate unpredictable artifacts in video systems and reduce electromagnetic interference (EMI) due to frequency harmonic stacking. Table 1: Crystal / Output Frequencies Figure 1: Pin Configuration 1 VDD 2 XTUNE 3 VSS 4 FS6128 XIN DEVICE fXIN (MHz) CLK (MHz) 8 XOUT FS6128-04 13.500 27.000 7 VSS FS6128-05 13.500 13.500 FS6128-06 13.500 54.000 6 n/c 5 CLK NOTE: Contact AMI for custom PLL frequencies 8-pin (0.150) SOIC Figure 2: Block Diagram XIN VCXO PLL DIVIDER CLK XOUT XTUNE FS6128-04 FS6128-05 FS6128-06 American Microsystems, Inc. reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ISO9001 2.27.02 FS6128-04 / FS6128-05 / FS6128-06 PLL Clock Generator IC with VCXO Table 2: Pin Descriptions Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input, DO = Digital Output; P = Power/Ground; # = Active Low pin PIN TYPE NAME DESCRIPTION 1 AI XIN VCXO Feedback Power Supply (+3.3V) 2 P VDD 3 AI XTUNE 4 P VSS Ground 5 DO CLK Clock Output 6 - n/c No Connection 7 DO VSS 8 AO XOUT VCXO Tune Ground VCXO Drive 3.0 Functional Block Description 3.1 Voltage-Controlled Crystal Oscillator (VCXO) EXAMPLE: A crystal with the following parameters is used: C1 = 0.025pF and C0 = 6pF. Using the minimum and maximum CL1 = 10pF, and CL2 = 20pF, the tuning range (peak-to-peak) is: f = The VCXO provides a tunable, low-jitter frequency reference for the rest of the FS6128 system components. Loading capacitance for the crystal is internal to the FS6128. No external components (other than the resonator itself) are required for operation of the VCXO. Continuous fine-tuning of the VCXO frequency is accomplished by varying the voltage on the XTUNE pin. The value of this voltage controls the effective capacitance presented to the crystal. The actual amount that this load capacitance change will alter the oscillator frequency depends on the characteristics of the crystal as well as the oscillator circuit itself. It is important that the crystal load capacitance is specified correctly to "center" the tuning range. See Table 5. A simple formula to obtain the "pulling" capability of a crystal oscillator is: f ( ppm) = 3.2 0.025 x (20 - 10) x 106 = 300 ppm . 2 x (6 + 20) x (6 + 10 ) Phase-Locked Loop (PLL) The on-chip PLL is a standard frequency- and phaselocked loop architecture. The PLL multiplies the reference oscillator frequency to the desired output frequency by a ratio of integers. The frequency multiplication is exact with a zero synthesis error (unless otherwise specified). 6 C1 x (C L 2 - C L1) x 10 2 x (C 0 + C L 2 ) x (C 0 + C L1) where: C0 = the shunt (or holder) capacitance of the crystal C1 = the motional capacitance of the crystal CL1 and CL2 = the two extremes (minimum and maximum) of the applied load capacitance presented by the FS6128. ISO9001 2 2.27.02 FS6128-04 / FS6128-05 / FS6128-06 PLL Clock Generator IC with VCXO 4.0 Electrical Specifications Table 3: Absolute Maximum Ratings Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance, functionality, and reliability. PARAMETER SYMBOL MIN. MAX. UNITS VDD VSS-0.5 7 V Input Voltage, dc VI VSS-0.5 VDD+0.5 V Output Voltage, dc VO VSS-0.5 VDD+0.5 V Input Clamp Current, dc (VI < 0 or VI > VDD) IIK -50 50 mA Output Clamp Current, dc (VI < 0 or VI > VDD) IOK -50 50 mA Storage Temperature Range (non-condensing) TS -65 150 C Ambient Temperature Range, Under Bias TA -55 125 C Junction Temperature TJ 125 C 260 C 2 kV Supply Voltage (VSS = ground) Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection (MIL-STD 883E, Method 3015.7) CAUTION: ELECTROSTATIC SENSITIVE DEVICE Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy electrostatic discharge. Table 4: Operating Conditions PARAMETER SYMBOL Supply Voltage VDD Ambient Operating Temperature Range TA Crystal Resonator Frequency ISO9001 fXTAL CONDITIONS/DESCRIPTION 3.3V 10% MIN. TYP. MAX. 3.0 3.3 3.6 V 70 C 18 MHz 0 Fundamental Mode 12 13.5 UNITS 3 2.27.02 FS6128-04 / FS6128-05 / FS6128-06 PLL Clock Generator IC with VCXO Table 5: DC Electrical Specifications Unless otherwise stated, VDD = 3.3V 10%, no load on any output, and ambient temperature range TA = 0C to 70C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are 3 from typical. Negative currents indicate current flows out of the device. PARAMETER SYMBOL CONDITIONS/DESCRIPTION MIN. TYP. MAX. UNITS Overall Supply Current, Dynamic, with Loaded Outputs IDD fXTAL = 13.5MHz; CL = 10pF, VDD = 3.6V 30 mA Supply Current, Static IDD XIN = 0V, VDD = 3.6V 3 mA Voltage Controlled Crystal Oscillator (contact factory for approved crystal sources or other application assistance) Crystal Loading Capacitance at Center Tuning Voltage Crystal Resonator Motional Capacitance CL(xtal) C1 Order crystal for this capacitance (parallel load) at desired center frequency 14 pF Specified motional capacitance of the crystal will affect pullability (see text) 25 fF XTUNE Effective Range 0 3 V Synthesized Load Capacitance Min. CL1 @V(XTUNE)=minimum value 10 pF Synthesized Load Capacitance Max. CL2 @V(XTUNE)=maximum value 20 pF VCXO Tuning Range fXTAL = 13.5MHz; CL(xtal) = 14pF; C1(xtal) = 25fF (peak-to-peak) 300 ppm VCXO Tuning Characteristic Note: positive change of XTUNE = positive change of VCXO frequency 150 ppm/V Crystal Drive Level RXTAL=20; CL = 20pF 200 uW Clock Output (CLK) High-Level Output Source Current * IOH VO = 2.0V -40 mA Low-Level Output Sink Current * IOL VO = 0.4V 17 mA zOH VO = 0.1VDD; output driving high 25 zOL VO = 0.1VDD; output driving low 25 Short Circuit Source Current * IOSH VO = 0V; shorted for 30s, max. -55 mA Short Circuit Sink Current * IOSL VO = 3.3V; shorted for 30s, max. 55 mA Output Impedance * ISO9001 4 2.27.02 FS6128-04 / FS6128-05 / FS6128-06 PLL Clock Generator IC with VCXO Table 6: AC Timing Specifications Unless otherwise stated, VDD = 3.3V 10%, no load on any output, and ambient temperature range TA = 0C to 70C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are 3 from typical. PARAMETER SYMBOL CONDITIONS/DESCRIPTION MIN. TYP. MAX. UNITS Overall VCXO Stabilization Time * PLL Stabilization Time * tVCXOSTB tPLLSTB Synthesis Error From power valid 10 From VCXO stable 100 (unless otherwise noted in Frequency Table) ms us 0 ppm 55 % Clock Output (CLK) Ratio of high pulse width (as measured from rising edge to next falling edge at VDD/2) to one clock period Duty Cycle * 45 Jitter, Period (peak-peak) * tj(P) From rising edge to next rising edge at VDD/2, CL = 10pF 200 ps Jitter, Long Term (y()) * tj(LT) From 0-500s at VDD/2, CL = 10pF compared to ideal clock source 100 ps Rise Time * tr VDD = 3.3V; VO = 0.3V to 3.0V; CL = 10pF 1.7 ns Fall Time * tf VDD = 3.3V; VO = 3.0V to 0.3V; CL = 10pF 1.7 ns ISO9001 5 2.27.02 FS6128-04 / FS6128-05 / FS6128-06 PLL Clock Generator IC with VCXO 5.0 Package Information Table 7: 8-pin SOIC (0.150") Package Dimensions 8 DIMENSIONS INCHES MIN. MAX. MILLIMETERS MIN. MAX. A 0.061 0.068 1.55 1.73 A1 0.004 0.0098 0.102 0.249 A2 0.055 0.061 1.40 1.55 B 0.013 0.019 0.33 0.49 C 0.0075 0.0098 0.191 0.249 D 0.189 0.196 4.80 4.98 E 0.150 0.157 3.81 3.99 e 0.050 BSC R E H AMERICAN MICROSYSTEMS, INC. 1 ALL RADII: 0.005" TO 0.01" h x 45 B 7 typ. e 1.27 BSC H 0.230 0.244 5.84 6.20 h 0.010 0.016 0.25 0.41 L 0.016 0.035 0.41 0.89 0 8 0 8 A2 A D C A1 BASE PLANE L SEATING PLANE Table 8: 8-pin SOIC (0.150") Package Characteristics PARAMETER SYMBOL Thermal Impedance, Junction to Free-Air 8-pin 0.150" SOIC JA Lead Inductance, Self L11 CONDITIONS/DESCRIPTION TYP. UNITS Air flow = 0 m/s 110 C/W Corner lead 2.0 Center lead 1.6 nH Lead Inductance, Mutual L12 Any lead to any adjacent lead 0.4 nH Lead Capacitance, Bulk C11 Any lead to VSS 0.27 pF ISO9001 6 2.27.02 FS6128-04 / FS6128-05 / FS6128-06 PLL Clock Generator IC with VCXO 6.0 Ordering Information Table 9: Device Ordering Codes ORDERING CODE DEVICE NUMBER PACKAGE TYPE OPERATING TEMPERATURE RANGE SHIPPING CONFIGURATION 11640-825 FS6128-04 8-pin (0.150") SOIC (Small Outline Package) 0C to 70C (Commercial) Tape and Reel 11640-835 FS6128-04 8-pin (0.150") SOIC (Small Outline Package) 0C to 70C (Commercial) Tubes 11640-102 FS6128-05 8-pin (0.150") SOIC (Small Outline Package) 0C to 70C (Commercial) Tape and Reel 11640-112 FS6128-05 8-pin (0.150") SOIC (Small Outline Package) 0C to 70C (Commercial) Tubes 11640-103 FS6128-06 8-pin (0.150") SOIC (Small Outline Package) 0C to 70C (Commercial) Tape and Reel 11640-113 FS6128-06 8-pin (0.150") SOIC (Small Outline Package) 0C to 70C (Commercial) Tubes 7.0 Revision Information DATE PAGE 1/21/00 1 DESCRIPTION Fixed typographical error 4/24/00 5 Fixed formatting error Copyright (c) 2000 American Microsystems, Inc. Devices sold by AMI are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMI makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMI makes no warranty of merchantability or fitness for any purposes. AMI reserves the right to discontinue production and change specifications and prices at any time and without notice. AMI's products are intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recommended without additional processing by AMI for such applications. American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, ID 83201, (208) 233-4690, FAX (208) 234-6796, WWW Address: http://www.amis.com E-mail: tgp@amis.com ISO9001 7 2.27.02