WS512K8-XCX
May 2011 © 2011 Microsemi Corporation. All rights reserved. 1 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 5 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
512Kx8 SRAM MODULE, SMD 5962-92078
FEATURES
Access Times 20, 25, 35, 45ns
Standard Microcircuit Drawing, 5962-92078
MIL-STD-883 Compliant Devices Available
JEDEC Standard 32 pin, Hermetic Ceramic DIP (Package 300)
Commercial, Industrial and Military Temperature Range (-55°C to +125°C)
Organized as 512K x 8
5V Power Supply
Low Power CMOS
TTL Compatible Inputs and Outputs
Battery Back-Up Operation
FIGURE 1 – PIN CONFIGURATION
BLOCK DIAGRAM
128K x 8
I/O0-7
128K x 8 128K x 8 128K x 8
A0-16
OE#
Decoder
WE#
CS#
A17
A18
PIN DESCRIPTION
A0-18 Address Inputs
I/O 0-7 Data Input/Output
CS# Chip Select
OE# Output Enable
WE# Write Enable
VCC +5.0V Power
GND Ground
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
A15
A17
WE#
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
TOP VIEW
WS512K8-XCX
May 2011 © 2011 Microsemi Corporation. All rights reserved. 2 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 5 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
FIGURE 2 – AC TEST CIRCUIT
Current Source
Current Source
IOL
IOH
D.U.T.
CEFF = 50 pf
VZ 1.5V
(Bipolar Supply)
TRUTH TABLE
CS# OE# WE# Mode Data I/O Power
H X X Standby High Z Standby
L L H Read Data Out Active
L X L Write Data In Active
L H H Out Disable High Z Active
CAPACITANCE
(TA = +25°C)
Parameter
Symbol
Condition Max Unit
Input capacitance CIN
VIN = 0V, f = 1.0MHZ
45 pF
Output capicitance COUT
VOUT = 0V, f = 1.0MHZ
45 pF
This parameter is guaranteed by design but not tested.
AC TEST CONDITIONS
Parameter Typ Unit
Input Pulse Levels VIL = 0, VIH = 3.0 V
Input Rise and Fall 5 ns
Input and Output Reference Level 1.5 V
Output Timing Reference Level 1.5 V
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Min Max Unit
Operating Temperature TA-55 +125 °C
Storage Temperature TSTG -65 +150 °C
Signal Voltage Relative to GND VG-0.5 VCC+0.5 V
Junction Temperature TJ150 °C
Supply Voltage VCC -0.5 7.0 V
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Max Unit
Supply Voltage VCC 4.5 5.5 V
Input High Voltage VIH 2.2 VCC + 0.3 V
Input Low Voltage VIL -0.5 +0.8 V
Operating Temp. (Mil.) TA-55 +125 °C
DC CHARACTERISTICS
(VCC = 5.0V, GND = 0V, -55°C ≤ TA ≤ 125°C)
Parameter Symbol Conditions -20 -25 -35 -45 Units
Min Max Min Max Min Max Min Max
Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 10 10 10 μA
Output Leakage Current ILO CS# = VIH, OE# = VIH, VOUT = GND to VCC 10 10 10 10 μA
Operating Supply Current ICC CS# = VIL, OE# = VIH, f = 5MHZ, VCC = 5.5 210 210 210 210 mA
Standby Current ISB CS# = VIH, OE# = VIH, f = 5MHZ80 60 60 55 mA
Output Low Voltage VOL IOL = 8mA, VCC = 4.5 0.4 0.4 0.4 0.4 V
Output High Voltage VOH IOH = -4.0mA, VCC = 4.5 2.4 2.4 2.4 2.4 V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
DATA RETENTION CHARACTERISTICS FOR LOW POWER “L” VERSION
(-55°C ≤ TA ≤ 125°C)
Parameter Symbol Conditions -20 -25 -35 -45 Units
Min Typ Max Min Typ Max Min Typ Max Min Typ Max
Data Retention Supply Voltage VDR CS# • VCC -0.2V 2.0 5.5 2.0 5.5 2.0 5.5 2.0 5.5 V
Data Retention Current ICCDR1V
CC = 3V 8.0 12.8 8.0 12.8 8.0 12.8 8.0 12.8 mA
WS512K8-XCX
May 2011 © 2011 Microsemi Corporation. All rights reserved. 3 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 5 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
AC CHARACTERISTICS
(VCC = 5.0V, GND = 0V, -55°C ≤ TA ≤ 125°C)
Parameter
Read Cycle Symbol
-20 -25 -35 -45
Units
Min Max Min Max Min Max Min Max
Read Cycle Time tRC 20 25 35 45 ns
Address Access Time tAA 20 25 35 45 ns
Output Hold from Address Change tOH 3333ns
Chip Select Access Time tACS 20 25 35 45 ns
Output Enable to Output Valid tOE 10 10 25 35 ns
Chip Select to Output in Low Z tCLZ13333ns
Output Enable to Output in Low Z tOLZ10000ns
Chip Disable to Output in High Z tCHZ115 17 20 30 ns
Output Disable to Output in High Z tOHZ112 15 20 25 ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(VCC = 5.0V, GND =0V, -55°C ≤ TA ≤ 125°C)
Parameter
Write Cycle Symbol
-20 -25 -35 -45
Units
Min Max Min Max Min Max Min Max
Write Cycle Time tWC 20 25 35 45 ns
Chip Select to End of Write tCW 16 20 25 30 ns
Address Valid to End of Write tAW 16 20 25 30 ns
Data Valid to End of Write tDW 15 15 20 25 ns
Write Pulse Width tWP 16 20 25 30 ns
Address Setup Time tAS 2222ns
Address Hold Time tAH 2222ns
Output Active from End of Write tOW14555ns
Write Enable to Output in High Z tWHZ110015020025ns
Data Hold Time tDH 1111ns
1. This parameter is guaranteed by design but not tested.
WS512K8-XCX
May 2011 © 2011 Microsemi Corporation. All rights reserved. 4 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 5 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
FIGURE 4 – WRITE CYCLE – WE# CONTROLLED
A
DDRESS
tWC
tAW
tCW
tAH
tAS tWP
tWHZ tDW
tOW
tDH
DATA VALID
CS#
DATA I/O
WE#
WRITE CYCLE 1
,
WE# CONTROLLED
FIGURE 5 – WRITE CYCLE – CS# CONTROLLED
A
DDRESS
DATA I/O
WRITE CYCLE 2, CS# CONTROLLED
tAW
tAS tCW
tAH
tWP
tDH
tDW
tWC
CS#
WE#
DATA VALID
FIGURE 3 – TIMING WAVEFORM – READ CYCLE
A
DDRESS
tRC
CS#
OE#
DATA I/O
tAA
tACS tCHZ
tCLZ
tOE
tOLZ
tOHZ
HIGH IMPEDANCE
DATA VALID
READ CYCLE 2 (WE# = VIH)
A
DDRESS
DATA I/O PREVIOUS DATA VALID DATA VALID
READ CYCLE 1 (CS# = OE# = VIL, WE# = VIH)
tOH
tAA
tRC
WS512K8-XCX
May 2011 © 2011 Microsemi Corporation. All rights reserved. 5 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 5 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
PACKAGE 300 – 32 PIN, CERAMIC DIP, SINGLE CAVITY SIDE BRAZED
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
2.5 (0.100)
TYP
1.27 (0.050)
± 0.1 (0.005)
0.46 (0.018)
± 0.05 (0.002)
0.84 (0.033)
± 0.4 (0.014)
3.2 (0.125) MIN
0.25 (0.010)
± 0.05 (0.002)
15.25 (0.600)
± 0.25 (0.010)
42.4 (1.670) ± 0.4 (0.016)
4.34 (0.171) ± 0.79 (0.031)
PIN 1 IDENTIFIER
15.04 (0.592)
± 0.25 (0.012)
WS512K8-XCX
May 2011 © 2011 Microsemi Corporation. All rights reserved. 6 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 5 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
ORDERING INFORMATION
DEVICE TYPE SPEED PACKAGE SMD NO.
512K x 8 SRAM 45ns 32 pin DIP 5962-92078 06HTX
512K x 8 SRAM 35ns 32 pin DIP 5962-92078 07HTX
512K x 8 SRAM 25ns 32 pin DIP 5962-92078 08HTX
512K x 8 SRAM 20ns 32 pin DIP 5962-92078 09HTX
MICROSEMI CORPORATION
SRAM
ORGANIZATION, 512K x 8
OPTIONS
Blank = Standard Power
L = Low Power
ACCESS TIME (ns)
PACKAGE:
C = Ceramic 0.600" DIP (Package 300)
DEVICE GRADE:
Q = MIL-STD-883 Compliant
M = Military Screened -55°C to +125°C
I = Industrial -40°C to +85°C
C = Commercial 0°C to +70°C
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
W S 512K 8 X - XXX C X X
WS512K8-XCX
May 2011 © 2011 Microsemi Corporation. All rights reserved. 7 Microsemi Corporation • (602) 437-1520 • www.whiteedc.com
Rev. 5 www.microsemi.com
Microsemi Corporation reserves the right to change products or specifi cations without notice.
Document Title
512Kx8 SRAM MODULE, SMD 5962-92078
Revision History
Rev # History Release Date Status
Rev 5 Changes (Pg. 1-7)
5.1 Change document layout from White Electronic Designs to Microsemi
5.2 Add document Revision History page
May 2011 Final
