TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 ULTRALOW-NOISE, HIGH PSRR, FAST RF 200-mA LOW-DROPOUT LINEAR REGULATORS IN NanoStarTM WAFER CHIP SCALE AND SOT23 FEATURES * * * * * * * * * DESCRIPTION 200-mA RF Low-Dropout Regulator With Enable Available in 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3-V, 3.3-V, 4.75-V, and Adjustable (1.22-V to 5.5-V) High PSRR (70 dB at 10 kHz) Ultralow-Noise (32 VRMS, TPS79328) Fast Start-Up Time (50 s) Stable With a 2.2-F Ceramic Capacitor Excellent Load/Line Transient Response Very Low Dropout Voltage (112 mV at Full Load, TPS79330) 5- and 6-Pin SOT23 (DBV) and NanoStar Wafer Chip Scale (YEQ) Packages The TPS793xx family of low-dropout (LDO) low-power linear voltage regulators features high power-supply rejection ratio (PSRR), ultralow-noise, fast start-up, and excellent line and load transient responses in NanoStar wafer chip scale and SOT23 packages. NanoStar packaging gives an ultrasmall footprint as well as an ultralow profile and package weight, making it ideal for portable applications such as handsets and PDAs. Each device in the family is stable, with a small 2.2-F ceramic capacitor on the output. The TPS793xx family uses an advanced, proprietary BiCMOS fabrication process to yield extremely low dropout voltages (e.g., 112 mV at 200 mA, TPS79330). Each device achieves fast start-up times (approximately 50 s with a 0.001-F bypass capacitor) while consuming very low quiescent current (170 A typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 A. The TPS79328 exhibits approximately 32 VRMS of output voltage noise at 2.8-V output with a 0.1-F bypass capacitor. Applications with analog components that are noise-sensitive, such as portable RF electronics, benefit from the high PSRR and low-noise features as well as the fast response time. APPLICATIONS * * * * * RF: VCOs, Receivers, ADCs Audio Cellular and Cordless Telephones BluetoothTM, Wireless LAN Handheld Organizers, PDAs DBV PACKAGE (TOP VIEW) GND 2 EN 3 5 OUT 4 NR Fixed Option DBV PACKAGE (TOP VIEW) OUT IN 1 6 GND 2 5 FB EN 3 4 NR Adjustable Option YEQ PACKAGE (TOP VIEW) IN C3 A3 EN C1 B2 A1 OUT TPS79328 TPS79328 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY RIPPLE REJECTION vs FREQUENCY 0.30 100 VIN = 3.8 V COUT = 2.2 F CNR = 0.1 F 0.25 90 IOUT = 200 mA 80 Ripple Rejection (dB) 1 Output Spectral Noise Density (V/Hz) IN 0.20 0.15 IOUT = 1 mA 0.10 IOUT = 200 mA 70 60 50 40 IOUT = 10 mA 30 20 0.05 VIN = 3.8 V COUT = 10 F CNR = 0.01 F 10 0 0 100 NR 1k 10 k Frequency (Hz) 100 k 10 100 1k 10 k 100 k 1M 10 M Frequency (Hz) GND Figure 1. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a trademark of Bluetooth Sig, Inc. NanoStar is a trademark of Texas Instruments. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2001-2004, Texas Instruments Incorporated TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. AVAILABLE OPTIONS (1) (2) PRODUCT VOLTAGE PACKAGE SYMBOL PART NUMBER TPS79301 1.22 V to 5.5 V SOT23 (DBV) PGVI TPS79301DBVR TPS79318 1.8 V SOT23 (DBV) PHHI TPS79318DBVR TPS79325 2.5 V TPS79328 2.8 V TPS793285 (1) (2) 2.85 V TJ CSP (YEQ) E3 TPS79318YEQ SOT23 (DBV) PGWI TPS79325DBVR CSP (YEQ) E4 TPS79325YEQ PGXI TPS79328DBVR SOT23 (DBV) CSP (YEQ) SOT23 (DBV) -40C to +125C E2 TPS79328YEQ PHII TPS793285DBVR CSP (YEQ) E5 TPS793285YEQ SOT23 (DBV) PGYI TPS79330DBVR TPS79330 3V CSP (YEQ) E6 TPS79330YEQ TPS79333 3.3 V SOT23 (DBV) PHUI TPS79333DBVR TPS793475 4.75 V SOT23 (DBV) PHJI TPS793475DBVR For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. DBVR indicates tape and reel of 3000 parts. YEQR indicates tape and reel of 3000 parts. YEQT indicates tape and reel of 250 parts. ABSOLUTE MAXIMUM RATINGS over operating temperature range (unless otherwise noted) (1) UNIT VIN range -0.3 V to 6 V VEN range -0.3 V to VIN + 0.3 V VOUT range Peak output current -0.3 V to 6 V Internally limited ESD rating, HBM 2 kV ESD rating, CDM 500 V Continuous total power dissipation See Dissipation Ratings Table Junction temperature range, DBV package -40C to 150C Junction temperature range, YEQ package -40C to 125C Storage temperature range, Tstg -65C to 150C (1) 2 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 DISSIPATION RATINGS TABLE TA 25C POWER RATING TA = 70C POWER RATING TA = 85C POWER RATING BOARD PACKAGE RJC RJA DERATING FACTOR ABOVE TA = 25C Low-K (1) DBV 65C/W 255C/W 3.9 mW/C 390 mW 215 mW 155 mW High-K (2) DBV 65C/W 180C/W 5.6 mW/C 560 mW 310 mW 225 mW Low-K (1) YEQ 27C/W 255C/W 3.9 mW/C 390 mW 215 mW 155 mW High-K (2) YEQ 27C/W 190C/W 5.3 mW/C 530 mW 296 mW 216 mW (1) (2) The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top of the board. The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. ELECTRICAL CHARACTERISTICS over recommended operating temperature range TJ = -40 to 125C, VEN = VIN, VIN = VOUT(nom) + 1 V (1), IOUT = 1 mA, COUT = 10 F, CNR = 0.01 F (unless otherwise noted). Typical values are at 25C. PARAMETER VIN Input TEST CONDITIONS MIN voltage (1) TYP MAX UNIT 2.7 5.5 V IOUT Continuous output current 0 200 mA VFB Internal reference (TPS79301) 1.201 Output voltage range (TPS79301) VFB Output voltage 2.8 V < VIN < 5.5 V 1.764 1.8 1.836 V 0 A < IOUT < 200 mA, 3.5 V < VIN < 5.5 V 2.45 2.5 2.55 V TPS79328 0 A < IOUT < 200 mA, 3.8 V < VIN < 5.5 V 2.744 2.8 2.856 V TPS793285 0 A < IOUT < 200 mA, 3.85 V < VIN < 5.5 V 2.793 2.85 2.907 V TPS79330 0 A < IOUT < 200 mA, 4 V < VIN < 5.5 V 2.94 3 3.06 V TPS79333 0 A IOUT < 200 mA, 4.3 V < VIN < 5.5 V 3.234 3.3 3.366 V TPS793475 0 A < IOUT < 200 mA, 5.25 V < VIN < 5.5 V 4.655 4.75 4.845 V 0.05 0.12 %/V 0 A < IOUT < 200 mA, TJ = 25C 5 mV TPS79328 IOUT = 200 mA 120 200 TPS793285 IOUT = 200 mA 120 200 TPS79330 IOUT = 200 mA 112 200 TPS79333 IOUT = 200 mA 102 180 TPS793475 IOUT = 200 mA 77 Output current limit VOUT = 0 V GND pin current 0 A < IOUT < 200 mA VEN = 0 V, 2.7 V < VIN < 5.5 V current (3) FB pin current 285 TPS79328 125 mA 170 220 A 0.07 1 A 1 A f = 100 Hz, TJ = 25C, IOUT = 10 mA 70 f = 100 Hz, TJ = 25C, IOUT = 200 mA 68 f = 10 kHz, TJ = 25C, IOUT = 200 mA 70 f = 100 kHz, TJ = 25C, IOUT = 200 mA BW = 200 Hz to 100 kHz, IOUT = 200 mA mV 600 VFB = 1.8 V Output noise voltage (TPS79328) (1) (2) (3) V 0 A < IOUT < 200 mA, Load regulation (VOUT%/IOUT) Power-supply ripple rejection V TPS79325 VOUT + 1 V < VIN 5.5 V Shutdown 1.250 5.5 - VDO TPS79318 Line regulation (VOUT%/VIN) (1) Dropout voltage (2) (VIN = VOUT(nom) - 0.1V) 1.225 dB 43 CNR = 0.001 F 55 CNR = 0.0047 F 36 CNR = 0.01 F 33 CNR = 0.1 F 32 VRMS Minimum VIN is 2.7 V or VOUT + VDO, whichever is greater. Dropout is not measured for the TPS79318 and TPS79325 since minimum VIN = 2.7 V. For adjustable versions, this applies only after VIN is applied; then VEN transitions high to low. 3 TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 ELECTRICAL CHARACTERISTICS (continued) over recommended operating temperature range TJ = -40 to 125C, VEN = VIN, VIN = VOUT(nom) + 1 V, IOUT = 1 mA, COUT = 10 F, CNR = 0.01 F (unless otherwise noted). Typical values are at 25C. PARAMETER TEST CONDITIONS MIN TYP CNR = 0.001 F 50 CNR = 0.0047 F 70 MAX UNIT Time, start-up (TPS79328) RL = 14 , COUT = 1 F High level enable input voltage 2.7 V < VIN < 5.5 V 1.7 VIN V Low level enable input voltage 2.7 V < VIN < 5.5 V 0 0.7 V EN pin current VEN = 0 -1 UVLO threshold VCC rising CNR = 0.01 F UVLO hysteresis 4 s 100 1 2.25 A 2.65 100 V mV TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 FUNCTIONAL BLOCK DIAGRAMS ADJUSTABLE VERSION IN OUT UVLO 2.45V 59 k Current Sense ILIM GND R1 SHUTDOWN _ + FB EN R2 UVLO Thermal Shutdown Bandgap Reference 1.22V IN External to the Device QuickStart 250 k Vref NR FIXED VERSION IN OUT UVLO 2.45V Current Sense GND SHUTDOWN ILIM R1 _ + EN UVLO R2 Thermal Shutdown R2 = 40 k QuickStart Bandgap Reference 1.22V IN 250 k Vref NR Terminal Functions TERMINAL DESCRIPTION NAME SOT23 ADJ SOT23 FIXED WCSP FIXED NR 4 4 B2 Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap. This improves power-supply rejection and reduces output noise. EN 3 3 A3 Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. EN can be connected to IN if not used. FB 5 N/A N/A This terminal is the feedback input voltage for the adjustable device. GND 2 2 A1 Regulator ground IN 1 1 C3 Unregulated input to the device. OUT 6 5 C1 Output of the regulator. 5 TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 TYPICAL CHARACTERISTICS (SOT23 PACKAGE) TPS79328 OUTPUT VOLTAGE vs OUTPUT CURRENT TPS79328 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE 2.805 250 2.805 VIN = 3.8 V COUT = 10 F TJ = 25C 2.804 2.803 VIN = 3.8 V COUT = 10 F 2.800 VOUT (V) 2.800 2.799 IGND (A) 2.795 2.801 2.790 IOUT = 200 mA 2.785 2.798 2.797 2.795 0 50 100 150 2.775 200 100 VIN = 3.8 V COUT = 10 F -40 -25 -10 5 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 IOUT (mA) 20 35 50 65 80 95 110 125 TJ (C) TJ (C) Figure 2. Figure 3. Figure 4. TPS79328 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY TPS79328 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY TPS79328 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 0.30 1.6 VIN = 3.8 V COUT = 2.2 F CNR = 0.1 F 0.25 0.20 0.15 IOUT = 1 mA 0.10 IOUT = 200 mA 0.05 0 100 1k 10 k Frequency (Hz) VIN = 3.8 V COUT = 10 F CNR = 0.1 F 0.25 0.20 IOUT = 1 mA 0.15 0.10 IOUT = 200 mA 0.05 0 100 100 k Output Spectral Noise Density (V/Hz) 0.30 Output Spectral Noise Density (V/Hz) 1k 10 k VIN = 3.8 V IOUT = 200 mA COUT = 10 F 1.4 1.2 CNR = 0.001 F 1.0 CNR = 0.0047 F 0.8 CNR = 0.01 F 0.6 CNR = 0.1 F 0.4 0.2 0 100 100 k 1k 10 k Frequency (Hz) Frequency (Hz) Figure 5. Figure 6. Figure 7. ROOT MEAN SQUARE OUTPUT NOISE vs CNR OUTPUT IMPEDANCE vs FREQUENCY TPS79328 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE 2.5 60 VOUT = 2.8 V IOUT = 200 mA COUT = 10 F 50 2.0 160 VIN = 2.7 V COUT = 10 F 140 40 120 ZO () 1.5 30 IOUT = 1 mA 1.0 20 IOUT = 100 mA IOUT = 200 mA 100 80 60 0.5 10 100 k 180 VIN = 3.8 V COUT = 10 F TJ = 25 C VDO (mV) Output Spectral Noise Density (V/Hz) IOUT = 200 mA 150 50 2.780 2.796 RMS, Output Noise (VRMS) IOUT = 1 mA 200 IOUT = 1 mA 2.802 VOUT (V) TPS79328 GROUND CURRENT vs JUNCTION TEMPERATURE 40 20 IOUT = 10 mA BW = 100 Hz to 100 kHz 0 0.001 0.01 CNR (F) Figure 8. 6 0.1 0 10 100 1k 10 k 100 k Frequency (Hz) Figure 9. 1M 10 M 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TJ (C) Figure 10. TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued) TPS79328 RIPPLE REJECTION vs FREQUENCY TPS79328 RIPPLE REJECTION vs FREQUENCY 100 90 90 IOUT = 200 mA Ripple Rejection (dB) 70 60 50 40 IOUT = 10 mA 30 20 VIN = 3.8 V COUT = 10 F CNR = 0.01 F 10 0 10 100 1k 10 k 100 k 1M 80 IOUT = 200 mA 70 60 50 IOUT = 10 mA 40 30 60 50 IOUT = 10 mA 40 30 20 10 0 10 100 1k 10 k 100 k 1M 10 M 10 1k 10 k 100 k 1M 10 M Frequency (Hz) Figure 13. TPS79328 OUTPUT VOLTAGE, ENABLE VOLTAGE vs TIME (START-UP) TPS79328 LINE TRANSIENT RESPONSE TPS79328 LOAD TRANSIENT RESPONSE 0 CNR = 0.001 F 4.8 3.8 IOUT = 200 mA COUT = 2.2 F CNR = 0.01 F CNR = 0.0047 F 1 VIN (mV) 2 0 -20 CNR = 0.01 F 0 -20 -40 dv 0.4 V s dt 0 200 0 60 80 100 120 140 160 180 200 10 20 30 40 50 60 70 80 1mA 100 0 20 40 di 0.02A s dt 300 IOUT (mA) 20 3 VIN = 3.8 V COUT = 10 F 20 VOUT (mV) VIN = 3.8 V VOUT = 2.8 V IOUT = 200 mA COUT = 2.2 F TJ = 25C VOUT (mV) Figure 12. 2 0 100 Frequency (Hz) Figure 11. 4 VEN (V) IOUT = 200 mA 70 10 Frequency (Hz) VOUT (V) 80 20 0 10 M VIN = 3.8 V COUT = 2.2 F CNR = 0.1 F 90 90 100 0 50 100 150 200 250 300 350 400 450 500 Time (s) Time (s) Time (s) Figure 14. Figure 15. Figure 16. POWER-UP / POWER-DOWN DROPOUT VOLTAGE vs OUTPUT CURRENT TPS79301 DROPOUT VOLTAGE vs INPUT VOLTAGE 200 250 VOUT = 3 V RL = 15 TJ = 125C 200 150 VDO (mV) 500 mV/div TJ = 125C VIN 150 VDO (mV) Ripple Rejection (dB) 80 100 VIN = 3.8 V COUT = 2.2 F CNR = 0.01 F Ripple Rejection (dB) 100 TPS79328 RIPPLE REJECTION vs FREQUENCY TJ = 25C 100 TJ = 25C 100 VOUT TJ = -55C 50 50 TJ = -40C IOUT = 200 mA 0 1s/div 0 0 20 40 60 80 100 120 140 160 180 200 IOUT (mA) Figure 17. Figure 18. 2.5 3.0 3.5 4.0 4.5 5.0 VIN (V) Figure 19. 7 TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued) TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT 100 COUT = 2.2 F VIN = 5.5 V, VOUT 1.5 V TJ = -40C to 125C ESR, Equivalent Series Resistance () ESR, Equivalent Series Resistance () 100 10 Region of Instability 1 0.1 Region of Stability 0.01 COUT = 10 F VIN = 5.5 V TJ = -40C to 125C 10 Region of Instability 1 0.1 Region of Stability 0.01 0 0.02 0.04 0.06 IOUT (A) Figure 20. 8 TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT 0.08 0.20 0 0.02 0.04 0.06 IOUT (A) Figure 21. 0.08 0.20 TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 APPLICATION INFORMATION The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output noise, low quiescent current (170 A typically), and enable-input to reduce supply currents to less than 1 A when the regulator is turned off. A typical application circuit is shown in Figure 22. VIN VIN IN VOUT OUT TPS793xx EN 0.1F GND NR VOUT 2.2F 0.01F Figure 22. Typical Application Circuit External Capacitor Requirements A 0.1-F or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS793xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated or the device is located several inches from the power source. Like most low dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 2.2 F. Any 2.2-F or larger ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. If load current is not expected to exceed 100 mA, a 1.0-F ceramic capacitor can be used. The internal voltage reference is a key source of noise in an LDO regulator. The TPS793xx has an NR pin which is connected to the voltage reference through a 250-k internal resistor. The 250-k internal resistor, in conjunction with an external bypass capacitor connected to the NR pin, creates a low pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the NR pin must be at a minimum, because any leakage current creates an IR drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must have minimal leakage current. The bypass capacitor should be no more than 0.1-F to ensure that it is fully charged during the quickstart time provided by the internal switch shown in the Functional Block Diagrams As an example, the TPS79328 exhibits only 32 VRMS of output voltage noise using a 0.1-F ceramic bypass capacitor and a 2.2-F ceramic output capacitor. Note that the output starts up slower as the bypass capacitance increases due to the RC time constant at the NR pin that is created by the internal 250-k resistor and external capacitor. Board Layout Recommendation to Improve PSRR and Noise Performance To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device. 9 TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 SLVS348H - JULY 2001 - REVISED OCTOBER 2004 www.ti.com APPLICATION INFORMATION (continued) Power Dissipation and Junction Temperature Specified regulator operation is assured to a junction temperature of 125C; the maximum junction temperature should be restricted to 125C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum power dissipation limit is determined using Equation 1: T max T A P D(max) J R JA (1) Where: * * * TJmax is the maximum allowable junction temperature. RJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings Table). TA is the ambient temperature. The regulator dissipation is calculated using Equation 2: P D VINV OUT I OUT (2) Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protection circuit. Programming the TPS79301 Adjustable LDO Regulator The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as shown in Figure 23. The output voltage is calculated using Equation 3: V OUT VREF 1 R1 R2 (3) Where: * VREF = 1.2246 V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately 50-A divider current. Lower value resistors can be used for improved noise performance, but the solution consumes more power. Higher resistor values should be avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and thus erroneously decreases/increases VOUT. The recommended design procedure is to choose R2 = 30.1 k to set the divider current at 50 A, C1 = 15 pF for stability, and then calculate R1 using Equation 4: V OUT R1 R2 Vref 1 (4) In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages >1.8 V, the approximate value of this capacitor can be calculated as shown in Equation 5: (3 x 107) x (R 1 R 2) C1 (R 1 x R2) (5) The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is not used (such as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, then the minimum recommended output capacitor is 4.7 F instead of 2.2 F. 10 TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 www.ti.com SLVS348H - JULY 2001 - REVISED OCTOBER 2004 APPLICATION INFORMATION (continued) OUTPUT VOLTAGE PROGRAMMING GUIDE VIN IN 1 F OUT TPS793xx EN NR 0.01 F GND VOUT R1 FB C1 1 F OUTPUT VOLTAGE 1.22 V R2 R1 R2 C1 short open 0 pF 2.5 V 31.6 k 30.1 k 22 pF 3.3 V 51 k 30.1 k 15 pF 3.6 V 59 k 30.1 k 15 pF Figure 23. TPS79301 Adjustable LDO Regulator Programming Regulator Protection The TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power-down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS793xx features internal current limiting and thermal protection. During normal operation, the TPS793xx limits output current to approximately 400 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum voltage ratings of the device. If the temperature of the device exceeds approximately 165C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 140C, regulator operation resumes. 11 TPS79301, TPS79318 TPS79325, TPS79328, TPS793285 TPS79330, TPS79333, TPS793475 SLVS348H - JULY 2001 - REVISED OCTOBER 2004 TPS793xxYEQ NanoStarTM Wafer Chip Scale Information 0,79 0,84 1,30 1,34 0.625 Max NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. NanoStar package configuration. D. This package is tin-lead (SnPb); consult the factory for availability of lead-free material. NanoStar is a trademark of Texas Instruments. Figure 24. NanoStarTM Wafer Chip Scale Package 12 www.ti.com PACKAGE OPTION ADDENDUM www.ti.com 28-Feb-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS79301DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) TPS79301DBVRG4 ACTIVE SOT-23 DBV 6 3000 TPS79318DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79318DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79318DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79318YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM TPS79318YEQT ACTIVE DSBGA YEQ 5 250 None Call TI Level-1-240C-UNLIM TPS79325DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79325DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79325YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM TPS79325YEQT ACTIVE DSBGA YEQ 5 250 None Call TI Level-1-240C-UNLIM TPS793285DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS793285DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS793285DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS793285YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM TPS793285YEQT ACTIVE DSBGA YEQ 5 250 None Call TI Level-1-240C-UNLIM TPS79328DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79328DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79328YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM TPS79328YEQT ACTIVE DSBGA YEQ 5 250 None Call TI Level-1-240C-UNLIM TPS79330DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79330DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79330YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM None None Lead/Ball Finish CU NIPDAU Call TI MSL Peak Temp (3) Level-1-260C-UNLIM Call TI TPS79330YEQT ACTIVE DSBGA YEQ 5 250 Call TI Level-1-240C-UNLIM TPS79333DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS79333DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS793475DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS793475DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 28-Feb-2005 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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