● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
TP2502
Features
Low threshold (-2.4V max.)
High input impedance
Low input capacitance (125pF max.)
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
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General Description
This low threshold enhancement-mode (normally-off) tran-
sistor utilizes a vertical DMOS structure and Supertex’s well-
proven silicon-gate manufacturing process. This combination
produces a device with the power handling capabilities of bipolar
transistors and with the high input impedance and positive
temperature coefficient inherent in MOS devices. Characteristic
of all MOS structures, this device is free from thermal runaway
and thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
P-Channel Enhancement Mode
Vertical DMOS FETs
Ordering Information
Device Package Options BVDSS/BVDGS
(V)
RDS(ON)
(Ω)
VGS(TH)
(max)
(V)
ID(ON)
(min)
(A)
TO-243AA (SOT-89) Die*
TP2502 TP2502N8-G TP2502ND -20 2.0 -2.4 -2.0
-G indicates package is RoHS compliant (‘Green’)
* MIL visual screening available.
Parameter Value
Drain-to-source voltage BVDSS
Drain-to-gate voltage BVDGS
Gate-to-source voltage ±20V
Operating and storage temperature -55°C to +150°C
Soldering temperature* 300°C
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
* Distance of 1.6 mm from case for 10 seconds.
Absolute Maximum Ratings
Product Marking
TP5LW W = Code for week sealed
= “Green” Packaging
TO-243AA (SOT-89) (N8)
GATE
SOURCE
DRAIN
DRAIN
TO-243AA (SOT-89) (N8)
Pin Configuration
Package may or may not include the following marks: Si or
2
TP2502
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Sym Parameter Min Typ Max Units Conditions
Electrical Characteristics (TA = 25°C unless otherwise specified )
BVDSS Drain-to-source breakdown voltage -20 - - V VGS = 0V, ID = -2.0mA
VGS(th) Gate threshold voltage -1.0 - -2.4 V VGS = VDS, ID= -1.0mA
∆VGS(th) Change in VGS(th) with temperature - 3.0 4.5 mV/OC VGS = VDS, ID= -1.0mA
IGSS Gate body leakage - - -100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current -
- -100 μA VGS = 0V, VDS = Max Rating
- -10 mA VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current -0.4 -0.7 - AVGS = -5.0V, VDS = -15V
-2.0 -3.3 - VGS = -10V, VDS = -15V
RDS(ON)
Static drain-to-source on-state
resistance -2.0 3.5 ΩVGS = -5.0V, ID = -250mA
1.5 2.0 VGS = -10V, ID = -1.0A
∆RDS(ON) Change in RDS(ON) with temperature - 0.75 1.2 %/OC VGS = -10V, ID = -1.0A
GFS Forward transconductance 300 650 - mmho VDS = -15V, ID = -1.0A
CISS Input capacitance - - 125
pF
VGS = 0V,
VDS = -20V,
f = 1.0 MHz
COSS Common source output capacitance - - 70
CRSS Reverse transfer capacitance - - 25
td(ON) Turn-on delay time - - 10
ns
VDD = -20V,
ID = -1.0A,
RGEN = 25Ω
trRise time - - 11
td(OFF) Turn-off delay time - - 15
tfFall time - - 12
VSD Diode forward voltage drop - -1.3 -2.0 V VGS = 0V, ISD = -1.5A
trr Reverse recovery time - 300 - ns VGS = 0V, ISD = -1.5A
Notes:
All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
All A.C. parameters sample tested.
1.
2.
Thermal Characteristics
Package
ID
(continuous)†
(mA)
ID
(pulsed)
(A)
Power Dissipation
@ TA = 25OC
(W)
θjc
(OC/W)
θja
(OC/W)
IDR
†
(mA)
IDRM
(A)
TO-243AA -630 -3.3 1.6‡15 78‡-630 -3.3
† ID (continuous) is limited by max rated Tj.
‡ Mounted on FR5 board, 25mm x 25mm x 1.57mm.
90%
10%
90% 90%
10%
10%
PULSE
GENERATOR
V
DD
RL
Output
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
0V
V
DD
RGEN
0V
-10V
Switching Waveforms and Test Circuit
3
TP2502
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Typical Performance Curves
Output Characteristics
-5
-4
-3
-2
-1
0
0 -10 -20 -30 -40
VDS (volts)
Saturation Characteristics
-5
-4
-3
-2
-1
0
0 -2 -4 -6 -10-8
Maximum Rated Safe Operating Area
-0.1 -100-10-1.0
-10
-1.0
-0.1
-0.01
Thermal Response Characteristics
)
de
zilamr
o
n
(
ec
n
atsis
eR
lamrehT
1.0
0.8
0.6
0.4
0.2
0.001 100.01 0.1 1
t
p
(seconds)
Transconductance vs. Drain Current
1.0
0.8
0.6
0.4
0.2
0
0 -2.0-0.4 -0.8 -1.2 -1.6
Power Dissipation vs. Ambient Temperature
0 15010050
2.0
1.6
1.2
0.8
0.4
0
1257525
TO-243AA(pulsed)
-4V
-3V
-5V
-6V
-7V
-8V
-9V
0
TO-243AA (DC)
TO-243AA
-4V
-3V
-5V
-6V
-7V
-8V
-9V
VGS = -10V
V
DS
= -15V
TA = -55°C
TA = 25°C
TA = 150°C
TA = 25°C
TO-243AA
T
A
= 25°C
P
D
= 1.6W
ID)
s
erepma(
ID)serepma
(
VDS (volts)
V
GS
=
-10V
GSF )snemeis(
ID (amperes) TA (°C)
PD)s
t
taw(
VDS (volts)
ID)s
ere
pma(
4
TP2502
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Typical Performance Curves (cont.)
Gate Drive Dynamic Characteristics
T
j
(°C)
On-Resistance vs. Drain Current
)
de
zi
lam
r
on(
Transfer Characteristics
Capacitance vs. Drain-to-Source Voltage
200
)
s
da
rafo
c
ip
( C
0 -10 -20 -30 -40
100
0 -2 -4 -6 -8 -10
-5
-4
-3
-2
-1
0
-50 0 50 100 150
1.1
1.0
0.9
5
4
3
2
1
0
1.4
1.2
1.0
0.8
0.6
2.0
1.6
1.2
0.8
0.4
0
-10
-8
-6
-4
-2
0
01.0 2.0 2.5
0.5 1.5
-50 0 50 100 150
V
DS
= -40V
V
DS
= -10V
V
GS
= -5V V
GS
= -10V
TA = -55°C
0 -1 -2 -3 -5-4
f = 1MHz
80 pF
(th)
V @ -1mA
R
DS (ON)
@ -10V, -1A
150
50
0
200 pF
150°C
25°C
R
)NO(SD
)smho(
V
B
SSD
)d
ez
i
l
amro
n
(
T
j
(°C) I
D
(amperes)
BV
DSS
Variation with Temperature
V
)ht(S
G
)dezilamron(
R
)NO
(
SD
)dezilamron
(
V
(th)
and R
DS
Variation with Temperature
V
GS
(volts)
I
D
)ser
epm
a
(
V
DS
= -15V
Q
G
(nanocoulombs)
V
SG
)stlov(
V
DS
(volts)
C
ISS
C
OSS
CRSS
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com.
©2009 All rights reserved. Unauthorized use or reproduction is prohibited.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
5
TP2502
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-TP2502
A022309
3-Lead TO-243AA (SOT-89) Package Outline (N8)
Symbol A b b1 C D D1 E E1 e e1 H L
Dimensions
(mm)
MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.13
1.50
BSC
3.00
BSC
3.94 0.89
NOM - - - - - - - - - -
MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
Drawings not to scale.
Supertex Doc. #: DSPD-3TO243AAN8, Version D070908.
bb1
