54ABT16500 18-Bit Universal Bus Transceivers with TRI-STATE (R) Outputs General Description These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A bus data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. Output-enable OEAB is active-high. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Features n Combines D-Type latches and D-Type flip-flops for operation in transparent, latched, or clocked mode n Flow-through architecture optimizes PCB layout n Guaranteed latch-up protection n High impedance glitch free bus loading during entire power up and power down cycle n Non-destructive hot insertion capability n Standard Microcircuit Drawing (SMD) 5962-9687001 Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA. The output enables are complementary (OEAB is active high and OEBA is active low). Ordering Code Military Package Package Description Number 54ABT16500W-QML WA56A 56-Lead Cerpack TRI-STATE (R) is a registered trademark of National Semiconductor Corporation. (c) 2004 National Semiconductor Corporation DS100225 www.national.com 54ABT16500 18-Bit Universal Bus Transceivers with TRI-STATE Outputs July 1998 54ABT16500 Connection Diagram Pin Assignment for Cerpack DS100225-1 Function Table (Note 1) OEAB LEAB Inputs CLKAB A Output B L X X X Z H H X L L H H X H H H L L L H L H H H L H X B0 (Note 2) H L L X B0 (Note 3) Note 1: A-to-B data flow is shown: B-to-A flow is similar but uses OEBA, LEBA, and CLKBA. Note 2: Output level before the indicated steady-state input conditions were established. Note 3: Output level before the indicated steady-state input conditions were established, provided that CLKAB was low before LEAB went low. www.national.com 2 54ABT16500 Logic Diagram DS100225-2 3 www.national.com 54ABT16500 Absolute Maximum Ratings (Note 4) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Ceramic VCC Pin Potential to Ground Pin Input Voltage (Note 4) Input Current (Note 4) Voltage Applied to Any Output in the Disabled or Power-off State in the HIGH State Current Applied to Output in LOW State (Max) DC Latchup Source Current Over Voltage Latchup (I/O) -65C to +150C -55C to +125C -500 mA 10V Recommended Operating Conditions -55C to +175C Free Air Ambient Temperature Military Supply Voltage Military Minimum Input Edge Rate Data Input Enable Input -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA -0.5V to 5.5V -0.5V to VCC -55C to +125C +4.5V to +5.5V (V/t) 50 mV/ns 20 mV/ns Note 4: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. twice the rated IOL (mA) Note 5: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol Parameter ABT16500 Min VIH Input HIGH Voltage VIL Input LOW Voltage VCD Input Clamp Diode Voltage VOH Output HIGH Voltage VOL Output LOW Voltage IIH Input HIGH Current Typ Units VCC Conditions Max 2.0 V Recognized HIGH Signal 0.8 V -1.2 V Min Recognized LOW Signal IIN = -18 mA IOH = -3 mA 54ABT 2.5 V Min 54ABT 2.0 V Min IOH = -24 mA 0.55 V Min IOL = 48 mA 5 A Max VIN = 2.7V (Note 6) 54ABT VIN = VCC 5 IBVI Input HIGH Current Breakdown Test 7 A Max VIN = 7.0V IIL Input LOW Current -5 A Max VIN = 0.5V (Note 6) V 0.0 IID = 1.9 A VIN = 0.0V -5 VID Input Leakage Test 4.75 IIH + Output Leakage Current 50 A 0 - 5.5V VOUT = 2.7V; OE, OE = 2.0V Output Leakage Current -50 A 0 - 5.5V VOUT = 0.5V; OE, OE = 2.0V All Other Pins Grounded IOZH IIL + IOZL IOS Output Short-Circuit Current -275 mA Max VOUT = 0V ICEX Output High Leakage Current -100 50 A Max VOUT = VCC IZZ Bus Drainage Test 100 A 0.0 VOUT = 5.5V; All Others GND ICCH Power Supply Current 1.0 mA Max All Outputs HIGH ICCL Power Supply Current 68 A Max An or Bn Outputs Low ICCZ Power Supply Current 1.0 mA Max OEn = VCC, ICCT Additional ICC/Input 2.5 mA Max VI = VCC - 2.1V ICCD Dynamic ICC mA/ Max Outputs Open All Others at VCC or GND All Others at VCC or GND No Load (Note 6) 0.23 MHz Transparent Mode One Bit Toggling, 50% Duty Cycle Note 6: Guaranteed, but not tested. DC Electrical Characteristics Symbol Parameter Min Max Units VCC Conditions CL = 50 pF; RL = 500 VOLP www.national.com Quiet Output Maximum Dynamic VOL 1.1 4 V 5.0 TA = 25C (Note 7) Symbol Parameter (Continued) Min Max Units VCC Conditions CL = 50 pF; RL = 500 VOLV Quiet Output Minimum Dynamic VOL -1.7 V 5.0 TA = 25C (Note 7) Note 7: Max number of outputs defined as (n). n - 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested. AC Electrical Characteristics Symbol Parameter 54ABT Units TA = -55C to +125C Fig. No. VCC = 4.5V-5.5V CL = 50 pF Min fmax Maximum Clock Frequency 150 tPLH Propagation Delay 1.0 Max MHz 6.5 tPHL A or B to B or A 1.0 7.0 tPLH Propagation Delay 1.0 7.0 tPHL LEAB or LEBA to B or A 1.0 7.8 tPLH Propagation Delay 1.0 7.5 tPHL CLKAB or CLKBA to B or A 1.0 8.0 tPZH Propagation Delay 1.0 6.3 tPZL OEAB or OEBA to B or A 1.0 6.5 tPHZ Propagation Delay 1.0 7.2 tPLZ OEAB or OEBA to B or A 1.0 6.8 ns Figure 4 ns Figure 4 ns Figure 4 ns Figure 6 ns Figure 6 Units Fig. No. ns Figure 7 ns Figure 7 ns Figure 7 ns Figure 7 ns Figure 7 AC Operating Requirements Symbol Parameter 54ABT TA = -55C to +125C VCC = 4.5V-5.5V CL = 50 pF Min ts(H) Setup Time, 4.5 ts(L) A to CLKAB 4.5 th(H) Hold Time, 0 th(L) A to CLKAB 0 ts(H) Setup Time, 4.0 ts(L) B to CLKBA 4.0 th(H) Hold Time, 0 th(L) B to CLKBA 0 ts(H) Setup Time, A to LEAB 1.5 ts(L) or B to LEBA, CLK High 1.5 th(H) Hold Time, A to LEAB 1.5 th(L) or B to LEBA, CLK High 1.5 ts(H) Setup Time, A to LEAB 4.5 ts(L) or B to LEBA, CLK Low 4.5 th(H) Hold Time, A to LEAB 1.5 th(L) or B to LEBA, CLK Low 1.5 tw(H) Pulse Width, 3.3 tw(L) LEAB or LEBA, High 3.3 5 Max ns Figure 7 ns Figure 7 ns Figure 7 ns Figure 5 www.national.com 54ABT16500 DC Electrical Characteristics 54ABT16500 AC Operating Requirements Symbol (Continued) Parameter 54ABT Units Fig. No. ns Figure 5 TA = -55C to +125C VCC = 4.5V-5.5V CL = 50 pF Min tw(H) Pulse Width, CLKAB 3.3 tw(L) or CLKBA, High or Low 3.3 Max Capacitance Typ Units CIN Symbol Input Capacitance Parameter 5.0 pF VCC = 0.0V CI/O (Note 8) Output Capacitance 11.0 pF VCC = 5.0V Note 8: CI/O is measured at frequency f = 1 MHz per MIL-STD-883B, Method 3012. www.national.com 6 Conditions, TA = 25C 54ABT16500 AC Loading DS100225-4 DS100225-3 FIGURE 5. Propagation Delay, Pulse Width Waveforms *Includes jig and probe capacitance. FIGURE 1. Standard AC Test Load DS100225-6 FIGURE 6. TRI-STATE Output HIGH and LOW Enable and Disable Times DS100225-5 FIGURE 2. VM = 1.5V Input Pulse Requirements Amplitude Rep. Rate tW tr tf 3.0V 1 MHz 500 ns 2.5 ns 2.5 ns FIGURE 3. Test Input Signal Requirements DS100225-8 FIGURE 7. Setup Time, Hold Time and Recovery Time Waveforms DS100225-7 FIGURE 4. Propagation Delay Waveforms for Inverting and Non-Inverting Functions 7 www.national.com 54ABT16500 18-Bit Universal Bus Transceivers with TRI-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Cerpack NS Package Number WA56A LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. BANNED SUBSTANCE COMPLIANCE National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ``Banned Substances'' as defined in CSP-9-111S2. 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