LNK6418E - Powerint - Datasheet.Live

www.power.com March 2016

Energy-Efcient, Accurate Primary-Side Regulation

CV/CC Switcher for Adapters and Chargers

LNK64x4-64x8

LinkSwitch-3 Family

This Product is Covered by Patents and/or Pending Patent Applications.

Output Power Table1,2,3,4

Product5

90-264 VAC

D (SO-8C) Package

Adapter Open Frame

LNK6404D / LNK6424D 3.5 W 4.1 W

LNK6405D / LNK6415D /

LNK6425D 4.5 W 5.1 W

LNK6406D / LNK6416D /

LNK6426D / LNK6436D /

LNK6446D

5.5 W 6.1 W

LNK6407D / LNK6417D /

LNK6427D 7. 5 W 7.5 W

Product5

E (eSIP-7C) and

K (eSOP-12B) Packages

Adapter Open Frame

LNK6407K / LNK6417K /

LNK6427K 8.5 W 9 W

LNK6408K / LNK6418K /

LNK6428K / LNK6448K 10 W 10 W

LNK6408E / LNK6418E /

LNK6428E / LNK6448E 10 W 10 W

Table 1. Output Power Table.

Notes:

1. Assumes minimum input DC voltage >90 VDC, KP ≥1 (Recommend KP ≥1.15

for accurate CC regulation), η >78%, DMAX <55%.

2. Output power capability is reduced if a lower input voltage is used.

3. Minimum continuous power with adequate heat sink measured at 50 °C

ambient with device junction below 110 °C.

4. Assumes bias winding is used to supply BYPASS pin.

5. Package: D: SO-8C, E: eSIP-7C, K: eSOP-12B.

Product Highlights

Dramatically Simplies CV/CC Converters

• Eliminates optocoupler and all secondary CV/CC control circuitry

•Eliminates all control loop compensation circuitry

Advanced Performance Features

•Compensates for transformer inductance tolerances

•Compensates for input line voltage variations

•Compensates for cable voltage drop

•Compensates for external component temperature variations

• Very accurate IC parameter tolerances using test trimming technology

•Frequency jittering greatly reduces EMI lter cost

•Programmable switching frequency up to 85 kHz to reduce trans-

former size

•Minimum operation frequency xed to improve transient load

response

Advanced Protection/Safety Features

•Auto-restart protection reduces power delivered by >90% for output

short-circuit and control loop faults (open and shorted components)

•Hysteretic thermal shutdown – automatic recovery reduces power

supply returns from the eld

•Meets high-voltage creepage requirements between DRAIN and all

other pins both on the PCB and at the package

EcoSmart™– Energy Efcient

•Easily meets all global energy efciency regulations with no added

components

• No-load consumption at 230 VAC input with bias winding <10 mW for

LNK64x4-LNK64x6 and <30 mW for LNK64x7-LNK64x8

•ON/OFF control provides constant efciency down to very light loads

– ideal for CEC regulations

•No current sense resistors – maximizes efciency

Green Package

•Halogen free and RoHS compliant package

Applications

•Chargers for cell/cordless phones, PDAs, MP3/portable audio

devices, adapters, etc.

Description

The LinkSwitch™-3 family of ICs dramatically simplies low power CV/

CC charger designs by eliminating an optocoupler and secondary

control circuitry. The device introduces a revolutionary control

technique to provide very accurate output voltage and current

regulation, compen-sating for transformer and internal parameter

tolerances along with input voltage variations.

The device incorporates a 725 V power MOSFET, a novel ON/OFF control

state machine, a high-voltage switched current source for self biasing,

frequency jittering, cycle-by-cycle current limit and hysteretic thermal

shutdown circuitry onto a monolithic IC.

Figure 1. Typical Application – Not a Simplied Circuit.

LinkSwitch-3

Wide Range

High-Voltage

DC Input

Output

PI-6907-020515

Rev. C 03/16

LNK64x4-64x8

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Pin Functional Description

DRAIN (D) Pin:

This pin is the power MOSFET drain connection. It provides

internal operating current for both start-up and steady-state

operation.

BYPASS (BP) Pin:

This pin is the connection point for an external 1 mF bypass capacitor

for the internally generated 6 V supply.

FEEDBACK (FB) Pin:

During normal operation, switching of the power MOSFET is

controlled by this pin. This pin senses the AC voltage on the

bias winding. This control input regulates both the output

voltage in CV mode and output current in CC mode based on

the yback voltage of the bias winding. The internal induc-

tance correction circuit uses the forward voltage on the bias

winding to sense the bulk capacitor voltage.

SOURCE (S) Pin:

This pin is internally connected to the output MOSFET source

for high-voltage power and control circuit common returns.

Figure 2 Functional Block Diagram.

Figure 3. Pin Conguration.

PI-6660-020515

SOURCE

(S)

LEADING

EDGE

BLANKING

DRAIN

(D)

REGULATOR

6 V

BYPASS

(BP)

FEEDBACK

(FB)

SOURCE

(S)

OUT Reset

6 V

5 V

tSAMPLE-OUT

tSAMPLE-INPUT

VILIMIT

ILIM

VILIMIT

VTH

tSAMPLE-OUT

tSAMPLE-INPUT

VILIMIT

6.5 V

Drive

ILIM

DCMAX

Current Limit

Comparator

STATE

MACHINE

CABLE DROP

COMPENSATION

SAMPLE

DELAY

THERMAL

SHUTDOWN

OSCILLATOR

FAULT

AUTO-RESTART

OPEN-LOOP

INDUCTANCE

CORRECTION

CONSTANT

CURRENT

D Q

12 S

11 S

10 S

9 S

8 S

7 S

FB 1

BP 2

NC 3

NC 4

D 6

PI-6906-020515

Exposed Pad

(On Back Side)

Internally

Connected to

SOURCE Pin

E Package

(eSIP-7C)

K Package

(eSOP-12B)

Exposed Pad (On Bottom)

Internally Connected to

SOURCE Pin

D Package (SO-8C)

FB 1

BP 2

D 4

8 S

7 S

6 S

5 S

Rev. C 03/16

LNK64x4-64x8

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LinkSwitch-3 Functional Description

The LinkSwitch-3 combines a high-voltage power MOSFET switch with

a power supply controller in one device. It uses an ON/OFF control to

regulate the output voltage. In addition, the switching frequency is

modulated to regulate the output current to provide a constant current

characteristic. The LinkSwitch-3 controller consists of an oscillator,

feedback (sense and logic) circuit, 6 V regulator, over-temperature

protection, frequency jittering, current limit circuit, leading-edge

blanking, inductance correction circuitry, frequency control for

constant current regulation and ON/OFF state machine for CV control.

Inductance Correction Circuitry

If the primary magnetizing inductance is either too high or low the

converter will automatically compensate for this by adjusting the

oscillator frequency. Since this controller is designed to operate in

discontinuous-conduction mode the output power is directly

proportional to the set primary inductance and its tolerance can be

completely compensated with adjustments to the switching

frequency.

Constant Current (CC) Operation

As the output voltage and therefore the yback voltage across the

bias winding ramps up, the FEEDBACK pin voltage increases. The

switching frequency is adjusted as the FEEDBACK pin voltage increases

to provide a constant output current regulation. The constant current

circuit and the inductance correction circuit are designed to operate

concurrently in the CC region.

Constant Voltage (CV) Operation

As the FEEDBACK pin approaches 2 V from the constant current

regulation mode, the power supply transitions into CV operation.

The switching frequency at this point is at its maximum value,

corresponding to the peak power point of the CV/CC characteristic.

The controller regulates the FEEDBACK pin voltage to remain at

FEEDBACK pin threshold (VFBTH) using an ON/OFF state-machine.

The FEEDBACK pin voltage is sampled 2.5 ms after the turn-off of the

high-voltage switch.

At light loads the current limit is also reduced to decrease the

transformer ux density and the FEEDBACK pin sampling is done

earlier.

Output Cable Compensation

This compensation provides a constant output voltage at the end of

the cable over the entire load range in CV mode. As the converter

load increases from no-load to the peak power point (transition point

between CV and CC) the voltage drop introduced across the output

cable is compensated by increasing the FEEDBACK pin reference

voltage. The controller determines the output load and therefore the

correct degree of compensation based on the output of the state

machine. The amount of cable drop compensation is determined by

the third digit in the device part number.

Auto-Restart and Open-Loop Protection

In the event of a fault condition such as an output short or an

open-loop condition the LinkSwitch-3 enters into an appropriate

protection mode as described below.

In the event the FEEDBACK pin voltage during the yback period falls

below 0.7 V before the FEEDBACK pin sampling delay (~2.5 ms) for a

duration in excess of ~300 ms (auto-restart on-time (tAR-ON) the

converter enters into auto-restart, wherein the power MOSFET is

disabled for 1500 ms. The auto-restart alternately enables and

disables the switching of the power MOSFET until the fault condition

is removed.

In addition to the conditions for auto-restart described above,

if the sensed FEEDBACK pin current during the forward period of the

conduction cycle (switch “on” time) falls below 120 mA, the converter

annunciates this as an open-loop condition (top resistor in potential

divider is open or missing) and reduces the auto-restart time from

300 ms to approximately 6 clock cycles (90 ms), whilst keeping the

disable period of 2 seconds.

Over-Temperature Protection

The thermal shutdown circuitry senses the die temperature. The

threshold is set at 142 °C typical with a 60 °C hysteresis. When the

die temperature rises above this threshold (142 °C) the power

MOSFET is disabled and remains disabled until the die temperature

falls by 60 °C, at which point the MOSFET is re-enabled.

Current Limit

The current limit circuit senses the current in the power MOSFET.

When this current exceeds the internal threshold (ILIMIT), the power

MOSFET is turned off for the remainder of that cycle. The leading

edge blanking circuit inhibits the current limit comparator for a short

time (tLEB) after the power MOSFET is turned on. This leading edge

blanking time has been set so that current spikes caused by

capacitance and rectier reverse recovery time will not cause

premature termination of the MOSFET conduction. The LinkSwitch-3

also contains a “di/dt” correction feature to minimize CC variation across

the input line range.

6 V Regulator

The 6 V regulator charges the bypass capacitor connected to the

BYPASS pin to 6 V by drawing a current from the voltage on the

DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal

supply voltage node. When the MOSFET is on, the device runs off of

the energy stored in the bypass capacitor. Extremely low power

consumption of the internal circuitry allows the LinkSwitch-3 to

operate continuously from the current drawn from the DRAIN pin

however for the best no-load input power, the BYPASS pin should be

supplied current of IS1 from the bias winding at no-load conditions.

A bypass capacitor value of 1 mF is sufcient for both high frequency

decoupling and energy storage.

Rev. C 03/16

LNK64x4-64x8

www.power.com

Applications Example

Circuit Description

This circuit shown in Figure 4 is congured as a primary-side

regulated yback power supply utilizing the LNK6448K. With an

average efciency of 78% and <30 mW no-load input power this

design easily exceeds the most stringent current energy efciency

requirements.

Input Filter

AC input power is rectied by bridge BR1. The rectied DC is ltered

by the bulk storage capacitors C1 and C2. Inductors L2 and L3,

together with C1 and C2 form a pi (π) lter, which attenuates

conducted differential-mode EMI noise. This conguration along with

Power Integrations transformer E-Shield™ technology allows this

design to meet EMI standard EN55022 class B with good margin

without requiring a Y capacitor, even with the output connected to

safety earth ground. A ferrite bead for L3 is sufcient especially

when the output of the supply is oating. Fuse F1 provides protection

against catastrophic failure. NTC (Negative Thermal Coefcient)

thermistor RT1 is used to limit the rush current to below the peak

specication of BR1 during start-up especially at high-line input

voltage. High-line results in the highest current into C1 and C2. F1

and RT1 can be replaced by a single fusible resistor. If the reduction

in efciency is acceptable, a bridge with a higher IFSM rating may also

allow removal of RT1. If a fusible resistor is selected, use a

ameproof type. It should be suitably rated (typically a wire wound

type) to withstand the instantaneous dissipation while the input

capacitors charge when rst connected to the AC line.

LNK6448K Primary

The LNK6448K device (U1) incorporates the power switching device,

oscillator, CC/CV control engine, start-up, and protection functions.

The integrated 725 V MOSFET provides a large drain voltage margin

in universal input AC applications, increasing reliability and also

Figure 4. Energy Efcient USB Charger Power Supply (78% Average Efciency, <30 mW No-load Input Power).

reducing the output diode voltage stress by allowing a greater

transformer turns ratio. The device is completely self-powered from

the BYPASS pin and decoupling capacitor C7. For the LNK64xx

devices, there are 4 options for different amount of cable drop

compensation determined by the third digit in the device part

number. Table 2 shows the amount of compensation for each device.

The LNK644x devices do not provide cable drop compensation.

The optional bias supply formed by D3 and C8 provides the operating

current for U1 via resistor R8. This reduces the no-load consumption

from ~200 mW to <30 mW and also increases light load efciency.

The rectied and ltered input voltage is applied to one side of the

primary winding of T1. The other side of the transformer’s primary

winding is driven by the integrated MOSFET in U1. The leakage

inductance drain voltage spike is limited by an RCD-R clamp

consisting of D2, R3, R11, and C6.

Output Rectication

The secondary of the transformer is rectied by D1, a 10 A, 45 V

Schottky barrier type for higher efciency, and ltered by C3, L1 and

C4. If lower efciency is acceptable then this can be replaced with a

5 A PN junction diode for lower cost. In this application C3 and C4

are sized to meet the required output voltage ripple specication with

a ferrite bead L1, which eliminates the high switching noise on the

output. A pre-load resistor R2 is used to meet the regulation

specication. If the battery self-discharge is required, the pre-load

resistor can be replaced with a series resistor and Zener network.

Output Regulation

The LNK64xx family of devices regulates the output using ON/OFF

control in the constant voltage (CV) regulation region of the output

characteristic and frequency control for constant current (CC)

regulation. The feedback resistors (R6 and R7) were selected using

standard 1% resistor values to center both the nominal output

voltage and constant current regulation thresholds.

PI-7209-020515

R11

200 kΩ

2.55 kΩ

150 Ω

44.2 kΩ

2.4 Ω

RS1ML

2.37 kΩ

10 Ω

R10

4.7 kΩ

10 kΩ

S1ML

SBR1045SP5-13

EPC17

5 FL1

FL2

680 µF

10 V

1 nF

50 V

680 µF

10 V

10 µF

400 V

15 µF

400 V

1 µF

50 V

10 µF

25 V

1 mH

Ferrite Bead

(3.5 × 7.6 mm)

Ferrite Bead

(3.5 × 7.6 mm)

470 pF

250 V

LNK6448K

LinkSwitch-3

BR1

B10S-G

1000 V

RT1

10 Ω

1 A tO

90 - 265

VAC

TP1

TP2

5 V, 2 A

J1-1

RTN

J1-4

6.0

3.0

4.0

5.0

1.0

2.0

0.0

0 0.5 1 1.5 2 2.5 3

Output Current (A)

Output Voltage (V)

PI-7309-020515

115 VAC

230 VAC

Rev. C 03/16

LNK64x4-64x8

www.power.com

LinkSwitch-3 Output Cable Voltage

Drop Compensation

Device Output Voltage Change Factor (±1%)

LNK640x 1.02

LNK641x 1.04

LNK642x 1.06

LNK643x 1.08

LNK644x 1.01

Table 2. Cable Compensation Change Factor vs. Device.

Key Application Considerations

Output Power Table

The data sheet maximum output power table (Table 1) repre- sents

the maximum practical continuous output power level that can be

obtained under the following assumed conditions:

1. Assumes minimum input DC voltage >90 VDC, KP ≥1 (Recom-

mend KP ≥1.15 for accurate CC regulation), η >78% , D MAX <55%.

2. Output power capability is reduced if a lower input voltage

is used.

3. Minimum continuous power with adequate heat sink measured at

50 °C ambient with device junction below

110 °C.

4. Assumes bias winding is used to supply BYPASS pin.

Output Tolerance

LinkSwitch-3 provides an overall output tolerance (including

line, component variation and temperature) of ±5% for the output

voltage in CV operation and ±10% for the output current during CC

operation over a junction temperature range of 0 °C to 110 °C.

BYPASS Pin Capacitor Selection

A 1 mF BYPASS pin capacitor is recommended. The capacitor

voltage rating should be greater than 7 V. The capacitor’s dielectric

material is not important but tolerance of capacitor should be ≤

±50%. The capacitor must be physically located adjacent to the

LinkSwitch-3 BYPASS pin.

Cable Drop Compensation

The amount of output cable compensation is determined by the third

digit in the device part number. Table 2 shows the amount of

compensation for each LinkSwitch-3 device.

The output voltage that is entered into PIXls design spreadsheet is

the voltage at the end of the output cable when the power supply is

delivering maximum power. The output voltage at the terminals of

the supply is the value measured at the end of the cable multiplied by

the output voltage change factor.

LinkSwitch-3 Layout Considerations

Circuit Board Layout

LinkSwitch-3 is a highly integrated power supply solution that

integrates on a single die, both, the controller and the high- voltage

MOSFET. The presence of high switching currents and voltages

together with analog signals makes it especially important to follow

good PCB design practice to ensure stable and trouble free operation

of the power supply. See Figure 5 for a recommended circuit board

layout for LinkSwitch-3.

When designing a printed circuit board for the LinkSwitch-3 based

power supply, it is important to follow the following guidelines:

Single Point Grounding

Use a single point (Kelvin) connection at the negative terminal of the

input lter capacitor for the LinkSwitch-3 SOURCE pin and bias

winding return. This improves surge capabilities by returning surge

currents from the bias winding directly to the input lter capacitor.

Bypass Capacitor

The BYPASS pin capacitor should be located as close as possible to

the SOURCE and BYPASS pins.

Feedback Resistors

Place the feedback resistors directly at the FEEDBACK pin of the

LinkSwitch-3 device. This minimizes noise coupling.

Thermal Considerations

The copper area connected to the SOURCE pins provides the

LinkSwitch-3 heat sink. A good estimate is that the LinkSwitch-3 will

dissipate 10% of the output power. Provide enough copper area to

keep the SOURCE pin temperature below 110 °C is recommended to

provide margin for part to part RDS(ON) variation.

Secondary Loop Area

To minimize leakage inductance and EMI the area of the loop connecting

the secondary winding, the output diode and the output lter capacitor

should be minimized. In addition, sufcient copper area should be

provided at the anode and cathode terminal of the diode for heat

sinking. A larger area is preferred at the quiet cathode terminal.

A large anode area can increase high frequency radiated EMI.

Electrostatic Discharge Spark Gap

A spark gap is created between the output and the AC input. The

spark gap directs ESD energy from the secondary back to the AC

input. The trace from the AC input to the spark gap electrode should

be spaced away from other traces to prevent unwanted arcing

occurring and possible circuit damage.

Drain Clamp Optimization

LinkSwitch-3 senses the feedback winding on the primary-side to

regulate the output. The voltage that appears on the feedback

winding is a reection of the secondary winding voltage while the

internal MOSFET is off. Therefore any leakage inductance induced

ringing can affect output regulation. Optimizing the drain clamp to

Rev. C 03/16

LNK64x4-64x8

www.power.com

Figure 5. PCB (Bottom Layer on Left) (Top Layer on Right) Layout Example Showing 10 W Design using K Package.

minimize the high frequency ringing will give the best regulation.

Figure 6 shows the desired drain voltage waveform compared to

Figure 7 with a large undershoot due to the leakage inductance

induced ring. This will reduce the output voltage regulation

performance. To reduce this adjust the value of the resistor in series

with the clamp diode.

Addition of a Bias Circuit for Higher Light Load

Efciency and Lower No-load Input Power

Consumption

The addition of a bias circuit can decrease the no-load input power

from ~200 mW down to less than 30 mW at 230 VAC input. Light

load efciency also increases which may avoid the need to use a

Schottky barrier vs. PN junction output diode while still meeting

average efciency requirements.

The power supply schematic shown in Figure 4 has only one winding

for both feedback and bias circuit. Diode D3, C8, R5 and R8 form the

bias circuit. The feedback winding voltage is designed at 11 V, this

provides a high enough voltage to supply the BYPASS pin even during

low switching frequency operation at no-load.

A 10 mF capacitance value is recommended for C8 to hold up the bias

voltage at the low switching frequencies that occur at light to

no-load. The capacitor type is not critical but the voltage rating

should be above the maximum value of VBIAS. The recommended

current into the BYPASS pin is equal to IC supply current (0.6 mA to

0.7 mA) at the minimum bias winding voltage. The BYPASS pin

current should not exceed 10 mA at the maximum bias winding

voltage. The value of R8 is calculated according to (VBIAS – VBP)/IS2,

where VBIAS (10 V typ.) is the voltage across C8, IS2 (0.6 mA to

0.7 mA typ.) is the IC supply current and VBP (6.2 V typ.) is the

BYPASS pin voltage. The parameters IS2 and VBP are provided in the

parameter table of the LinkSwitch-3 data sheet. Diode D3 can be any

low cost diode such as FR102, 1N4148 or BAV19/20/21.

Quick Design Checklist

As with any power supply design, all LinkSwitch-3 designs should be

veried on the bench to make sure that component specications are

not exceeded under worst-case conditions.

The following minimum set of tests is strongly recommended:

1. Maximum drain voltage – Verify that peak VDS does not exceed

680 V at the highest input voltage and maximum output power.

2. Maximum drain current – At maximum ambient temperature,

maximum input voltage and maximum output load, verify drain

current waveforms at start-up for any signs of transformer

saturation and excessive leading edge current spikes.

LinkSwitch-3 has a leading edge blanking time of 170 ns to

prevent premature termination of the ON-cycle.

3. Thermal check – At maximum output power, both minimum and

maximum input voltage and maximum ambient temperature;

verify that temperature specications are not exceeded for

LinkSwitch-3, transformer, output diodes and output capacitors.

Enough thermal margin should be allowed for part-to-part variation

of the RDS(ON) of LinkSwitch-3, as specied in the data sheet.

Design Tools

Up-to-date information on design tools can be found at the Power

Integrations web site: www.power.com

Rev. C 03/16

LNK64x4-64x8

www.power.com

PI-5093-020515

An overshoot

is acceptable

PI-5094-020515

Negative ring may

increase output

ripple and/or

degrade output

regulation

Figure 6. Desired Drain Voltage Waveform with Minimal Leakage

Ringing Undershoot.

Figure 7. Undesirable Drain Voltage Waveform with Large Leakage

Ring Undershoot.

Rev. C 03/16

LNK64x4-64x8

www.power.com

Parameter Symbol

Conditions

SOURCE = 0 V; TJ = 0 to 100 °C

(Unless Otherwise Specied)

Min Typ Max Units

Control Functions

Programmable

Maximum Frequency fOSC

TJ = 25 °C

tON × IFB = 1.4 mA-ms

See Notes A, F

VFB = VFBth 85 kHz

Minimum Operation

Frequency fOSC(MIN)

TJ = 25 °C

VFB = VFBth

LNK64x4-64x6 350

HzLNK64x7 760

LNK64x8 560

Frequency Ratio

(Constant Current) fRAT IO(CC)

TJ = 25 °C

Between VFB = 1.3 V and VFB = 1.9 V 1.42 1.47 1.53

Frequency Ratio

(Inductance

Correction)

fRATIO(IC)

Between tON × IFB = 1.4 mA and

tON × IFB = 2 mA-ms 1.16 1.21 1.26

Frequency Jitter Peak-to-Peak Jitter Compared to Average

Frequency, TJ = 25 °C ±7 %

Maximum Duty Cycle DCMAX See Notes D, E 55 %

FEEDBACK Pin Voltage VFBth

TJ = 25 °C

CBP = 1 mF

LNK6404/6405/

6406/6446 1.915 1.940 1.965

LNK6415/6416 1.955 1.980 2.005

Thermal Resistance

Thermal Resistance: D Package:

(qJA) .......................... ... 100 °C/W(2), 80 °C/W(3)

(qJC)(1) ............................................... 30 °C/W

E Package

(qJA) ..................................... 105 °C/W(4)

(qJC) .........................................2 °C/W(5)

K Package

(qJA) ..................... 45 °C/W(6), 38 °C/W(7)

(qJC) .........................................2 °C/W(5)

Notes:

1. Measured on pin 8 (SOURCE) close to plastic interface.

2. Soldered to 0.36 sq. in. (232 mm2), 2 oz. (610 g/m2) copper clad.

3. Soldered to 1 sq. in. (645 mm2), 2 oz. (610 g/m2) copper clad.

4. Free standing with no heat sink.

5. Measured at the back surface of tab.

6. Soldered (including exposed pad for K package) to typical

application PCB with a heat sinking area of 0.36 sq. in.

(232 mm2), 2 oz. (610 g/m2) copper clad.

7. Soldered (including exposed pad for K package) to typical

application PCB with a heat sinking area of 1 sq. in. (645 mm2),

2 oz. (610 g/m2) copper clad.

Absolute Maximum Ratings(1,5)

DRAIN Voltage ........................................................-0.3 V to 725 V

DRAIN Pin Peak Current: LNK64x4 ............................ 400 (600) mA(4)

LNK64x5 .............................504 (750) mA(4)

LNK64x6 ............................654 (980) mA(4)

LNK64x7 ........................... 670 (1003) mA(4)

LNK64x8 ........................... 718 (1076) mA(4)

Peak Negative Pulsed Drain Current .................................. -100 mA(2)

FEEDBACK Pin Voltage .................................................-0.3 to 9 V(6)

FEEDBACK Pin Current .........................................................100 mA

BYPASS Pin Voltage ........................................................ -0.3 to 9 V

BYPASS Pin Current ...............................................................10 mA

Storage Temperature ................................................. -65 to 150 °C

Operating Junction Temperature(7) ............................... -40 to 150 °C

Lead Temperature ..............................................................260 °C(3)

Notes:

1. All voltages referenced to SOURCE, TA = 25 °C.

2. Duration not to exceed 2 ms.

3. 1/16 in. from case for 5 seconds.

4. The higher peak DRAIN current is allowed while the DRAIN voltage

is simultaneously less than 400 V.

5. Maximum ratings specied may be applied, one at a time without

causing permanent damage to the product. Exposure to Absolute

Maximum ratings for extended periods of time may affect product

reliability.

6. -1 V for current pulse ≤5 mA out of the pin and a duration

of ≤500 ns.

7. Normally limited by internal circuitry.

Rev. C 03/16

LNK64x4-64x8

www.power.com

Parameter Symbol

Conditions

SOURCE = 0 V; TJ = 0 to 100 °C

(Unless Otherwise Specied)

Min Typ Max Units

Control Functions (cont.)

FEEDBACK Pin Voltage VFBth

TJ = 25 °C

CBP = 1 mF

LNK6424/6425/

6426 1.995 2.020 2.045

6436 2.035 2.060 2.085

L N K 6 4 0 7,

LNK6408, LNK6448 1.915 1.940 1.965

LNK6417, LNK6418 1.955 1.980 2.005

LNK6427, LNK6428 1.995 2.020 2.045

FEEDBACK Pin Voltage

at Turn-Off Threshold VFB(AR) 1.14 1.22 1.30 V

Minimum Switch

ON-Time tON(MIN) See Note E 700 ns

FEEDBACK Pin

Sampling Delay tFB See Note G 2.55 2.75 2.95 ms

DRAIN Supply

Current

IS1

FB Voltage > VFBth

(MOSFET Not Switching 300 380 mA

IS2

Feedback Voltage =

VFBth -0.1 V,

Switch ON-Time =

tON (MOSFET

Switching at fOSC)

LNK64x4 480 540

LNK64x5 500 560

LNK64x6 550 620

LNK64x7 600 680

LNK64x8 700 780

BYPASS Pin

Charge Current

ICH1 VBP = 0 V

LNK64x4 -5.2 -4.4 -2.7

LNK64x5 -6.8 -5.8 -3.3

LNK64x6 -7. 5 -6.1 -3.5

LNK64x7 -7. 5 -6.1 -3.5

LNK64x8 -7.5 -6.1 -3.5

ICH2 VBP = 4 V

LNK64x4 -5 -2.8 -1.5

LNK64x5 -6.4 -4.0 -1.8

LNK64x6 -7 -4.2 -2

LNK64x7 -7 -4.2 -2.0

LNK64x8 -7 -4.2 -2.0

BYPASS Pin

Voltage VBP 5.65 5.90 6.25 V

BYPASS Pin

Voltage Hysteresis VBPH 0.70 0.95 1.20 V

BYPASS Pin

Shunt Voltage VSHUNT 6.2 6.4 6.8 V

Rev. C 03/16

LNK64x4-64x8

www.power.com

Parameter Symbol

Conditions

SOURCE = 0 V; TJ = 0 to 100 °C

(Unless Otherwise Specied)

Min Typ Max Units

Circuit Protection

Current Limit ILIMIT

di/dt = 60 mA/ms

VBP = 5.9 V

TJ = 25 °C

LNK64x4 232 250 268

di/dt = 75 mA/ms

VBP = 5.9 V

TJ = 25 °C

LNK64x5 290 315 340

di/dt = 95 mA/ms

VBP = 5.9 V

TJ = 25 °C

LNK64x6 359 390 421

di/dt = 105 mA/ms

VBP = 5.9 V

TJ = 25 °C

LNK64x7 390 420 449

di/dt = 120 mA/ms

VBP = 5.9 V

TJ = 25 °C

LNK64x8 446 480 513

Minimum Current

Limit Scale Factor ILIMIT(MIN) 0.27 0.32 0.38

Normalized Output

Current IOTJ = 25 °C0.975 1.000 1.025

Leading Edge

Blanking Time tLED

TJ = 25 °C

Set Note D 125 170 ns

Thermal Shutdown

Temperature tSD 135 142 150 °C

Thermal Shutdown

Hysteresis tSDH 60 °C

Output

ON-State

Resistance RDS(ON)

LNK64x4

ID = 96 mA

TJ = 25 °C19.7 23.7

TJ = 100 °C30.0 36.0

LNK64x5

ID = 105 mA

TJ = 25 °C13.2 15.8

TJ = 100 °C19.8 23.8

LNK64x6

ID = 105 mA

TJ = 25 °C7.7 9.3

TJ = 100 °C11.5 13.8

LNK64x7

ID = 96 mA

TJ = 25 °C4.8 5.8

TJ = 100 °C7. 2 8.5

LNK64x8

ID = 105 mA

TJ = 25 °C3.1 3.8

TJ = 100 °C4.6 5.5

OFF-State

Leakage

IDSS1

VDS = 560 V

TJ = 125 °C See Note C 50

IDSS2

VDS = 375 V

TJ = 50 °C15

Rev. C 03/16

LNK64x4-64x8

www.power.com

NOTES:

A. Auto-restart ON-time is a function of switching frequency programmed by tON × IFB and minimum frequency in CC mode.

B. The current limit threshold is compensated to cancel the effect of current limit delay. As a result the output current stays constant across

the input line range.

C. IDSS1 is the worst-case OFF-state leakage specication at 80% of BVDSS and maximum operating junction temperature. IDSS2 is a typical

specication under worst-case application conditions (rectied 265 VAC) for no-load consumption calculations.

D. When the duty cycle exceeds DCMAX the LinkSwitch-3 operates in on-time extension mode.

E. This parameter is derived from characterization.

F. The switching frequency is programmable between 60 kHz to 85 kHz.

G. At light load tFB is reduced at 1.8 ms typical.

Parameter Symbol

Conditions

SOURCE = 0 V; TJ = 0 to 100 °C

(Unless Otherwise Specied)

Min Typ Max Units

Output (cont.)

Breakdown

Voltage BVDSS TJ = 25 °C725 V

DRAIN Supply

Voltage 50 V

Auto-Restart

ON-Time tAR-ON See Notes A, E 300 ms

Auto-Restart

OFF-Time tAR-OFF 1.5 s

Open-Loop

FEEDBACK Pin

Current Threshold

IOL See Note E -90 mA

Open-Loop

ON-Time See Note E 90 ms

Rev. C 03/16

LNK64x4-64x8

www.power.com

1.200

0.600

0.800

1.000

0.200

0.400

0.000

-40 -15 10 35 60 85 110 135

Temperature (°C)

Current Limit

(Normalized to 25 °C)

PI-7558-032615

1.200

0.600

0.800

1.000

0.200

0.400

0.000

-40 -15 10 35 60 85 110 135

Temperature (°C)

Frequency

(Normalized to 25 °C)

PI-5086-020515

1.200

0.600

0.800

1.000

0.200

0.400

0.000

-40 -15 10 35 60 85 110 135

Temperature (°C)

Frequency Ratio

(Normalized to 25 °C)

PI-5087-020515

1.200

0.600

0.800

1.000

0.200

0.400

0.000

-40 -15 10 35 60 85 110 135

Temperature (°C)

Frequency Ratio

(Normalized to 25 °C)

PI-5088-020515

1.200

0.600

0.800

1.000

0.200

0.400

0.000

-40 -15 10 35 60 85 110 135

Temperature (°C)

Feedback Voltage

(Normalized to 25 °C)

PI-5089-020515

1.200

0.600

0.800

1.000

0.200

0.400

0.000

-40 -15 10 35 60 85 110 135

Temperature (°C)

Normalized Output Current

(Normalized to 25 °C)

PI-7559-032615

Figure 8. Current Limit vs. Temperature. Figure 9. Output Frequency vs. Temperature.

Figure 10. Frequency Ratio vs. Temperature (Constant Current). Figure 11. Frequency Ratio vs. Temperature (Inductor Current).

Figure 12. Feedback Voltage vs. Temperature. Figure 13. Normalized Output Current vs. Temperature.

Typical Performance Characteristics

Rev. C 03/16

LNK64x4-64x8

www.power.com

Figure 14. Breakdown vs. Temperature.

Typical Performance Characteristics (cont.)

1.1

1.0

0.9

-50 -25 0 25 50 75 100 125 150

Junction Temperature (°C)

Breakdown Voltage

(Normalized to 25

°C)

PI-2213-020515

DRAIN Voltage (V)

Drain Current (mA)

300

250

200

100

150

0 2 4 6 8 10

TCASE=25 °C

TCASE=100 °C

PI-7201-020415

LNK64x4 1.0

LNK64x5 1.5

LNK64x6 2.5

LNK64x7 4.0

LNK64x8 6.5

Scaling Factors:

Drain Voltage (V)

Drain Capacitance (pF)

PI-7202-020415

0 100 200 300 400 500 600

100

1000

LNK64x4 1.0

LNK64x5 1.5

LNK64x6 2.5

LNK64x7 4.0

LNK64x8 6.5

Scaling Factors:

0 200 400 600

DRAIN Voltage (V)

Power (mW)

PI-7203-020415

LNK64x4 1.0

LNK64x5 1.5

LNK64x6 2.5

LNK64x7 4.0

LNK64x8 6.5

Scaling Factors:

Figure 15. Output Characteristic.

Figure 16. COSS vs. Drain Voltage. Figure 17. Drain Capacitance Power.

Rev. C 03/16

LNK64x4-64x8

www.power.com

PI-4526-012315

D07C

3.90 (0.154) BSC

Notes:

1. JEDEC reference: MS-012.

2. Package outline exclusive of mold flash and metal burr.

3. Package outline inclusive of plating thickness.

4. Datums A and B to be determined at datum plane H.

5. Controlling dimensions are in millimeters. Inch dimensions

are shown in parenthesis. Angles in degrees.

0.20 (0.008) C

26.00 (0.236) BSC

4.90 (0.193) BSC

0.10 (0.004) C

0.10 (0.004) C2X

A-B

1.27 (0.050) BSC

7X 0.31 - 0.51 (0.012 - 0.020)

0.25 (0.010) MC A-B D

0.25 (0.010)

0.10 (0.004)

(0.049 - 0.065)

1.25 - 1.65

1.75 (0.069)

1.35 (0.053)

0.10 (0.004) C

1.27 (0.050)

0.40 (0.016)

GAUGE

PLANE

0 - 8

1.04 (0.041) REF 0.25 (0.010)

BSC

SEATING

PLANE

0.25 (0.010)

0.17 (0.007)

DETAIL A

SEATING PLANE

Pin 1 ID

4.90 (0.193)

1.27 (0.050) 0.60 (0.024)

2.00 (0.079)

Reference

Solder Pad

Dimensions

SO-8C (D Package)

Rev. C 03/16

LNK64x4-64x8

www.power.com

PI-4917-020515

MOUNTING HOLE PATTERN

(not to scale)

PIN 7

PIN 1

0.100 (2.54) 0.100 (2.54)

0.059 (1.50)

0.050 (1.27)

0.100 (2.54)

0.155 (3.93)

0.020 (0.50)

Notes:

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions noted are determined at the outermost extremes of the plastic

body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but

including any mismatch between the top and bottom of the plastic body.

Maximum mold protrusion is 0.007 [0.18] per side.

3. Dimensions noted are inclusive of plating thickness.

4. Does not include inter-lead flash or protrusions.

5. Controlling dimensions in inches (mm).

0.403 (10.24)

0.397 (10.08)

0.325 (8.25)

0.320 (8.13)

0.050 (1.27)

FRONT VIEW

0.070 (1.78) Ref.

Pin #1

I.D.

0.016 (0.41)

Ref.

0.290 (7.37)

Ref.

0.047 (1.19)

0.100 (2.54)

0.519 (13.18)

Ref.

0.198 (5.04) Ref.

0.264 (6.70)

Ref.

0.118 (3.00)

6×

0.140 (3.56)

0.120 (3.05)

0.021 (0.53)

0.019 (0.48)

0.378 (9.60)

Ref. 0.019 (0.48) Ref.

0.060 (1.52)

Ref.

0.048 (1.22)

0.046 (1.17)

0.081 (2.06)

0.077 (1.96)

0.207 (5.26)

0.187 (4.75)

0.033 (0.84)

0.028 (0.71)

0.016 (0.41)

0.011 (0.28)

eSIP-7C (E Package)

10° Ref.

All Around

0.020 M 0.51 M C

0.010 M 0.25 M C A B

SIDE VIEW

END VIEW

BACK VIEW

0.023 (0.58)

0.027 (0.70)

DETAIL A

Detail A

Rev. C 03/16

LNK64x4-64x8

www.power.com

SIDE VIEW END VIEW

11×

PI-5748a-020515

Notes:

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions noted are determined at the outermost

extremes of the plastic body exclusive of mold flash,

tie bar burrs, gate burrs, and interlead flash, but

including any mismatch between the top and bottom of

the plastic body. Maximum mold protrusion is 0.007

[0.18] per side.

3. Dimensions noted are inclusive of plating thickness.

4. Does not include interlead flash or protrusions.

5. Controlling dimensions in inches [mm].

6. Datums A and B to be determined at Datum H.

7. Exposed pad is nominally located at the centerline of

Datums A and B. “Max” dimensions noted include both

size and positional tolerances.

eSOP-12B (K Package)

TOP VIEW BOTTOM VIEW

Pin #1 I.D.

(Laser Marked)

0.023 [0.58]

0.018 [0.46]

0.006 [0.15]

0.000 [0.00]

0.098 [2.49]

0.086 [2.18]

0.092 [2.34]

0.086 [2.18]

0.032 [0.80]

0.029 [0.72]

Seating

Plane

Detail A

Seating plane to

package bottom

standoff

0.034 [0.85]

0.026 [0.65]

0.049 [1.23]

0.046 [1.16]

3 4

0.460 [11.68]

0.400 [10.16]

0.070 [1.78]

0.306 [7.77]

Ref.

0.350 [8.89]

0.010 [0.25]

Ref.

Gauge

Plane

Seating Plane

0.055 [1.40] Ref.

0.010 [0.25]

0.059 [1.50]

Ref, Typ 0.225 [5.72]

Max.

0.019 [0.48]

Ref.

0.022 [0.56]

Ref.

0.020 [0.51]

Ref.

0.028 [0.71]

Ref.

0.325 [8.26]

Max.

0.356 [9.04]

Ref.

0.059 [1.50]

Ref, Typ

0.120 [3.05] Ref

0.010 (0.25) M C A B

11×

0.016 [0.41]

0.011 [0.28]

DETAIL A (Scale = 9X)

0.008 [0.20] C

2X, 5/6 Lead Tips

0.004 [0.10] C

0.004 [0.10] C A 2X

0.004 [0.10] C B

0 -

° 8°

123 4 6 6 1

7 12

0.217 [5.51]

0.321 [8.15]

0.429 [10.90]

0.028 [0.71]

0.067 [1.70] Land Pattern

Dimensions

Rev. C 03/16

LNK64x4-64x8

www.power.com

Part Ordering Information

• LinkSwitch Product Family

• 3 Series Number

• Package Identier

D SO-8C

E eSIP-7C

K eSOP-12B

• Tape & Reel and Other Options

Blank Standard Conguration

TL Tape & Reel, 2.5 k pcs for D package, 1 k pcs for K package.

LNK 64x7 D - TL

For the latest updates, visit our website: www.power.com

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations

does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY

HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY,

FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.

Patent Information

The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one

or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of

Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set

forth at http://www.power.com/ip.htm.

Life Support Policy

POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS

WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:

1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose

failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in signicant injury or

death to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the

failure of the life support device or system, or to affect its safety or effectiveness.

The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS,

HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power

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Power Integrations Worldwide Sales Support Locations

Revision Notes Date

A Code A. 10/16/13

ASpecied Max BYPASS Pin Current. 03/13/14

A Code L. Updated Table 1 and Table 2. 06/11/14

BAdded LNK64x4, 64x5 and 64x6 parts. Updated fR ATIO(CC), ILIMIT(MIN), tFB, VFB(AR), fOSC(MIN), tAR-OFF and IOL. Updated ms values in

Auto-Restart section on page 3. Removed fOSC(AR) and updated tAR-ON.03/31/15

C Added Note G on page 11. 03/16