AMI SX061 AMERICAN MICROSYSTEMS NC Product Description May 1998 1IMbit/s DOPSK/DBPSK Digital Demodulator General Description The SX061 is a small digital demodulator, specially developed to work together with the AMI SX043 Spread Spectrum baseband processor. This has resulted in a very small 24 pins ASIC which replaces large parts of the analogue components needed to work with the SX043 or SX042. This chip is only needed on the receiving radio unit. The transmitting radio unit needs no special requirements to generate the DQPSK or DBPSK signal other than the output of an SX041 or an SX043. Features: Up to 1 Mbit/s (D)QPSK demodulation Up to 500kbit/s (D)BPSK demodulation RSSI output for SX042/043 code tracking and synchronization Fully programmable using serial interface of SX042/043 Low power consumption Power Down mode SOIC 24 package Spread Spectrum Applications e Wireless Local Area Networks e Portable wireless communication e Digital cellular telephone systems Wireless ISDN modems e Other wireless systems Typical Spread Spectrum Receiving Unit 1 *AMS Radio Unit Down Conversion IF-SS oo RX-PN g AGC RX_IN SXO43/SXD42 Analogue loop filter Microcontroller Functional Description of the SX061: The incoming IF signal is quantisized using 3 quantization levels. After that, the signal is multiplied with the complex IF signal, generated by a Numerical Controlled Oscillator (NCO). The I- and Q- output signals are fed into the Integrate and Dump filters. The "Dump" signal for the filters is generated by the SX043 on the end of each symbol. After a "Dump" has occurred the Demod DSP is triggered. This DSP calculates the phase and amplitude of the signal. The phase information is filtered and subsequently used to correct the internal IF frequency on the NCO. The amplitude information is used to calculate a RSSI signal. The SX043/042 needs this RSSI signal in two different stages of the reception process: The first stage is the "slip" mode. In this mode the SX043 needs to detect the moment that a correlation flash occurs between the transmitted and the received PN code before the codes have been synchronized. This correlation flash is generated on the RSSI output. After the two PN codes have been synchronized, the SX043 changes to the second stage: The "track" mode. In this mode the SX043/042 needs the RSSI signal to keep the PN code in lock. In order to distinguish these two modes the SX061 uses the "TrackOn" output of the SX043. A simple RC section can obtain the analogue RSSI value from the Pulse Width Modulator. Block Diagram of SX061 OUNMP Sdata Sck Vuk Rx in Sampler | camrerer 3 Mah anol Pu kt Pa M2 The SX061 also generates an AGC output. This AGC signal is used to control the amplification of the amplifier in the Radio Unit. This guarantees an optimal quantization of the incoming signal. The internal registers of the SK061 are programmed by a serial interface, which is provided by the SX043. These registers are used to control the gain in the loopfilter, to set the amplification of the RSSI signal and to set the IF frequency. These registers also determine whether the SX061 is in DBPSK or in DQPSK mode. More Information This device has been developped by AMI and S.T.S. For more information please contact info@sts.nl. Operating Specifications Symbol Parameter _ Units Ratings VDD Supply Voltage iV 3-5.5(max) PD ! Power Dissipation /mW __ <50mA Dep. on data rate TS Storage Temperature sO -55 to +125 IFI IF frequency with internal MHz 11(max, setting AD-converter dependent) | IFE IF frequency with external | MHz 25(max) AD-converter RXIV Input voltage Vpp 300mV _ RXIil Input impedance on RX_in kOhm | 100 _ FREF Reference Frequency MHz 2 RSOL RSSI1&2 output level V 0 to 2.5 SRTE Internal Sample Rate MHz 1.56 .. 100 rw, : 8 28 g dvdd [] * enable Gb 2 3 Q 5 z Fs wes [FE 2] avea FLEE El le sdata [2] 2} avss -8clk [e | a sclk [| 2) rx_in rssi2 6 rssi2 [=] | age rssit A rssit [8 | Sx061 fa] res Sx061 rad =[F | 24 Pin sole Jecn LE 98 Pin PLCC rxdt [* | 7 | crysta = 'xa0 [| trackon [4 | cryst) req [*] dump [| | ipt trackon } 141 dvss ("| [| avss T=] DP] r] cal Z 7 dvdd [| [a | avdd e 6s = 0 E 0 SG SG 0 3s @ @ 2 & & B&B