PD- 92005 SMPS MOSFET IRF740AS/L HEXFET(R) Power MOSFET Applications Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching l Benefits Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss specified ( See AN 1001) VDSS Rds(on) max ID 0.55 10A 400V l D 2 Pak T O -26 2 Absolute Maximum Ratings ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds 10 6.3 40 3.1 125 1.0 30 5.9 -55 to + 150 Units A W W/C V V/ns C 300 (1.6mm from case ) Typical SMPS Topologies: l l Single transistor Flyback Xfmr. Reset Single Transistor Forward Xfmr. Reset ( Both for US Line Input only ) Notes through www.irf.com are on page 10 1 9/14/99 IRF740AS/L Static @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 400 --- --- 2.0 --- --- --- --- Typ. --- 0.48 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, I D = 250A --- V/C Reference to 25C, ID = 1mA 0.55 VGS = 10V, ID = 6.0A 4.0 V VDS = VGS, ID = 250A 25 VDS = 400V, VGS = 0V A 250 VDS = 320V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 4.9 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 10 35 24 22 1030 170 7.7 1490 52 61 Max. Units Conditions --- S VDS = 50V, ID = 6.0A 36 ID = 10A 9.9 nC VDS = 320V 16 VGS = 10V, See Fig. 6 and 13 --- VDD = 200V --- ID = 10A ns --- RG = 10 --- RD = 19.5,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, V DS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 320V, = 1.0MHz --- VGS = 0V, V DS = 0V to 320V Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units --- --- --- 630 10 12.5 mJ A mJ Typ. Max. Units --- --- 1.0 40 C/W Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted, steady-state)* Diode Characteristics IS ISM VSD trr Qrr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 10 --- --- showing the A G integral reverse --- --- 40 S p-n junction diode. --- --- 2.0 V TJ = 25C, IS = 10A, VGS = 0V --- 240 360 ns TJ = 25C, IF = 10A --- 1.9 2.9 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRF740AS/L 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 1 0.1 4.5V 20s PULSE WIDTH TJ = 25 C 0.01 0.1 1 10 10 1 4.5V 100 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 100 10 TJ = 150 C 1 TJ = 25 C V DS = 50V 20s PULSE WIDTH 6.0 7.0 8.0 9.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 10 100 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 5.0 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 0.1 4.0 20s PULSE WIDTH TJ = 150 C 0.1 0.1 10.0 ID = 10A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRF740AS/L VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd C, Capacitance(pF) 10000 Coss = Cds + Cgd Ciss 1000 Coss 100 10 Crss VGS , Gate-to-Source Voltage (V) 20 100000 ID = 10A VDS = 320V VDS = 200V VDS = 80V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 1 1 10 100 1000 0 0 VDS, Drain-to-Source Voltage (V) 10 20 30 40 Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 100 10us I D , Drain Current (A) ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 10 TJ = 150 C TJ = 25 C 1 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 1.2 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 1.4 100us 10 1ms 1 TC = 25 C TJ = 150 C Single Pulse 10 10ms 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRF740AS/L 10.0 VGS 8.0 I D , Drain Current (A) RD VDS D.U.T. RG + -VDD 6.0 10V Pulse Width 1 s Duty Factor 0.1 % 4.0 Fig 10a. Switching Time Test Circuit 2.0 VDS 90% 0.0 25 50 75 100 TC , Case Temperature 125 150 ( C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.1 0.10 0.05 P DM 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) 0.01 t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.00001 0.0001 0.001 0.01 0.1 1 10 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF740AS/L EAS , Single Pulse Avalanche Energy (mJ) 1400 1 5V TOP 1200 D R IV E R L VDS BOTTOM ID 4.5A 6.3A 10A 1000 D .U .T RG + V - DD IA S 20V 0 .0 1 tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp A 800 600 400 200 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( C) IAS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V QGD 580 VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50K 12V .2F V DSav , Avalanche Voltage ( V ) QGS 560 540 520 500 .3F D.U.T. + V - DS 480 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 IAV , Avalanche Current ( A) VGS 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current www.irf.com IRF740AS/L Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + * * * * RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. D= Period + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRF740AS/L D2Pak Package Outline 1 0.54 (.415 ) 1 0.29 (.405 ) 1.4 0 (.055 ) M AX. -A- 1.3 2 (.05 2) 1.2 2 (.04 8) 2 1.7 8 (.07 0) 1.2 7 (.05 0) 1 10 .1 6 (.4 00 ) R E F. -B- 4 .6 9 (.18 5) 4 .2 0 (.16 5) 6.47 (.2 55 ) 6.18 (.2 43 ) 1 5.49 (.6 10) 1 4.73 (.5 80) 3 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 5.28 (.2 08 ) 4.78 (.1 88 ) 3X 1.40 (.0 55) 1.14 (.0 45) 3X 5 .08 (.20 0) 0.55 (.0 22) 0.46 (.0 18) 0.9 3 (.0 37 ) 0.6 9 (.0 27 ) 0.25 (.0 10 ) M 8.8 9 (.3 50 ) R E F. 1.3 9 (.0 55 ) 1.1 4 (.0 45 ) B A M M IN IM U M R EC O M M E ND E D F O O TP R IN T 1 1.43 (.4 50 ) NO TE S: 1 D IM EN S IO N S A FTER SO LD E R D IP . 2 D IM EN S IO N IN G & TO LE R AN C IN G P ER AN S I Y1 4.5M , 19 82 . 3 C O N TRO L LIN G D IM EN S IO N : IN C H. 4 H E ATSINK & L EA D D IM E N SIO N S DO N O T IN C LU D E B U R RS . LE AD AS SIG N M E N TS 1 - G ATE 2 - D RA IN 3 - SO U R C E 8 .89 (.35 0) 17 .78 (.70 0) 3.81 (.1 5 0) 2.0 8 (.08 2) 2X 2.5 4 (.100 ) 2X Part Marking Information D2Pak IN TE R N A TIO N A L R E C T IF IE R LO G O A S S E M B LY LO T C O D E 8 A PART NUM BER F530S 9 24 6 9B 1M DATE CODE (Y YW W ) YY = Y E A R W W = W EEK www.irf.com IRF740AS/L Package Outline TO-262 Outline Part Marking Information TO-262 www.irf.com 9 IRF740AS/L Tape & Reel Information D2Pak TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .1 6 1 ) 3 .9 0 ( .1 5 3 ) F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 0.3 6 8 (.01 4 5 ) 0.3 4 2 (.01 3 5 ) 1 1.6 0 (.4 57 ) 1 1.4 0 (.4 49 ) 1 .6 5 ( .0 6 5 ) 1 5 .42 (.60 9 ) 1 5 .22 (.60 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TRL 1 0.9 0 (.4 2 9) 1 0.7 0 (.4 2 1) 1 .75 (.06 9 ) 1 .25 (.04 9 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8) 16 .1 0 (.63 4 ) 15 .9 0 (.62 6 ) F E E D D IR E C T IO N 13.50 (.532 ) 12.80 (.504 ) 2 7.4 0 (1.079 ) 2 3.9 0 (.9 41) 4 3 30 .00 ( 14.1 73 ) MAX. Notes: N O TE S : 1 . CO M F OR M S TO E IA -418 . 2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER . 3 . DIM E NS IO N M EA S UR E D @ H U B. 4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E. Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 12.6mH RG = 25, IAS = 10A. (See Figure 12) ISD 10A, di/dt 330A/s, VDD V(BR)DSS, TJ 150C 6 0.0 0 (2.36 2) M IN . 26 .40 (1 .03 9) 24 .40 (.9 61 ) 3 30.4 0 (1.19 7) M A X. 4 Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS Uses IRF740A data and test conditions * When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 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