A1140/42/43/45 Preliminary Data Sheet PRELIMINARYL DATA SHEET SUBJECT TO CHANGE WITHOUT NOTICE Two-Wire, Factory-Programmed, Chopper-Stabilized, Unipolar Hall-Effect Switch The A114X is a two-wire, unipolar, Hall-effect switch with factory programmability for end-of-line optimization of switch point accuracy. This device uses a patented high frequency chopper-stabilization technique on Allegro's most advanced BiCMOS wafer fabrication process to achieve magnetic stability and to eliminate offset inherent in single-element devices and from harsh-application environments. This device provides on-chip transient protection. A zener clamp on the power supply protects against over-voltage conditions on the supply line. The output of the A1143 will switch HIGH in the presence of a sufficiently large south-pole magnetic field and will switch LOW with the removal of the field. The A1140/2/5 has the opposite polarity as the A1143, switching LOW in the presence of a sufficiently large south-pole magnetic field. Two package styles provide a magnetically optimized package for most applications. Suffix "LH" is a miniature low profile package for surface-mount applications; suffix "UA" is a three-lead ultra-mini Single Inline Package (SIP) for through-hole mounting. See typical application drawing for UA pinning. ABSOLUTE MAXIMUM RATINGS Supply Voltage VCC ............................................ 26.5 V Reverse-Battery Voltage VRB ............................................. -18 V Magnetic Flux Density B .......................................... Unlimited Package Power Dissipation ja, UA........................................ 206 C/W LH1.........................................248 C/W Junction Temperature, TJ .................... +170C Operating Temperature Range,TA Suffix `E'..........................-40 C to +85 C Suffix `L'........................ -40 C to +150 C Storage Temperature Range TS .............................. -65 C to +170 C 1 FEATURES / BENEFITS Chopper Stabilization s Low switch-point drift over temperature s Low stress sensitivity Factory programmed at end-of-line s Optimized switch Points On-chip Protection s Supply transient protection s Robust ESD/EMC protection s Reverse-battery protection On-board Voltage Regulator s 3.8 V to 24 V operation Order by complete part number (i.e. A1142LUA). The "LH" PPD is based on a 0.062" thick FR4, single-sided board using 2 oz. copper, with a 0.55 mm2 area of copper attached to the ground lead. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) CHARACTERISTICS Valid over operating temperature range unless otherwise noted. Part Number Characteristics Symbol Limits Test Conditions Min. Typ. Max. Units 3.8 - 24 V ELECTRICAL CHARACTERISTICS A114X Supply Voltage A1140 Supply Current A1142/3/5 VCC Supply Current 2 A114X IGND(L) Output I Low 2 - 5 mA IGND(H) Output I High 12 - 17 mA IGND(L) Output I Low 5 - 6.9 mA IGND(H) Output I High 12 - 17 mA - 20 - us - 20 - us Output Rise Time tr 2 tf Output Fall Time Operating RL=100 Ohms, CBYP=0.1uF RL=100 Ohms, CBYP=0.1uF Chopping Frequency fC - - 340 - kHz Power-Up Time ton - - - 25 s Power-Up State POS - HIGH - - 28 36 40 V 50 85 115 G 45 - 110 G BOP - BRP 5 15 30 G B > Bop, IGND = Low 10 37 60 G B < BRP, IGND = High 5 - 55 G BOP - BRP 5 15 30 G Zener Voltage VZ t < ton, tr < 5us, no bypass capacitor I = 10mA MAGNETIC CHARACTERISTICS Operate Point, Bop A1140/2/3 Release Point, Brp Hysteresis Operate Point, Bop A1145 BHYS 1145 Release Point, Brp Hysteresis 2 1140/2 1143 1140/2 1143 BHYS B B B B > > < < Bop, IGND = Low Bop, IGND = High BRP, IGND = High BRP, IGND = Low Typical rise and fall time of the Hall sensor is 1us, the true rise and fall time is dependent on the load circuit as indicated by the 20us specification. Rev. 1.0 18Apr03 Page 2 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) FUNCTIONAL BLOCK DIAGRAM Supply Program / Lock Reg Programmming Logic AMP To all subcircuits Offset Adjust S/H LPF GND Clock/Logic GND ("UA" ONLY-Pin 3) 3) A1143 Hysteresis Curve A1140/2/5 Hysteresis Curve +I +I IccHigh Brp Output Current Output Current IccHigh B op B rp IccLow 0 0 Flux Density Rev. 1.0 18Apr03 Page 3 +B Bop IccLow 0 0 Flux Density +B 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) Typical Characterization Data All data is the average of 1 Lot, >1000 Units Vcc=24v Bop 85G trim 94 Vcc= 12v 92 Vcc= 3.8v 90 88 86 84 82 80 78 -40 C 25 C 85 C Temperature (C) Iccon 17 Vcc= 24v 16.5 16 Vcc =12v Vcc =3.8v 6.8 6.6 6.4 Current (mA) 15.5 Current (mA) Vcc =24v Iccoff Vcc= 12v Vcc= 3.8v 15 14.5 14 6.2 6 5.8 5.6 13.5 5.4 13 5.2 12.5 5 12 -40 C 25 C Temperature (C) Rev. 1.0 18Apr03 Page 4 85 C -40 C 25 C 85 C Temperature (C) 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) Functional Description Chopper-Stabilization Technique. A limiting factor for switch point accuracy when using Hall effect technology is the small signal voltage developed across the Hall plate. This voltage is proportionally small relative to the offset that can be produced at the output of the Hall sensor. This makes it difficult to process the signal and maintain an accurate, reliable output over the specified temperature and voltage range. Chopper Stabilization is a unique approach used to minimize Hall offset on the chip. The Allegro patented technique; dynamic quadrature offs et cancellation, removes key sources of the output drift induced by temperature and package stress. This offset reduction technique is based on a signal modulation-demodulation process. The undesired offset signal is separated from the magnetically induced signal in the frequency domain through modulation. The subsequent demodulation acts as a modulation process for the offset causing the magnetically induced signal to recover its original spectrum at base band while the dc offset becomes a high frequency signal. Then, using a low-pass filter the signal passes while the modulated dc offset is suppressed. The chopper stabilization technique uses a 170 kHz high frequency clock. The Hall plate chopping occurs on each clock edge resulting in a 340 kHz chop frequency. The high frequency operation allows for a greater sampling, which produces higher accuracy and faster signal processing capability. Using this chopper stabilization approach, the chip is desensitized to the effects of temperature and stress. This technique produces devices that have an extremely stable quiescent Hall output voltage, is immune to thermal stress, and has precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process which allows the use of low offset and low noise amplifiers in combination with high-density logic integration and sample and hold circuits. The repeatability of switching with a magnetic field is slightly affected using a chopper technique. Allegro's high frequency chopping approach minimizes the affect of jitter and makes it imperceptible in most applications. Applications that may notice the degradation are those that require the precise sensing of alternating magnetic fields such as ring magnet speed sensing. For those applications, Allegro recommends the "low jitter" family of digital sensors. Regulator Amplifier Sample/ Hold CLOCK Hall Element Concept of Dynamic Quadrature Offset Cancellation Rev. 1.0 18Apr03 Page 5 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) TYPICAL APPLICATION CIRCUIT Applications. It is necessary that an external bypass capacitor be connected between the supply and ground of the device to reduce both external noise and noise generated by the chopper-stabilization technique. (The diagram below shows a 0.01uF bypass capacitor) The bypass capacitor should be no further than 5 mm away from the Hall sensor. The bypass capacitor is to protect the Hall IC only. All high frequency interferences conducted along the supply lines will be passed directly to the load through the bypass capacitor. Therefore, the ECU must have sufficient protection other than the bypass capacitor placed in parallel with the Hall IC. A series resistor on the supply side, Rs (not shown), in combination with the bypass capacitor will create a filter for EMC pulses. (See the ISO Transient Table). The series resistor (Rs) and/or sense resistor (Rsense) will have voltage drops across them that must be considered for the minimum Vcc requirement of the device. The preferred sense resistor value is approximately 100 ohms. Typical Application (UA pkg): Vcc 1 0.01uF VSupply A114X OUTPUT 2 ECU 3 Optional OUTPUT UA ONLY RSENSE Extensive applications information on magnets and Hall-effect sensors including Chopper-Stabilization is available in the Allegro Electronic Data Book CD, or at the website: http://www.allegromicro.com . Rev. 1.0 18Apr03 Page 6 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) DEVICE QUALIFICATION PROGRAM Test Name Test Conditions Pre/Post Test High Temperature Operating Life (HTOL) High Temperature Bake (HTB) Pre Conditioning (PC) Ta = room, hot, cold Test Length # of Sample / Lots lot Ta = 150C, Tj ? 170C 408 hrs 1 Ta = 170C 1000 hrs 85C/85%RH 168 hrs Temperature Humidity Bias (THB) or HAST 85C/85%RH 130C/85%RH 1000 hrs 50 hrs Autoclave (AC) 121C/15 psig -65C to +150C or -50C to +150C Temperature Cycle (TC) 96 hrs 500 cycles 77 JESD22-A108 1 77 JESD22-A103 1 231 JESD22-A112 & A113 1 77 JESD22-A101 JESD22-A110 1 77 JESD22-A102 1 77 JESD22-A104 1000 cycles External Visual (EV) Physical Dimensions (PD) Lead Integrity Bond Pull Strength ESD 1 1 1 HBM & MM 1 Solderability (SD) 1 Early Life Failure Rate (ELFR) 125C or 150C Gate Leakage (GL) Electrical Distributions (ED) Ta = room, hot, cold Comments 30 45 30 3 per model JESD22-A114 & A115,CDFper V step AEC-Q100-002, 003 & 011 15 JESD22-B102 48 hrs 1 800 1 6 3 30 JESD22-A108 24 hrs CDF- AEC-Q100-006 EMC Requirements (Electromagnetic Compatibility) Please contact your local representative for EMC results Rev. 1.0 18Apr03 Page 7 Test Name Reference Specification ESD - Human Body Model ESD - Machine Model Conducted Transients AEC-Q100-002 AEC-Q100-003 ISO 7637-1 Direct RF Injection ISO 11452-7 Bulk Current Injection TEM Cell ISO 11452-4 ISO 11452-3 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) POWER DE-RATING Maximum Allowable Power Calculation for A118X Family 3: Due to internal power consumption, the junction temperature of the IC, Tj, is higher than the ambient environment temperature, Ta. To ensure that the device does not operate above the maximum rated junction temperature use the following calculations: T = PD * Rja Where: PD = Vcc * Icc T=Vcc * Icc * Rja Where T denotes the temperature rise resulting from the IC's power dissipation. Assume: Ta = Ta max = 150 C Tj(max) = 170C Icc = IONmax = 17 mA If: Tj = Ta + T Then: Tmax = Tjmax - Ta max = 170 C - 150 C = 20 C If: T = PD * Rja Tj = Ta + T For the sensor : Tj(max) = 170C Rja (UA Pkg) = 206C/W Then: PDmax = Tmax / Rja = 20 C / 206 C/W = 97.1 mW If: PD = Vcc * Icc Typical Tj calculation: Ta = 25 C Vcc = 12 V Icc = IccONtyp = 14.5 mA Then the maximum Vcc at 150C is therefore: Vccmax = PDmax / Icc = 97.1 mW / 17 mA = 5.7 V PD = Vcc * Icc = 12 V * 14.5 mA = 174 mW Tj = Ta + T = 25 C + 35.8 C = 60.8 C Maximum Supply Voltage vs Ambient Temperature 30 Maximum Supply Voltage (V) T = PD * Rja = 174 mW * 206C/W = 35.8 C Dissipation 25 20 UA (ROJA = 206C/W) LH (ROJA = 228C/W) 15 10 5 0 0 25 50 75 100 125 150 Temperature (C) 3 The "LH" PPD is based on a 0.062" thick FR4, single-sided board using 2 oz. copper, with a 0.55 mm2 area of copper attached to the ground lead. Rev. 1.0 18Apr03 Page 8 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) Rev. 1.0 18Apr03 Page 9 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) Rev. 1.0 18Apr03 Page 10 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) Rev. 1.0 18Apr03 Page 11 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc. TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY (PRELIMINARY INFORMATION - SUBJECT TO CHANGE) The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support appliances, devices, or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties that may result from its use. Rev. 1.0 18Apr03 Page 12 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright (c) 1993, 1995 Allegro MicroSystems, Inc.