A1143 - Allegro MicroSystems, Inc.

A1140/42/43/45

Preliminary Data Sheet

PRELIMINARYL DATA SHEET

SUBJECT TO CHANGE WITHOUT NOTICE Two-Wire, Factory-Programmed, Chopper-Stabilized,

Unipolar Hall-Effect Switch

See typical application drawing for UA pinning.

The A114X is a two-wire, unipolar, Hall-effect switch with factory

programmability for end-of-line optimization of switch point accuracy. This

device uses a patented high frequency chopper-stabilization technique on

Allegro's most advanced BiCMOS wafer fabrication process to achieve

magnetic stability and to eliminate offset inherent in single-element devices

and from harsh-application environments.

This device provides on-chip transient protection. A zener clamp on

the power supply protects against over-voltage conditions on the supply

line.

The output of the A1143 will switch HIGH in the presence of a

sufficiently large south-pole magnetic field and will switch LOW with the

removal of the field. The A1140/2/5 has the opposite polarity as the

A1143, switching LOW in the presence of a sufficiently large south-pole

magnetic field.

Two package styles provide a magnetically optimized package for

most applications. Suffix “LH” is a miniature low profile package for

surface-mount applications; suffix “UA” is a three-lead ultra-mini Single

Inline Package (SIP) for through-hole mounting.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage

VCC …………………………………….. 26.5 V

Reverse-Battery Voltage

VRB ……………………………………… -18 V

Magnetic Flux Density

B …………………………………… Unlimited

Package Power Dissipation θja,

UA…………………………………. 206 °C/W

LH1……………………………….….248 °C/W

Junction Temperature, TJ ……………….. +170°C

Operating Temperature Range,TA

Suffix ‘E’……………………..-40 °C to +85 °C

Suffix ‘L’…………………... -40 °C to +150 °C

Storage Temperature Range

TS ………………………… -65 °C to +170 °C

FEATURES / BENEFITS

♦ Chopper Stabilization

s Low switch-point drift over temperature

s Low stress sensitivity

♦ Factory programmed at end-of-line

s Optimized switch Points

♦ On-chip Protection

s Supply transient protection

s Robust ESD/EMC protection

s Reverse-battery protection

♦ On-board Voltage Regulator

s 3.8 V to 24 V operation

Order by complete part number (i.e. A1142LUA).

1 The “LH” PPD is based on a 0.062" thick FR4, single-sided board using 2 oz. copper, with a 0.55 mm2 area of copper attached to the ground lead.

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 2

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

CHARACTERISTICS

Valid over operating temperature range unless otherwise noted.

Limits

Part Number Characteristics Symbol Test Conditions Min. Typ. Max. Units

ELECTRICAL CHARACTERISTICS

A114X Supply Voltage VCC Operating 3.8 - 24 V

IGND(L) Output I Low 2 - 5 mA

A1140 Supply Current IGND(H) Output I High 12 - 17 mA

IGND(L) Output I Low 5 - 6.9 mA

A1142/3/5 Supply Current IGND(H) Output I High 12 - 17 mA

Output Rise Time2 tr RL=100 Ohms,

CBYP=0.1uF - 20 - us

Output Fall Time2 tf RL=100 Ohms,

CBYP=0.1uF - 20 - us

Chopping Frequency fC - - 340 - kHz

Power-Up Time ton - - - 25 µs

Power-Up State POS t < ton, tr < 5us,

no bypass capacitor - HIGH - -

A114X

Zener Voltage VZ I = 10mA 28 36 40 V

MAGNETIC CHARACTERISTICS 1140/2 B > Bop, IGND = Low

Operate Point, Bop 1143 B > Bop, IGND = High 50 85 115 G

1140/2 B < BRP, IGND = High

Release Point, Brp 1143 B < BRP, IGND = Low 45 - 110 G

A1140/2/3

Hysteresis BHYS BOP - BRP 5 15 30 G

Operate Point, Bop B > Bop, IGND = Low 10 37 60 G

Release Point, Brp 1145 B < BRP, IGND = High 5 - 55 G

A1145

Hysteresis BHYS BOP - BRP 5 15 30 G

2 Typical rise and fall time of the Hall sensor is 1us, the true rise and fall time is dependent on the load circuit as indicated by the 20us specification.

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 3

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

FUNCTIONAL BLOCK DIAGRAM

Reg

Clock/Logic

AMP

S/H

LPF

Supply

GND

Programmming

Logic

Program / Lock

Offset

Adjust

To all

subcircuits

GND

("UA" ONLY

-

Pin 3)

3)

0

Output Current

+I

0Flux Density +B

IccHigh

IccLow

Bop

Brp

A1143 Hysteresis Curve

0

Output Current

+I

0Flux Density +B

IccHigh

IccLow

Bop

Brp

A1140/2/5 Hysteresis Curve

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 4

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

Typical Characterization Data

All data is the average of 1 Lot, >1000 Units

Bop 85G trim

78

80

82

84

86

88

90

92

94

-40 C 25 C 85 C

Temperature (C)

Vcc=24v

Vcc= 12v

Vcc= 3.8v

Iccon

12

12.5

13

13.5

14

14.5

15

15.5

16

16.5

17

-40 C 25 C 85 C

Temperature (C)

Current (mA)

Vcc= 24v

Vcc= 12v

Vcc= 3.8v

Iccoff

5

5.2

5.4

5.6

5.8

6

6.2

6.4

6.6

6.8

-40 C 25 C 85 C

Temperature (C)

Current (mA)

Vcc =24v

Vcc =12v

Vcc =3.8v

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 5

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

Functional Description

Chopper-Stabilization Technique. A limiting factor for switch point accuracy when using Hall effect technology is the

small signal voltage developed across the Hall plate. This voltage is proportionally small relative to the offset that can be

produced at the output of the Hall sensor. This makes it difficult to process the signal and maintain an accurate, reliable

output over the specified temperature and voltage range.

Chopper Stabilization is a unique approach used to minimize Hall offset on the chip. The Allegro patented technique;

dynamic quadrature offset cancellation, removes key sources of the output drift induced by temperature and package

stress. This offset reduction technique is based on a signal modulation-demodulation process. The undesired offset

signal is separated from the magnetically induced signal in the frequency domain through modulation. The subsequent

demodulation acts as a modulation process for the offset causing the magnetically induced signal to recover its original

spectrum at base band while the dc offset becomes a high frequency signal. Then, using a low-pass filter the signal

passes while the modulated dc offset is suppressed.

The chopper stabilization technique uses a 170 kHz high frequency clock. The Hall plate chopping occurs on each clock

edge resulting in a 340 kHz chop frequency. The high frequency operation allows for a greater sampling, which produces

higher accuracy and faster signal processing capability. Using this chopper stabilization approach, the chip is de-

sensitized to the effects of temperature and stress. This technique produces devices that have an extremely stable

quiescent Hall output voltage, is immune to thermal stress, and has precise recoverability after temperature cycling. This

technique is made possible through the use of a BiCMOS process which allows the use of low offset and low noise

amplifiers in combination with high-density logic integration and sample and hold circuits.

The repeatability of switching with a magnetic field is slightly affected using a chopper technique. Allegro’s high frequency

chopping approach minimizes the affect of jitter and makes it imperceptible in most applications. Applications that may

notice the degradation are those that require the precise sensing of alternating magnetic fields such as ring magnet speed

sensing. For those applications, Allegro recommends the “low jitter” family of digital sensors.

Regulator

Amplifier Sample/

Hold

CLOCK

Hall Element

Concept of Dynamic Quadrature Offset Cancellation

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 6

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

TYPICAL APPLICATION CIRCUIT

Applications. It is necessary that an external bypass capacitor be connected between the supply and ground of the

device to reduce both external noise and noise generated by the chopper-stabilization technique. (The diagram below

shows a 0.01uF bypass capacitor) The bypass capacitor should be no further than 5 mm away from the Hall sensor.

The bypass capacitor is to protect the Hall IC only. All high frequency interferences conducted along the supply lines will

be passed directly to the load through the bypass capacitor. Therefore, the ECU must have sufficient protection other

than the bypass capacitor placed in parallel with the Hall IC.

A series resistor on the supply side, Rs (not shown), in combination with the bypass capacitor will create a filter for EMC

pulses. (See the ISO Transient Table). The series resistor (Rs) and/or sense resistor (Rsense) will have voltage drops

across them that must be considered for the minimum Vcc requirement of the device. The preferred sense resistor value

is approximately 100 ohms.

Typical Application (UA pkg):

Extensive applications information on magnets and Hall-effect sensors including Chopper-Stabilization is available in the

Allegro Electronic Data Book CD, or at the website: http://www.allegromicro.com .

V

Supply

Vcc

1

3

Optional OUTPUT

UA ONLY

OUTPUT

0.01uF

A114X 2

R

SENSE

ECU

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 7

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

DEVICE QUALIFICATION PROGRAM

Test Name Test Conditions

Test

Length # of

Lots

Sample /

lot Comments

Pre/Post Test Ta = room, hot, cold

High Temperature

Operating Life (HTOL) Ta = 150°C, Tj ? 170°C

408 hrs 1 77 JESD22-A108

High Temperature Bake

(HTB) Ta = 170°C 1000 hrs 1 77 JESD22-A103

Pre Conditioning (PC) 85°C/85%RH 168 hrs 1 231 JESD22-A112 & A113

Temperature Humidity

Bias (THB) or HAST 85°C/85%RH

130°C/85%RH 1000 hrs

50 hrs 1 77 JESD22-A101

JESD22-A110

Autoclave (AC) 121°C/15 psig 96 hrs 1 77 JESD22-A102

Temperature Cycle (TC) -65°C to +150°C

or

-50°C to +150°C

500 cycles

1000 cycles 1 77

JESD22-A104

External Visual (EV)

Physical Dimensions (PD)

1 30

Lead Integrity 1 45

Bond Pull Strength 1 30

ESD HBM & MM 1 3 per model

per V step JESD22-A114 & A115,CDF-

AEC-Q100-002, 003 & 011

Solderability (SD) 1 15 JESD22-B102

Early Life Failure Rate

(ELFR) 125°C

or

150°C

48 hrs

24 hrs 1 800 JESD22-A108

Gate Leakage (GL) 1 6 CDF- AEC-Q100-006

Electrical Distributions

(ED) Ta = room, hot, cold 3 30

EMC Requirements (Electromagnetic Compatibility)

Please contact your local representative for EMC results

Test Name Reference Specification

ESD – Human Body Model AEC-Q100-002

ESD – Machine Model AEC-Q100-003

Conducted Transients ISO 7637-1

Direct RF Injection ISO 11452-7

Bulk Current Injection ISO 11452-4

TEM Cell ISO 11452-3

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 8

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

POWER DE-RATING

Due to internal power consumption, the junction

temperature of the IC, Tj, is higher than the ambient

environment temperature, Ta. To ensure that the device

does not operate above the maximum rated junction

temperature use the following calculations:

∆T = PD * Rθja

Where: PD = Vcc * Icc

∴ ∆T=Vcc * Icc * Rθja

Where ∆T denotes the temperature rise resulting from the

IC’s power dissipation.

Tj = Ta + ∆T

For the sensor :

Tj(max) = 170°C

Rθja (UA Pkg) = 206°C/W

Typical Tj calculation:

Ta = 25 °C

Vcc = 12 V

Icc = IccONtyp = 14.5 mA

PD = Vcc * Icc = 12 V * 14.5 mA = 174 mW

∆T = PD * Rθja = 174 mW * 206°C/W = 35.8 °C

Tj = Ta + ∆T = 25 °C + 35.8 °C = 60.8 °C

Maximum Allowable Power Dissipation

Calculation for A118X Family3:

Assume:

Ta = Tamax = 150 °C

Tj(max) = 170°C

Icc = IONmax = 17 mA

If:

Tj = Ta + ∆T

Then:

∆Tmax = Tjmax

– Tamax = 170 °C - 150 °C = 20 °C

If: ∆T = PD * Rθja

Then: PDmax = ∆Tmax / Rθja = 20 °C / 206 °C/W = 97.1

mW

If:

PD = Vcc * Icc

Then the maximum Vcc at 150°C is therefore:

Vccmax = PDmax / Icc = 97.1 mW / 17 mA = 5.7 V

Maximum Supply Voltage vs Ambient Temperature

0

5

10

15

20

25

30

0 25 50 75 100 125 150

Temperature (°C)

Maximum Supply

Voltage (V)

UA (ROJA = 206°C/W)

LH (ROJA = 228°C/W)

3 The “LH” PPD is based on a 0.062" thick FR4, single-sided board using 2 oz. copper, with a 0.55 mm2 area of copper attached to the ground lead.

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 9

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 10

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 11

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

TWO-WIRE, UNIPOLAR HALL-EFFECT SWITCH FAMILY

(PRELIMINARY INFORMATION – SUBJECT TO CHANGE)

Rev. 1.0 18Apr03

Page 12

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

The products described herein are manufactured under one or

more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283;

5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719;

5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.

Allegro MicroSystems, Inc. reserves the right to make, from time to

time, such departures from the detail specifications as may be

required to permit improvements in the performance, reliability, or

manufacturability of its products. Before placing an order, the user is

cautioned to verify that the information being relied upon is current.

Allegro products are not authorized for use as critical components

in life-support appliances, devices, or systems without express written approval.

The information included herein is believed to be accurate and

reliable. However, Allegro MicroSystems, Inc. assumes no responsibility

for its use; nor for any infringements of patents or other rights of

third parties that may result from its use.