LTC1150
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■
High Voltage Operation: ±16V
■
No External Components Required
■
Maximum Offset Voltage: 10µV
■
Maximum Offset Voltage Drift: 0.05µV/°C
■
Low Noise 1.8µV
P-P
(0.1Hz to 10Hz)
■
Minimum Voltage Gain: 135dB
■
Minimum PSRR: 120dB
■
Minimum CMRR: 110dB
■
Low Supply Current: 0.8mA
■
Single Supply Operation: 4.75V to 32V
■
Input Common Mode Range Includes Ground
■
200µA Supply Current with Pin 1 Grounded
■
Typical Overload Recovery Time 20ms
The LTC
®
1150 is a high-voltage, high-performance
zero-drift operational amplifier. The two sample-and-hold
capacitors usually required externally by other chopper
amplifiers are integrated on-chip. Further, LTC’s propri-
etary high-voltage CMOS structures allow the LTC1150 to
operate at up to 32V total supply voltage.
The LTC1150 has an offset voltage of 0.5µV, drift of
0.01µV/°C, 0.1Hz to 10Hz input noise voltage of 1.8µV
P-P
and a typical voltage gain of 180dB. The slew rate of 3V/µs
and a gain bandwidth product of 2.5MHz are achieved with
0.8mA of supply current. Overload recovery times from
positive and negative saturation conditions are 3ms and
20ms, respectively.
For applications demanding low power consumption,
Pin 1 can be used to program the supply current. Pin 5 is
an optional AC-coupled clock input, useful for
synchronization.
The LTC1150 is available in standard 8-lead, plastic dual-
in-line package, as well as an 8-lead SO package. The
LTC1150 can be a plug-in replacement for most standard
bipolar op amps with significant improvement in DC
performance.
±15V Zero-Drift
Operational Amplifier with
Internal Capacitors
Single Supply Instrumentation Amplifier Noise Spectrum
LTC1150 •TA01
V
OUT
V
IN
–V
IN
V
+
V
+
1M
1M
1k
1k
2
3
7
6
4
2
3
7
6
4
LTC1150
+
–
LTC1150
+
–
GAIN = 1000V/V
OUTPUT OFFSET ≤ 5mV
TOTAL SUPPLY CURRENT
DECREASES TO 400µA
WHEN BOTH PIN 1s ARE
GROUNDED
■
Strain Gauge Amplifiers
■
Electronic Scales
■
Medical Instrumentation
■
Thermocouple Amplifiers
■
High Resolution Data Acquisition
LTC1150 •TA02
FREQUENCY (Hz)
40
VOLTAGE NOISE DENSITY (nV√Hz)
80
100
140
160
10 1k 10k 100k
0
100
120
60
20
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTC1150
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1
2
3
4
8
7
6
5
TOP VIEW
ISUPPLY
–IN
+IN
V–
CLOCK OUT
V+
OUT
N8 PACKAGE
8-LEAD PDIP
J8 PACKAGE
8-LEAD CERDIP
EXT CLOCK
IN
EXT CLOCK
IN
1
2
3
4
8
7
6
5
TOP VIEW
CLOCK OUT
V+
OUT
ISUPPLY
–IN
+IN
V–
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 110°C, θJA = 200°C/W
+
–
ORDER PART
NUMBER
LTC1150CN8
ORDER PART
NUMBER
LTC1150CS8
1150
S8 PART
MARKING
TJMAX = 110°C, θJA = 130°C/W
LTC1150MJ8
LTC1150CJ8
Total Supply Voltage (V
+
to V
–
)............................... 32V
Input Voltage (Note 2) .............. (V
+
0.3V) to (V
–
–0.3V)
Output Short Circuit Duration .......................... Indefinite
Burn-In Voltage ....................................................... 32V
Consult LTC Marketing for parts specified with wider operating temperature ranges.
(Note 1)
LTC1150M LTC1150C
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage (Note 3) ±0.5 ±10 ±0.5 ±10 µV
Average Input Offset Drift (Note 3) ●±0.01 ±0.05 ±0.01 ±0.05 µV/°C
Long Term Offset Voltage Drift 50 50 nV/√mo
Input Offset Current ±20 ±60 ±20 ±200 pA
●±1.5 ±0.5 nA
Input Bias Current ±10 ±50 ±10 ±100 pA
●±2.5 ±1.0 nA
Input Noise Voltage RS = 100Ω, 0.1Hz to 10Hz, TC2 1.8 1.8 µVP-P
RS = 100Ω, 0.1Hz to 1Hz, TC2 0.6 0.6
Input Noise Current f = 10Hz (Note 4) 1.8 1.8 fA/√Hz
Common Mode Rejection Ratio VCM = V– to 12V ●110 130 110 130 dB
Power Supply Rejection Ratio VS = ±2.375V to ±16V ●120 145 120 145 dB
Large-Signal Voltage Gain RL = 10kΩ, VOUT = ±10V ●135 180 135 180 dB
Maximum Output Voltage Swing RL = 10kΩ±13.5 ±14.5 ±13.5 ±14.5 V
RL = 10kΩ●10.5/ 10.5/
–13.5 –13.5
RL = 100kΩ±14.95 ±14.95
The ● denotes the specifications which apply over the full operating
temperature range otherwise specifications are at TA = 25°C. VS = ±15V, Pin 1 = Open, unless otherwise noted.
Operating Temperature Range
LTC1150M (OBSOLETE).....................–55°C to 125°C
LTC1150C .......................................... –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
OBSOLETE PACKAGE
Consider the N8 or S8 Package as an Alternate Source
ABSOLUTE AXI U RATI GS
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PACKAGE/ORDER I FOR ATIO
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ELECTRICAL CHARACTERISTICS
LTC1150
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LTC1150M LTC1150C
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage (Note 3) ±0.5 ±10 ±0.05 ±10 µV
Average Input Offset Drift (Note 3) ●±0.01 ±0.05 ±0.01 ±0.05 µV/°C
Long Term Offset Voltage Drift 50 50 µV/√mo
Input Offset Current ±10 ±60 ±10 ±60 pA
Input Bias Current ±5±30 ±5±30 pA
Input Noise Voltage RS = 100Ω, 0.1Hz to 10Hz, TC2 2.0 2.0 µVP-P
RS = 100Ω, 0.1Hz to 1Hz, TC2 0.7 0.7
Input Noise Current f = 10Hz (Note 4) 1.3 1.3 fA/√Hz
Common Mode Rejection Ratio VCM = 0V to 2.7V ●106 130 106 130 dB
Power Supply Rejection Ratio VS = ±2.375V to ±16V ●120 145 120 145 dB
Large-Signal Voltage Gain RL = 10kΩ, VOUT = 0.3V to 4.5V ●115 180 115 180 dB
Maximum Output Voltage Swing RL = 10kΩ0.15 to 4.85 0.15 to 4.85 V
RL = 100kΩ0.02 to 4.97 0.02 to 4.97
Slew Rate RL = 10kΩ, CL = 50pF 1.5 1.5 V/µs
Gain Bandwidth Product 1.8 1.8 MHz
Supply Current No Load 0.4 1 0.4 1 mA
●1.5 1.5
Internal Sampling Frequency 300 300 Hz
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, Pin 1 = Open, unless otherwise noted.
LTC1150M LTC1150C
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Slew Rate RL = 10kΩ, CL = 50pF 3 3 V/µs
Gain Bandwidth Product 2.5 2.5 MHz
Supply Current No Load 0.8 1.5 0.8 1.5 mA
No Load, Pin 1 = V–0.2 0.2
No Load ●22
Internal Sampling Frequency 550 550 Hz
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 5V, Pin 1 = Open, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which life of
the device may be impaired.
Note 2: Connecting any terminal to voltages greater than V
+
or less than
V
–
may cause destructive latch-up. It is recommended that no sources
operating from external supplies be applied prior to power-up of the
LTC1150.
Note 3: These parameters are guaranteed by design. Thermocouple effects
preclude measurement of these voltage levels in high-speed automatic test
systems. V
OS
is measured to a limit determined by test equipment
capability.
Note 4: Current Noise is calculated from the formula:
I
N
= √(2q • I
b
)
where q = 1.6 • 10
–19
Coulomb.
LTC1150
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Offset Voltage Test Circuit DC-10Hz Noise Test Circuit
Supply Current vs Supply Voltage
Gain/Phase vs FrequencySupply Current vs RSET
Output Short-Circuit Current vs
Supply Voltage
Gain/Phase vs FrequencySupply Current vs Temperature
LTC1150 • TPC01
TOTAL SUPPLY VOLTAGE, V
+
TO V
–
(V)
4
SUPPLY CURRENT (µA)
600
800
36
400
200 12 20 28
816 24 32
1000
500
700
300
900
T
A
= 25°C
LTC1150 • TPC02
SUPPLY CURRENT (µA)
AMBIENT TEMPERATURE (°C)
–55
200
400
600
800
1000
1400
–25 53565
95 125
1200
V
S
= ± 15V
LTC1150 • TPC03
FREQUENCY (Hz)
0
GAIN (dB)
PHASE (DEGREES)
20
60
100
120
100 10k 100k 10M
–20
1k 1M
80
40
–40
180
160
120
80
60
200
100
140
220
V
S
= ± 15V
C
L
= 100pF
PHASE
GAIN
LTC1150 • TPC05
SUPPLY CURRENT (µA)
R
SET
, PIN 1 TO V
–
(Ω)
1k
0
800
1000
1200
10k 100k 1M
600
400
200
V
S
= ± 15V
T
A
= 25°C
LTC1150 •TC01
RL
1M
1k
V–
V+
2
3
7
6OUTPUT
4
LTC1150
+
–
LTC1150 •TC02
100k
475k
TO X-Y
RECORDER
475k
FOR 1Hz NOISE BW, INCREASE ALL THE CAPACITORS BY A FACTOR OF 10
316k
0.1µF 0.1µF
0.1µF
158k
10Ω
LTC1150
+
–
LT1012
+
–
LTC1150 • TPC04
TOTAL SUPPLY VOLTAGE, V
+
TO V
–
(V)
4
SHORT-CIRCIUT OUTPUT CURRENT, I
OUT
(mA)
2
36
–9
–15 12 20 28
816 24 32
6
–6
–3
0
–12
4
T
A
= 25°C
V
OUT
= V
+
I
SINK
V
OUT
= V
–
I
SOURCE
PIN 1 = OPEN
PIN 1 = V
–
PIN 1 = V
–
PIN 1 = OPEN
LTC1150 • TPC06
FREQUENCY (Hz)
0
GAIN (dB)
PHASE (DEGREES)
20
60
100
120
100 10k 100k 10M
–20
1k 1M
80
40
–40
180
160
120
80
60
200
100
140
220
VS = ± 15V
CL = 100pF
PIN 1 = –15V
PHASE
GAIN
TEST CIRCUITS
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LTC1150
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LTC1150 • TPC13
FREQUENCY (Hz)
40
CMRR (dB)
60
100
140
160
1 100 1k 100k
20
10 10k
120
80
0
LTC1150 • TPC14
FREQUENCY (Hz)
40
PSRR (dB)
60
100
140
160
1 100 1k 100k
20
10 10k
120
80
0
NEGATIVE SUPPLY, PIN 1 = V
–
POSITIVE SUPPLY, PIN 1 = OPEN
NEGATIVE SUPPLY,
PIN 1 = OPEN
POSITIVE SUPPLY,
PIN 1 = V
–
LTC1150 • TPC15
SAMPLING FREQUENCY, f
S
(Hz)
0
0
OFFSET VOLTAGE (µV)
2
4
6
1k 2k
8
10
3k
PIN 1 = V
–
PIN 1 = OPEN
V
A
= ± 15V
T
A
= 25°C
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Input Bias Current vs Supply
Voltage Gain/Phase vs Frequency
Undistorted Output Swing vs
Frequency
LTC1150 • TPC07
SUPPLY VOLTAGE (V)
0
0
INPUT BIAS CURRENT (pA)
2
4
6
8
±4±8±12 ±16
10
12
±2±6±10 ±14
T
A
= 25°C
V
CM
= OV
LTC1150 • TPC08
FREQUENCY (Hz)
10
OUTPUT VOLTAGE (Vp-p)
20
30
5
15
25
100 10k 100k 1M
0
1k
PIN 1 = V
–
R
L
= 10k
PIN 1 = FLOATING
R
L
= 100k
Input Bias Current vs Input
Common Mode Voltage Input Bias Current vs Temperature
Common Mode Input Range vs
Supply Voltage
CMRR vs Frequency PSRR vs Frequency
Offset Voltage vs
Sampling Frequency
LTC1150 • TPC09
FREQUENCY (Hz)
0
GAIN (dB)
PHASE (DEGREES)
20
60
100
120
100 10k 100k 10M
–20
1k 1M
80
40
–40
180
160
120
80
60
200
100
140
220
V
S
= ±2.5V
C
L
= 100pF
PHASE
GAIN
LTC1150 • TPC10
INPUT COMMON MODE VOLTAGE (V)
–15 –10 –5
INPUT BIAS CURRENT (pA)
–10
0
10
010
–20
–30
–40 5
20
30
40
15
VS = ± 15V
TA = 25°C
+IB
–IB
LTC1150 • TPC11
INPUT BIAS CURRENT (pA)
TEMPERATURE (°C)
–50 –25
–10
–100
–1000
0255075100 125
–1
+IB
–IB
VCM = 0
VS = ± 15V
LTC1150 • TPC12
SUPPLY VOLTAGE (V)
0
–15
COMMON MODE RANGE (V)
–10
–5
0
5
15
±2.5 ±5±7.5 ±10 ±12.5 ±15
10
T
A
= 25°C
LTC1150
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Offset Voltage Drift vs Sampling
Frequency
Sampling Frequency vs
Temperature
10Hz p-p Noise vs Sampling
Frequency
LTC1150 • TPC18
AMBIENT TEMPERATURE (°C)
–55
300
SAMPLING FREQUENCY (Hz)
400
500
600
700
900
–25 53565
95 125
800
V
S
= ± 15V
Large-Signal Transient Response
V
S
= ±15V, A
V
= 1, C
L
= 100pF, R
L
= 10kΩ
Large-Signal Transient Response,
Pin 1 = V–
V
S
= ±15V, A
V
= 1, C
L
= 100pF, PIN 1 = V
–
Small-Signal Transient Response
V
S
= ±15V, A
V
= 1, C
L
= 100pF, R
L
= 10kΩ
Small-Signal Transient Response,
Pin 1 = V–
V
S
= ±15V, A
V
= 1, C
L
= 100pF, R
L
= 10kΩ,
PIN 1 = V
–
Overload Recovery from Negative
Saturation
V
S
= ±15V, A
V
= –100, 2ms/DIV
Overload Recovery from Positive
Saturation
V
S
= ±15V, A
V
= –100, 2ms/DIV
LTC1150 • TPC16
SAMPLING FREQUENCY, fS (Hz)
OFFSET VOLTAGE DRIFT (nV/C°)
100
0
20
40
60
80
1k 10k
100
10
30
50
70
90 VS = ± 15V
PIN 1 = OPEN
LTC1150 • TPC17
SAMPLING FREQUENCY, fS (Hz)
10Hz PEAK-TO-PEAK NOISE (µV)
100
0
1
2
4
1k 10k
3
VS = ± 15V
TA = 25°C
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LTC1150
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0.1Hz to 10Hz Noise, V = ±15V, TA = 25°C, Internal Clock
LTC1150 • TPC25
1s
1µV
10s
2.0µV
P-P
0.1Hz to 10Hz Noise, V = ±15V, TA = 25°C, fS = 1800Hz
LTC1150 • TPC26
1s
1µV
10s
1.0µV
P-P
0.1Hz to 1Hz Noise, V = ±15V, TA = 25°C, Internal Clock
LTC1150 • TPC27
10s
500nV
100s
700nV
P-P
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LTC1150
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0.1Hz to 1Hz Noise, V = ±15V, TA = 25°C, fS = 1800Hz
LTC1150 • TPC28
10s
500nV
100s
300nV
P-P
I
SUPPLY
(Pin 1): Supply Current Programming. The sup-
ply current can be programmed through Pin 1. When
Pin 1 is left open or tied to V
+
, the supply current defaults
to 800µA. Tying a resistor between Pin 1 and Pin 4, the
negative supply pin, will reduce the supply current. The
supply current, as a function of the resistor value, is
shown in Typical Performance Characteristics.
–IN (Pin 2): Inverting Input.
+IN (Pin 3): Noninverting Input.
V
–
(Pin 4): Negative Supply.
EXT CLOCK IN (Pin 5): Optional External Clock Input. The
LTC1150 has an internal oscillator to control the circuit
operation of the amplifier if Pin 5 is left open or biased at
any DC voltage in the supply voltage range. When an
external clock is desirable, it can be applied to Pin 5. The
applied clock is AC-coupled to the internal circuitry to
simplified interface requirements. The amplitude of the
clock input signal needs to be greater than 2V and the
voltage level has to be within the supply voltage range.
Duty cycle is not critical. The internal chopping frequency
is the external clock frequency divided by four. When
frequency of the external clock falls below 100Hz (internal
chopping at 25Hz), the internal oscillator takes over and
the circuit chops at 550Hz.
OUT (Pin 6): Output.
V
+
(Pin 7): Positive Supply.
CLOCK OUT (Pin 8): Clock Output. The signal coming out
of this pin is at the internal oscillator frequency of about
2.2kHz (four times the chopping frequency) and has
voltage levels at V
H
= V
S
and V
L
= V
S
–4.6. If the circuit is
driven by an external clock, Pin 8 is pulled up to V
S
.
8-Pin Packages
TYPICAL PERFOR A CE CHARACTERISTICS
UW
PI DESCRIPTIO S
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LTC1150
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ACHIEVING PICOAMPERE/MICROVOLT
PERFORMANCE
Picoamperes
In order to realize the picoampere level of accuracy of the
LTC1150, proper care must be exercised. Leakage cur-
rents in circuitry external to the amplifier can significantly
degrade performance. High quality insulation should be
used (e.g., Teflon, Kel-F); cleaning of all insulating sur-
faces to remove fluxes and other residues will probably
be necessary–particularly for high temperature perfor-
mance. Surface coating may be necessary to provide a
moisture barrier in high humidity environments.
Board leakage can be minimized by encircling the input
connections with a guard ring operated at a potential
close to that of the inputs: in inverting configurations the
guard ring should be tied to ground; in noninverting
connections to the inverting input. Guarding both sides
of the printed circuit board is required. Bulk leakage
reduction depends on the guard ring width.
Microvolts
Thermocouple effects must be considered if the LTC1150’s
ultralow drift is to be fully utilized. Any connection of
dissimilar metals forms a thermoelectric junction produc-
ing an electric potential which varies with temperature
(Seebeck effect). As temperature sensors, thermocouples
exploit this phenomenon to produce useful information.
In low drift amplifier circuits the effect is a primary source
of error.
Connectors, switches, relay contacts, sockets, resistors,
solder, and even copper wire are all candidates for
thermal EMF generation. Junctions of copper wire from
different manufacturers can generate thermal EMFs of
200nV/°C—four times the maximum drift specification
of the LTC1150. The copper/kovar junction, formed when
wire or printed circuit traces contact a package lead, has
a thermal EMF of approximately 35µV/°C—700 times the
maximum drift specification of the LTC1150.
Minimizing thermal EMF-induced errors is possible if
judicious attention is given to circuit board layout and
component selection. It is good practice to minimize the
number of junctions in the amplifier’s input signal path.
Avoid connectors, sockets, switches, and relays where
possible. In instances where this is not possible, attempt
to balance the number and type of junctions so that
differential cancellation occurs. Doing this may involve
deliberately introducing junctions to offset unavoidable
junctions.
Figure 1 is an example of the introduction of an unneces-
sary resistor to promote differential thermal balance.
Maintaining compensating junctions in close physical
proximity will keep them at the same temperature and
reduce thermal EMF errors.
LTC1150 •AI01
OUTPUT
NOMINALLY UNNECESSARY
RESISTOR USED TO
THERMALLY BALANCE
OTHER INPUT RESISTOR
RESISTOR LEAD, SOLDER,
COPPER TRACE JUNCTION
LEAD WIRE/SOLDER
COPPER TRACE JUNCTION
LTC1150
+
–
Figure 1. Extra Resistors Cancel Thermal EMF
When connectors, switches, relays and/or sockets are
necessary, they should be selected for low thermal EMF
activity. The same techniques of thermally-balancing and
coupling the matching junctions are effective in reducing
the thermal EMF errors of these components.
Resistors are another source of thermal EMF errors.
Table 1 shows the thermal EMF generated for different
resistors. The temperature gradient across the resistor is
important, not the ambient temperature. There are two
junctions formed at each end of the resistor and if these
junctions are at the same temperature, their thermal EMFs
will cancel each other. The thermal EMF numbers are
approximate and vary with resistor value. High values give
higher thermal EMF.
APPLICATIO S I FOR ATIO
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LTC1150
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Table 1. Resistor Thermal EMF
RESISTOR TYPE THERMAL EMF/°C GRADIENT
Tin Oxide ~mV/°C
Carbon Composition ~450µV/°C
Metal Film ~20µV/°C
WireWound
Evenohm ~2µV/°C
Manganin ~2µV/°C
PACKAGE-INDUCED OFFSET VOLTAGE
Package-induced thermal EMF effects are another impor-
tant source of errors. It arises at the copper/kovar
junctions formed when wire or printed circuit traces
contact a package lead. Like all the previously mentioned
thermal EMF effects, it is outside the LTC1150’s offset
nulling loop and cannot be cancelled. Metal can
H packages exhibit the worst warm-up drift. The input
offset voltage specification of the LTC1150 is actually set
by the package-induced warm-up drift rather than by the
circuit itself. The thermal time constant ranges from 0.5 to
3 minutes, depending on package type.
ALIASING
Like all sampled data systems, the LTC1150 exhibits
aliasing behavior at input frequencies near the sampling
frequency. The LTC1150 includes a high-frequency
correction loop which minimizes this effect; as a result,
aliasing is not a problem for most applications.
For a complete discussion of the correction circuitry and
aliasing behavior, please refer to the LTC1051/53 data
sheet.
SYNCHRONIZATION OF MULTIPLE LTC115O’S
When synchronization of several LTC1150’s is required,
one of the LTC1150’s can be used to provide the “master”
clock to control over 100 “slave” LTC1150’s. The master
clock, coming from Pin 8 of the master LTC1150, can
directly drive Pin 5 of the slaves. Note that Pin 8 of the slave
LTC1150’s will be pulled up to V
S.
If all the LTC1150’s are to be synchronized with an external
clock, then the external clock should drive Pin 5 of all the
LTC1150’s.
LEVEL SHIFTING THE CLOCK
Level shifting is needed if the clock output of the LTC1150
in ±15V operation must interface to regular 5V logic
circuits. Figures 2 and 3 show some typical level shifting
circuits.
When operated from single 5V or ±5V supplies, the
LTC1150 clock output at Pin 8 can interface to TTL or
CMOS inputs directly.
LOW SUPPLY OPERATION
The minimum supply for proper operation of the LTC1150
is typically below 4.0V (±2.0V). In single supply applica-
tions, PSRR is guaranteed down to 4.7V (±2.35V)
to ensure proper operation down to the minimum TTL
specified voltage of 4.75V.
Figure 2. Output Level Shift (Option 1)
Figure 3. Output Level Shift (Option 2)
LTC1150 • AI02
10k
10k
15V
–15V
5V
2
3
7
86
4
LTC1150
+
–
LOGIC
CIRCUIT
LTC1150 • AI03
10k
100pF
GND
10k
15V
–15V
5V5V
2
3
7
86
4
LTC1150
+
–
LOGIC
CIRCUIT
APPLICATIO S I FOR ATIO
WUUU
LTC1150
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Low Level Photodetector
Ground Force Reference
LTC1150 • TA03
10k
OUTPUT = IP • 109Ω
10Ω
15pF
1M
HP 5082-4204 V+
IP
2
3
7
6
4
LTC1150
+
–
LTC1150 • TA04
SINGLE
POINT
SENSE
GROUND
2
3
7
6
4
LTC1150
+
–
15V
1000pF
–15V
15V
1k
–15V
LT1010
FORCED
GROUND
APPLICATION: TO FORCE TWO GROUND POINTS IN A SYSTEM WITHIN 5µV
TYPICAL APPLICATIO S
U
LTC1150
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Paralleling to Improve Noise
LTC1150 • TA05
10k
10k
10Ω
10k
10k 25k
10Ω
10k
10k
10k
10Ω
10k
10Ω
LTC1150
+
–
LTC1150
+
–
LTC1150
+
–
LTC1150
+
–
V
OUT
= 10k V
IN
IN
CLK IN
LTC1150
+
–
CLK
FREE
RUN
CLK
DRIVEN
1800Hz
MEASURED NOISE
10Hz = 700nV
P-P
1Hz = 200nV
P-P
V
OS
= 1.1µV
10Hz = 360nV
P-P
1Hz = 160nV
P-P
V
OS
= 10µV
Battery Discharge Monitor
LTC1150 • TA06
2
3
6
LTC1150
+
–
R2
OPEN AT t = 0
R1
LOAD
–IR1
R2C
VOUT = t
C
5µV
IR1
ERROR ≤ + 30pA
I
R2
R1
I
+
TYPICAL APPLICATIO S
U
LTC1150
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J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
OBSOLETE PACKAGE
J8 0801
.014 – .026
(0.360 – 0.660)
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.125
3.175
MIN
.100
(2.54)
BSC
.300 BSC
(7.62 BSC)
.008 – .018
(0.203 – 0.457) 0° – 15°
.005
(0.127)
MIN
.405
(10.287)
MAX
.220 – .310
(5.588 – 7.874)
1234
87
65
.025
(0.635)
RAD TYP
.045 – .068
(1.143 – 1.650)
FULL LEAD
OPTION
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
.045 – .065
(1.143 – 1.651)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
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PACKAGE DESCRIPTIO
LTC1150
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N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
N8 1002
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.130 ± .005
(3.302 ± 0.127)
.020
(0.508)
MIN
.018 ± .003
(0.457 ± 0.076)
.120
(3.048)
MIN
12 34
87 65
.255 ± .015*
(6.477 ± 0.381)
.400*
(10.160)
MAX
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
()
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
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PACKAGE DESCRIPTIO
LTC1150
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0502
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1
N
234
N/2
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN
N
123 N/2
.160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
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PACKAGE DESCRIPTIO
LTC1150
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
LW/TP 1202 1K REV B • PRINTED IN USA
LINEAR TE CHNO LOGY CORP O R ATION 1991
DC Stabilized, Low Noise Amplifier
LTC1150 • TA07
OUTPUT
INPUT
10k
10Ω
100k
15V
15V
15V
68Ω
130Ω
0.01µF
–15V
–15V
2
37
6
4
2
37
6
8
1
4
LTC1150
+
–
LT1028
+
–
(A = 1000)
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TYPICAL APPLICATIO
