Supertex inc.
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV2705
HV2706
Features
►HVCMOS technology for high performance
►Integrated bleed resistors on the outputs
►16-channel high voltage analog switch
►3.3V input logic level compatible
►20MHz data shift clock frequency
►Very low quiescent power dissipation (-10µA)
►Low parasitic capacitance
►DC to 50MHz small signal frequency response
►-60dB typical off-isolation at 5.0MHz
►CMOS logic circuitry for low power
►Low harmonic distortion
►Cascadable serial data register with latches
►Flexible operating supply voltages
Applications
►Medical ultrasound imaging
►NDT metal aw detection
►Piezoelectric transducer drivers
►Optical MEMS modules
General Description
The Supertex HV2705 and HV2706 are low charge injection,
16-channel, high voltage analog switch integrated circuits (ICs) with
bleed resistors. The devices can be used in applications requiring
high voltage switching controlled by low voltage control signals, such
as medical ultrasound imaging and piezoelectric transducer drivers.
The bleed resistors eliminate voltage build-up on capacitive loads
such as piezoelectric transducers. The HV2706 has a different pin
conguration than the HV2705.
Input data are shifted into a 16-bit shift register that can then be
retained in a 16-bit latch. To reduce any possible clock feed-through
noise, the latch enable bar should be left high until all bits are clocked
in. Data are clocked in during the rising edge of the clock. Using
HVCMOS technology, this device combines high voltage bilateral
DMOS switches and low power CMOS logic to provide efcient
control of high voltage analog signals.
The device is suitable for various combinations of high voltage
supplies, e.g., VPP/VNN: +40V/-160V, +100V/-100V, and +160V/-40V.
Block Diagram
Low Harmonic Distortion, 16-Channel,
High Voltage, Analog Switches
with Bleed Resistors
D
LE
CLR
Latches
Level
Shifters
Output
Switches
SW0
SW1
SW2
SW14
SW15
16-Bit
Shift
Register
RGNDVPPVNN
CLRLE
VDD GND
D
LE
CLR
D
LE
CLR
D
LE
CLR
D
LE
CLR
DOUT
CLK
DIN
2
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV2705
HV2706
Absolute Maximum Ratings
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. Continuous operation of the device at
the absolute rating level may affect device reliability. All voltages are referenced to device ground.
Parameter Value
VDD Logic supply -0.5V to +7.0V
VPP-VNN differential supply 220V
VPP Positive supply -0.5V to VNN+200V
VNN Negative supply +0.5V to -200V
Logic input voltage -0.5V to VDD +0.3V
Analog signal range VNN to VPP
Peak analog signal current/channel 3.0A
Storage temperature -65°C to 150°C
Power dissipation: 48-Lead LQFP (FG) 1.0W
Sym Parameter Value
VDD Logic power supply voltage 3.0V to 5.5V
VPP Positive high voltage supply +40V to VNN +200V
VNN Negative high voltage supply -40V to -160V
VIH High level input voltage 0.9VDD to VDD
VIL Low level input voltage 0V to 0.1VDD
VSIG
Analog signal voltage
peak-to-peak VNN+10V to VPP-10V
TAOperating free air temperature 0°C to 70°C
Recommended Operating Conditions
Notes:
1. Power up/down sequence is arbitrary except GND must be powered-up rst and powered-down last.
2. VSIG must be within VNN and VPP or oating during power up/down transition.
3. Rise and fall times of power supplies VDD, VPP
, and VNN should not be less than 1.0msec.
Product Marking
Pin Conguration
48-Lead LQFP (FG)
(top view)
1
48
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Top Marking
Bottom Marking
YYWW
HV2705FG
LLLLLLLLL
CCCCCCCC
AAA
48-Lead LQFP (FG)
Package may or may not include the following marks: Si or
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Top Marking
Bottom Marking
YYWW
HV2706FG
LLLLLLLLL
CCCCCCCC
AAA
48-Lead LQFP (FG)
Package may or may not include the following marks: Si or
-G indicates package is RoHS compliant (‘Green’).
Ordering Information / Availability
Part Number Package Option Packing
HV2705FG-G 48-Lead LQFP 250/Tray
HV2705FG-G M931 48-Lead LQFP 1000/Reel
HV2706FG-G 48-Lead LQFP 250/Tray
HV2706FG-G M931 48-Lead LQFP 1000/Reel
3
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV2705
HV2706
Sym Parameter
0°C +25°C +70°C
Units Conditions
Min Max Min Typ Max Min Max
RONS
Small signal switch
on-resistance
- 30 - 26 38 - 48
Ω
ISIG = 5.0mA VPP = +40V
VNN = -160V
- 25 - 22 27 - 32 ISIG = 200mA
- 25 - 22 27 - 30 ISIG = 5.0mA VPP = +100V
VNN = -100V
- 18 - 18 24 - 27 ISIG = 200mA
- 23 - 20 25 - 30 ISIG = 5.0mA VPP = +160V
VNN = -40V
- 22 - 16 25 - 27 ISIG = 200mA
∆RONS
Small signal switch
on-resistance matching - 20 - 5.0 20 - 20 % ISIG = 5.0mA, VPP = +100V,
VNN = -100V
RONL
Large signal switch
on-resistance - - - 15 - - - ΩVSIG= VPP -10V, ISIG = 1.0A
RINT Value of output bleed resistor - - 20 35 50 - - kΩ Output Switch to RGND
IRINT = 0.5mA
ISOL
Switch off leakage per
switch* - 5.0 - 1.0 10 - 15 µA VSIG = VPP -10V and VNN +10V
VOS
DC offset switch off* - 300 - 100 300 - 300 mV No Load
DC offset switch on* - 500 - 100 500 - 500 mV
IPPQ Quiescent VPP supply current - - - 10 50 - - µA All switches off
INNQ Quiescent VNN supply current - - - -10 -50 - - µA All switches off
IPPQ Quiescent VPP supply current - - - 10 50 - - µA All switches on, ISW = 5.0mA
INNQ Quiescent VNN supply current - - - -10 -50 - - µA All switches on, ISW = 5.0mA
ISW Switch output peak current - 3.0 - 3.0 2.0 - 2.0 A VSIG duty cycle < 0.1%
fSW Output switching frequency - - - - 50 - - kHz Duty cycle = 50%
IPP Average VPP supply current
- 6.5 - - 7.0 - 8.0
mA
VPP = +40V
VNN = -160V
All output
switches are
turning ON
and OFF at
50kHz with
no load.
VPP = +100V
VNN = -100V
- 4.0 - - 5.5 - 5.5
VPP = +160V
VNN = -40V
- 4.0 - - 5.0 - 5.5
INN Average VNN supply current
- 6.5 - - 7.0 - 8.0
mA
VPP = +40V
VNN = -160V
VPP = +100V
VNN = -100V
- 4.0 - - 5.0 - 5.5
VPP = +160V
VNN= -40V
- 4.0 - - 5.0 - 5.5
IDD Average VDD supply current - 4.0 - - 4.0 - 4.0 mA fCLK = 5.0MHz, VDD = 5.0V
IDDQ Quiescent VDD supply current - 10 - - 10 - 10 µA All logic inputs are static
ISOR Data out source current 0.45 - 0.45 0.70 - 0.40 - mA VOUT = VDD-0.7V
ISINK Data out sink current 0.45 - 0.45 0.70 - 0.40 - mA VOUT = 0.7V
CIN Logic input capacitance - 10 - - 10 - 10 pF ---
DC Electrical Characteristics
(over recommended operating conditions unless otherwise noted)
* See Test Circuits on page 5
4
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV2705
HV2706
AC Electrical Characteristics
(over recommended operating conditions, VDD= 5.0V, tR = tF ≤ 5.0ns, 50% duty cycle, CLOAD = 20pF, unless otherwise noted)
Sym Parameter 0°C +25°C +70°C Units Conditions
Min Max Min Typ Max Min Max
tSD Set up time before LE rises 25 - 25 - - 25 - ns ---
tWLE Time width of LE 56 - - 56 - 56 - ns VDD = 3.0V
12 - - 12 - 12 - VDD = 5.0V
tDO Clock delay time to data out 50 100 50 78 100 50 100 ns VDD = 3.0V
15 40 15 30 40 15 40 VDD= 5.0V
tWCLR Time width of CLR 55 - 55 - - 55 - ns ---
tSU Set up time data to clock 21 - - 21 - 21 - ns VDD= 3.0V
7.0 - - 7.0 - 7.0 - VDD= 5.0V
tHHold time data from clock 2.0 - 2.0 - - 2.0 - ns VDD= 3.0 or 5.0V
fCLK Clock frequency - 8.0 - - 8.0 - 8.0
MHz
VDD= 3.0V
- 20 - - 20 - 20 VDD= 5.0V
tR,tFClock rise and fall times - 50 - - 50 - 50 ns ----
TON Turn ON time* - 5.0 - - 5.0 - 5.0 µs VSIG = VPP -10V, RLOAD = 10kΩ
TOFF Turn OFF time* - 5.0 - - 5.0 - 5.0 µs VSIG = VPP -10V, RLOAD = 10kΩ
dv/dt Maximum VSIG slew rate
- 20 - - 20 - 20
v/ns
VPP = +40V, VNN = -160V
- 20 - - 20 - 20 VPP = +100V, VNN = -100V
- 20 - - 20 - 20 VPP = +160V, VNN = -40V
KOOff isolation* -30 - -30 -33 - -30 - dB f = 5.0MHz, 1kΩ//15pF load
-58 - -58 - - -58 - f = 5.0MHz, 50Ω load
KCR Switch crosstalk* -60 - -60 -70 - -60 - dB f = 5.0MHz, 50Ω load
IID
Output switch isolation
diode current - 300 - - 300 - 300 mA 300ns pulse width,
2.0% duty cycle
CSG(OFF) Off capacitance SW to GND - 15 - 10 15 - 15 pF 0V, f = 1.0MHz
CSG(ON) On capacitance SW to GND - 18 - 13 18 - 18 pF 0V, f = 1.0MHz
+VSPK
Output voltage spike*
- - - - 150 - -
mV
VPP = +40V, VNN = -160V,
RLOAD = 50Ω
-VSPK
+VSPK - - - - 150 - - VPP = +100V, VNN = -100V,
RLOAD = 50Ω
-VSPK
+VSPK - - - - 150 - - VPP = +160V, VNN = -40V,
RLOAD = 50Ω
-VSPK
QC Charge injection*
- - - 820 - - -
pC
VPP= +40V, VNN= -160V,
VSIG= 0V
- - - 600 - - - VPP= +100V, VNN= -100V,
VSIG= 0V
- - - 350 - - - VPP= +160V, VNN= -40V,
VSIG= 0V
* See Test Circuits on page 5
5
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV2705
HV2706
HV2705/HV2706 Test Circuits
DC Offset Switch
ON/OFF
V
PP 5V
VNN
VPP
VNN
VDD
GND
VOUT
T
ON
/T
OFF
Test Circuit
5V
GND
V
PP -10V
VOUT
Output Switch
Isolation Diode Current
I
ID
5V
GND
VNN
VSIG
Switch Crosstalk
V
IN = 10VP-P
@5MHz
NC
5V
GND
50Ω
Output Voltage Spike
5V
GND
V
OUT
1kΩ
RLOAD 50Ω
+VSPK
–VSPK
OFF Isolation
K
O = 20Log VOUT
VIN
VIN = 10VP-P
@5MHz
5V
GND
VOUT 50Ω
RLOAD
RLOAD
10kΩ
VPP
VNN
VPP
VNN
VDD
VPP
VNN
VPP
VNN
VDD
VPP
VNN
VPP
VNN
VDD
VPP
VNN
VPP
VNN
VDD
VPP
VNN
VPP
VNN
VDD
KCR = 20Log VOUT
VIN
V
PP
-10V
Switch Off Leakage
per Switch
(for HV2705 only)
RGND
Open
Q = 1000pF x ΔV
OUT
Charge Injection
5V
GND
V
PP
V
NN
VPP
VNN
VDD
VPP 5V
VNN
VPP
VNN
VDD
Open
I
SOL
GND
VOUT
ΔVOUT
1000pF
RGND
RGND
RGND
RGND
RGND
RGND
RGND
V
SIG
6
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV2705
HV2706
Logic Function Table
Notes:
1. The 16 switches operate independently.
2. Serial data is clocked in on the L to H transition of the CLK.
3. All 16 switches go to a state retaining their latched condition at the rising edge of LE. When LE is low the shift registers data ow through the
latch.
4. DOUT is high when data in the shift register 15 is high.
5. Shift registers clocking has no effect on the switch states if LE is high.
6. The CLR clear input overrides all other inputs.
Logic Timing Waveforms
DATA IN
DIN
LE
CLOCK
CLK
DATA OUT
DOUT
OFF
ON
V
OUT
(typ)
50% 50%
50% 50%
t
WLE
t
SD
t
SU
t
h
50%
50%
t
OFF
50%
t
DO
DOUT
t
ON
t
WCL
CLR
D
N+1
D
N
D
N-1
50% 50%
90%
10%
D0 D1 ... D7 D8 ... D15 LE CLR SW0 SW1 ... SW7 SW8 ... SW15
L -
...
- -
...
- L L OFF -
...
- -
...
-
H - - - - L L ON - - - -
- L - - - L L - OFF - - -
- H - - - L L - ON - - -
- - - - - L L - - - - -
- - - - - L L - - - - -
- - L - - L L - - OFF - -
- - H - - L L - - ON - -
- - - L - L L - - - OFF -
- - - H - L L - - - ON -
- - - - - L L - - - - -
- - - - - L L - - - - -
- - - - - L L - - - - -
- - - - - L L - - - - -
- - - - L L L - - - - OFF
- - - - H L L - - - - ON
X X X X X X X H L HOLD PREVIOUS STATE
X X X X X X X X H ALL SWITCHES OFF
7
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV2705
HV2706
HV2705 Pin Description
48-Lead LQFP (FG)
Pin # Function
1 NC
2 NC
3 SW4B
4 SW4A
5 SW3B
6 SW3A
7 SW2B
8 SW2A
9 SW1B
10 SW1A
11 SW0B
12 SW0A
Pin # Function
13 VNN
14 NC
15 VPP
16 NC
17 GND
18 VDD
19 DIN
20 CLK
21 LE
22 CLR
23 DOUT
24 RGND
Pin # Function
25 SW15B
26 SW15A
27 SW14B
28 SW14A
29 SW13B
30 SW13A
31 SW12B
32 SW12A
33 SW11B
34 SW11A
35 NC
36 NC
Pin # Function
37 SW10B
38 SW10A
39 SW9B
40 SW9A
41 SW8B
42 SW8A
43 SW7B
44 SW7A
45 SW6B
46 SW6A
47 SW5B
48 SW5A
HV2706 Pin Description
48-Lead LQFP (FG)
Pin # Function
1 NC
2 NC
3 SW4B
4 SW4A
5 SW3B
6 SW3A
7 SW2B
8 SW2A
9 SW1B
10 SW1A
11 SW0B
12 SW0A
Pin # Function
13 VNN
14 NC
15 VPP
16 NC
17 GND, RGND
18 VDD
19 DIN
20 CLK
21 LE
22 CLR
23 DOUT
24 NC
Pin # Function
25 SW15B
26 SW15A
27 SW14B
28 SW14A
29 SW13B
30 SW13A
31 SW12B
32 SW12A
33 SW11B
34 SW11A
35 NC
36 NC
Pin # Function
37 SW10B
38 SW10A
39 SW9B
40 SW9A
41 SW8B
42 SW8A
43 SW7B
44 SW7A
45 SW6B
46 SW6A
47 SW5B
48 SW5A
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
©2012 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
8
(The package drawing(s) in this data sheet may not reect the most current specications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
HV2705
HV2706
Doc.# DSFP-HV2705_HV2706
B032912
48-Lead LQFP Package Outline (FG)
7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch
Symbol A A1 A2 b D D1 E E1 e L L1 L2 θ
Dimension
(mm)
MIN 1.40* 0.05 1.35 0.17 8.80* 6.80* 8.80* 6.80*
0.50
BSC
0.45
1.00
REF
0.25
BSC
0O
NOM - - 1.40 0.22 9.00 7.00 9.00 7.00 0.60 3.5O
MAX 1.60 0.15 1.45 0.27 9.20* 7.20* 9.20* 7.20* 0.75 7O
JEDEC Registration MS-026, Variation BBC, Issue D, Jan. 2001.
* This dimension is not specied in the JEDEC drawing.
Drawings are not to scale.
Supertex Doc. #: DSPD-48LQFPFG Version, D041309.
1
Seating
Plane
Gauge
Plane
θ
L
L1
L2
View B
View B
Seating
Plane
Top View
D
D1
E
E1
b e
Side View
A2
A
A1
Note 1
(Index Area
D1/4 x E1/4)
48
Note:
1. A Pin 1 identier must be located in the index area indicated. The Pin 1 identier can be: a molded mark/identier; an embedded metal marker; or
a printed indicator.
