© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 1
One world. One KEMET
Benets
-55°C to +125°C operating temperature range
Pb-Free and RoHS Compliant
Temperature stable dielectric
EIA 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825, 2220,
and 2225 case sizes
DC voltage ratings of 6.3 V, 10 V, 16 V, 25 V, 50 V, 100 V,
200 V, and 250 V
Capacitance offerings ranging from 10 pF to 47 μF
Available capacitance tolerances of ±5%, ±10%, and ±20%
Non-polar device, minimizing installation concerns
100% pure matte tin-plated termination nish allowing for
excellent solderability
SnPb termination nish option available upon request
(5% minimum)
Applications
Typical applications include decoupling, bypass, ltering and
transient voltage suppression.
Overview
KEMET’s X7R dielectric features a 125°C maximum operating
temperature and is considered “temperature stable.” The
Electronics Components, Assemblies & Materials Association
(EIA) characterizes X7R dielectric as a Class II material.
Components of this classication are xed, ceramic dielectric
capacitors suited for bypass and decoupling applications
or for frequency discriminating circuits where Q and stability
of capacitance characteristics are not critical. X7R exhibits a
predictable change in capacitance with respect to time and voltage
and boasts a minimal change in capacitance with reference to
ambient temperature. Capacitance change is limited to ±15% from
-55°C to +125°C.
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Ordering Information
C1206 C106 M 4 R A CTU
Ceramic Case Size
(L" x W")
Specication/
Series1Capacitance
Code (pF)
Capacitance
Tolerance Voltage Dielectric Failure Rate/
Design Termination Finish2Packaging/Grade
(C-Spec)3
0402
0603
0805
1206
1210
1808
1812
1825
2220
2225
C = Standard 2 Signicant
Digits + Number
of Zeros
J = ±5%
K = ±10%
M = ±20%
9 = 6.3 V
8 = 10 V
4 = 16 V
3 = 25 V
6 = 35 V
5 = 50 V
1 = 100 V
2 = 200 V
A = 250 V
R = X7R A = N/A C = 100% Matte Sn Blank = Bulk
TU = 7" Reel
Unmarked
TM = 7" Reel
Marked
1 Flexible termination option is available. Please see FT-CAP product bulletin C1013_X7R_FT-CAP_SMD.
2 Additional termination nish options may be available. Contact KEMET for details.
3 Additional reeling or packaging options may be available. Contact KEMET for details.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Dimensions – Millimeters (Inches)
Ceramic Surface Mount
WL
TB
S
100% Tin or SnPb Plate
Nickel Plate
Conductive Metalization
Electrodes
EIA
Size
Code
Metric
Size
Code
L
Length
W
Width
T
Thickness
B
Bandwidth
S
Separation
Minimum
Mounting
Technique
0402 1005 1.00 (.040) ±0.05 (.002) 0.50 (.020) ±0.05 (.002)
See Table 2
for Thickness
0.30 (.012) ±0.10 (.004) 0.30 (.012) Solder Reow Only
0603 1608 1.60 (.063) ±0.15 (.006) 0.80 (.032) ±0.15 (.006) 0.35 (.014) ±0.15 (.006) 0.70 (.028) Solder Wave or
Solder Reow
0805 2012 2.00 (.079) ±0.20 (.008) 1.25 (.049) ±0.20 (.008) 0.50 (0.02) ±0.25 (.010) 0.75 (.030)
1206 3216 3.20 (.126) ±0.20 (.008) 1.60 (.063) ±0.20 (.008) 0.50 (0.02) ±0.25 (.010)
N/A
1210 3225 3.20 (.126) ±0.20 (.008) 2.50 (.098) ±0.20 (.008) 0.50 (0.02) ±0.25 (.010)
Solder Reow Only
1808 4520 4.70 (.185) ±0.50 (.020) 2.00 (.079) ±0.20 (.008) 0.60 (.024) ±0.35 (.014)
1812 4532 4.50 (.177) ±0.30 (.012) 3.20 (.126) ±0.30 (.012) 0.60 (.024) ±0.35 (.014)
1825 4564 4.50 (.177) ±0.30 (.012) 6.40 (.252) ±0.40 (.016) 0.60 (.024) ±0.35 (.014)
2220 5650 5.70 (.224) ±0.40 (.016) 5.00 (.197) ±0.40 (.016) 0.60 (.024) ±0.35 (.014)
2225 5664 5.60 (.220) ±0.40 (.016) 6.40 (.248) ±0.40 (.016) 0.60 (.024) ±0.35 (.014)
Qualication/Certication
Commercial Grade products are subject to internal qualication. Details regarding test methods and conditions are referenced in
Table 4, Performance & Reliability.
Environmental Compliance
Pb-Free and RoHS Compliant.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Electrical Parameters/Characteristics
Item Parameters/Characteristics
Operating Temperature Range -55°C to +125°C
Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC) ±15%
Aging Rate (Maximum % Capacitance Loss/Decade Hour) 3.0%
Dielectric Withstanding Voltage (DWV)
250% of rated voltage
(5 ±1 second and charge/discharge not exceeding 50 mA)
Dissipation Factor (DF) Maximum Limit @ 25ºC See Dissipation Factor (DF) Limits Table
Insulation Resistance (IR) Limit @ 25°C See Insulation Resistance Limit Table
(Rated voltage applied for 120 ±5 seconds @ 25°C)
Regarding aging rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part number specic
datasheet for referee time details.
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and dissipation factor (DF) measured under the following conditions:
1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF
120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as
Automatic Level Control (ALC). The ALC feature should be switched to "ON."
Insulation Resistance Limit Table (X7R Dielectric)
EIA Case Size
1,000 Megohm
Microfarads or 100 GΩ
500 Megohm
Microfarads or 10 GΩ
0201 N/A ALL
0402 < 0.012 µF ≥ 0.012 µF
0603 < 0.047 µF ≥ 0.047 µF
0805 < 0.047 µF ≥ 0.047 µF
1206 < 0.22 µF ≥ 0.22 µF
1210 < 0.39 µF ≥ 0.39 µF
1808 ALL N/A
1812 < 2.2 µF ≥ 2.2 µF
1825 ALL N/A
2220 < 10 µF ≥ 10 µF
2225 ALL N/A
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Dissipation Factor (DF) Limits Table
EIA Case
Size Rated DC
Voltage Capacitance Dissipation
Factor
0402
< 16
All
5.0%
16/25 3.5%
> 25 2.5%
0603
< 16
< 1.0 uF
5.0%
16/25 3.5%
> 25 2.5%
< 16
≥ 1.0 uF 10.0%
16/25
0805
< 16
≤ 2.2 µF
5.0%
16/25 3.5%
> 25 < 1.0 µF 2.5%
< 16
> 2.2 µF
10.0%16/25
> 25 ≥ 1.0 µF
1206
< 16
< 10 µF
5.0%
16/25 3.5%
> 25 2.5%
< 16
≥ 10 µF 10.0%
16/25
1210
< 16
< 22 µF
5.0%
16/25 3.5%
> 25 2.5%
< 16
≥ 22 µF 10.0%
16/25
1812 – 2225
< 16
All
5.0%
16/25 3.5%
> 25 2.5%
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 5
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric Case Size Rated DC
Voltage
Capacitance
Value
Dissipation
Factor
(Maximum %)
Capacitance
Shift
Insulation
Resistance
X7R
0402
< 16
All
7.5
±20% 10% of Initial
Limit
16/25 5.0
> 25 3.0
0603
< 16
< 1.0 uF
7.5
16/25 5.0
> 25 3.0
< 16
≥ 1.0 uF 20.0
16/25
0805
< 16
≤ 2.2 µF
7.5
16/25 5.0
> 25 < 1.0 µF 3.0
< 16
> 2.2 µF
20.016/25
> 25 ≥ 1.0 µF
1206
< 16
< 10 µF
7.5
16/25 5.0
> 25 3.0
< 16
≥ 10 µF 20.0
16/25
1210
< 16
< 22 µF
7.5
16/25 5.0
> 25 3.0
< 16
≥ 22 µF 20.0
16/25
1808 – 2225
< 16
All
7.5
16/25 5.0
> 25 3.0
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes)
Cap Cap
Code
Series C0402 C0603 C0805 C1206
Voltage Code 9843 5 9843 5 1298436512A 9 8436512A
Voltage DC
6.3
10
16
25
50
6.3
10
16
25
50
100
200
6.3
10
16
25
35
50
100
200
250
6.3
10
16
25
35
50
100
200
250
Cap Tolerance Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions
10 – 91 pF 100 – 910 J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC DC DC EB EB EB EB EB EB EB EB
100 – 150 pF 101 – 820 J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC DC DC EB EB EB EB EB EB EB EB
180 – 820 pF 181 J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC DC DC DC EB EB EB EB EB EB EB EB
1,000 – 10,000 pF 102 – 103 J K M BB BB BB BB BB CB CB CB CB CB CB CB DC DC DC DC DC DC DC DC DC EB EB EB EB EB EB EB EB EB
12,000 pF 123 J K M BB BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC DC DC DC EB EB EB EB EB EB EB EB EB
15,000 pF 153 J K M BB BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC DC DC DC EB EB EB EB EB EB EB EB EB
18,000 pF 183 J K M BB BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC DC DC DC EB EB EB EB EB EB EB EB EB
22,000 pF 223 J K M BB BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC DC DC DC EB EB EB EB EB EB EB EB EB
27,000 pF 273 J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC DD DE EB EB EB EB EB EB EB EB EB
33,000 pF 333 J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC DD DE EB EB EB EB EB EB EB EB EB
39,000 pF 393 J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC DD DE EB EB EB EB EB EB EC EB EB
47,000 pF 473 J K M BB BB BB BB CB CB CB CB CB CB DC DC DC DC DC DC DE DG EB EB EB EB EB EB EC ED ED
56,000 pF 563 J K M BB BB BB CB CB CB CB CB DD DD DD DD DD DD DE DG EB EB EB EB EB EB EB ED ED
68,000 pF 683 J K M BB BB BB CB CB CB CB CB DD DD DD DD DD DD DE EB EB EB EB EB EB EB ED ED
82,000 pF 823 J K M BB BB BB CB CB CB CB CB DD DD DD DD DD DD DE EB EB EB EB EB EB EB ED ED
0.1 uF 104 J K M BB BB BB CB CB CB CB CB DC DC DC DC DC DC DE EB EB EB EB EB EB EB EM EM
0.12 uF 124 J K M CB CB CB CB CB DC DC DC DC DD DD DG EC EC EC EC EC EC EC EG
0.15 uF 154 J K M CB CB CB CB CD DC DC DC DC DD DD DG EC EC EC EC EC EC EC EG
0.18 uF 184 J K M CB CB CB CB DC DC DC DC DG DG DG EC EC EC EC EC EC EC
0.22 uF 224 J K M CB CB CB CD DC DC DC DC DG DG DG EC EC EC EC EC EC EC
0.27 uF 274 J K M CB CB CB DD DD DD DD DD DD EB EB EB EB EC EC EM
0.33 uF 334 J K M CB CB CB DG DG DG DG DD DD EB EB EB EB EC EC EG
0.39 uF 394 J K M CB CB CB DG DG DG DG DE DE EB EB EB EB EC EC EG
0.47 uF 474 J K M CB CB CB DD DD DD DD DE DE EC EC EC EC EC EC EG
0.56 uF 564 J K M DD DD DD DG DH DH ED ED ED ED EC EC
0.68 uF 684 J K M DD DD DD DG DH DH EE EE EE EE ED ED
0.82 uF 824 J K M DD DD DD DG EF EF EF EF ED ED
1 uF 105 J K M CC² CC² CC² CD² DD DD DD DG DG² DG² EF EF EF EG ED ED
1.2 uF 125 J K M DE DE DE ED ED ED EG EH EH
1.5 uF 155 J K M DG DG DG ED ED ED EG EH EH
1.8 uF 185 J K M DG DG DG ED ED ED EF EH EH
2.2 uF 225 J K M DG DG DG ED ED ED EF EH EH
2.7 uF 275 J K M EN EN EN EH
3.3 uF 335 J K M ED ED ED EH EH
3.9 uF 395 J K M EF EF EF EH
4.7 uF 475 J K M DG² DG² DG² EF EF EF EH
5.6 uF 565 J K M EH EH EH
6.8 uF 685 J K M EH EH EH
8.2 uF 825 J K M EH EH EH
10 uF 106 J K M DG² DG² EH EH EH EH²
12 uF 126 J K M
15 uF 156 J K M
18 uF 186 J K M
22 uF 226 J K M EH¹ EH¹
47 uF 476 J K M
Cap Cap
Code
Voltage DC
6.3
10
16
25
50
6.3
10
16
25
50
100
200
6.3
10
16
25
35
50
100
200
250
6.3
10
16
25
35
50
100
200
250
Voltage Code 9843 5 9843 5 1298436512A 9 8436512A
Series C0402 C0603 C0805 C1206
xx1 Available only in M tolerance.
xx2 Available only in K, M tolerance.
Roll Over for
Order Info.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes)
xx1 Available only in M tolerance.
xx2 Available only in K, M tolerance.
Cap Cap
Code
Series C1210 C1808 C1812 C1825 C2220 C2225
Voltage Code 9843512A512 3 5 12A512A3 5 12A512A
Voltage DC
6.3
10
16
25
50
100
200
250
50
100
200
25
50
100
200
250
50
100
200
250
25
50
100
200
250
50
100
200
250
Cap Tolerance Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions
10 – 91 pF 100 – 910 J K M FB FB FB FB FB FB FB
100 – 270 pF 101 – 271 J K M FB FB FB FB FB FB FB
330 pF 331 J K M FB FB FB FB FB FB FB LF LF LF
390 pF 391 J K M FB FB FB FB FB FB FB LF LF LF
470 – 1,200 pF 471 – 122 J K M FB FB FB FB FB FB FB LF LF LF GB GB GB GB
1,500 pF 152 J K M FB FB FB FB FB FB FE LF LF LF GB GB GB GB
1,800 pF 182 J K M FB FB FB FB FB FB FE LF LF LF GB GB GB GB
2,200 pF 222 J K M FB FB FB FB FB FB FB FB LF LF LF GB GB GB GB
2,700 pF 272 J K M FB FB FB FB FB FB FB FB LF LF LF GB GB GB GB
3,300 pF 332 J K M FB FB FB FB FB FB FB FB LF LF GB GB GB GB
3,900 pF 392 J K M FB FB FB FB FB FB FB FB LF LF GB GB GB GB HB HB HB
4,700 pF 472 J K MFB FB FB FB FB FB FB FB LD LD LD GB GB GB GD HB HB HB KE KE KE
5,600 pF 562 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GH HB HB HB KE KE KE
6,800 pF 682 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HB JE JE JE KE KE KE
8,200 pF 822 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HB JE JE JE KE KE KE
10,000 pF 103 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HE JE JE JE KE KE KE
12,000 pF 123 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HE JE JE JE KE KE KE
15,000 pF 153 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB JE JE JE KE KE KE
18,000 pF 183 J K M FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HE JE JE JE KE KE
22,000 pF 223 J K M FB FB FB FB FB FB FB FB LD LD GB GB GB GB GB HB HB HB HB JE JE JE KE KE
27,000 pF 273 J K M FB FB FB FB FB FB FB FB LD LD GB GB GB GB GB HB HB HB HB JE JE JE KE KE
33,000 pF 333 J K M FB FB FB FB FB FB FB FB LD LD GB GB GB GB GB HB HB HB HB JB JB JB KE
39,000 pF 393 J K M FB FB FB FB FB FB FB FB LD LD GB GB GB GB GB HB HB HB HB JB JB JB
47,000 pF 473 J K M FB FB FB FB FB FB FC FC LD LD GB GB GB GB GB HB HB HB HB JB JB JB
56,000 pF 563 J K M FB FB FB FB FB FB FC FC LD LD GB GB GB GB GB HB HB HB HB JB JB JB
68,000 pF 683 J K M FB FB FB FB FB FB FC FC LD GB GB GB GB GB HB HB HB HB JB JB JB
82,000 pF 823 J K M FB FB FB FB FB FC FF FF LD GB GB GB GB GB HB HB HB HB JC JC JC JC JC
0.10 uF 104 J K M FB FB FB FB FB FD FG FG LD GB GB GB GB GB HB HB HB HB JC JC JC JC JC KC KC KC KC
0.12 uF 124 J K M FB FB FB FB FB FD LD GB GB GB GB GB HB HB HB HB JC JC JC JC JC KC KC KC KC
0.15 uF 154 J K M FC FC FC FC FC FD LD GB GB GB GE GE HB HB HB HB JC JC JC JC JC KC KC KC KC
0.18 uF 184 J K M FC FC FC FC FC FD LD GB GB GB GG GG HB HB HB HB JC JC JC JC JC KC KC KC KC
0.22 uF 224 J K M FC FC FC FC FC FD GB GB GB GG GG HB HB HB HB JC JC JC JC JC KC KC KC KC
0.27 uF 274 J K M FC FC FC FC FC FD GB GB GG GG GG HB HB HB HB JC JC JC JC JC KB KC KC KC
0.33 uF 334 J K M FD FD FD FD FD FD GB GB GG GG GG HB HB HB HB JC JC JC JC JC KB KC KC KC
0.39 uF 394 J K M FD FD FD FD FD FD GB GB GG GG GG HB HB HD HD JC JC JC JC JC KB KC KC KC
0.47 uF 474 J K M FD FD FD FD FD FD GB GB GG GJ GJ HB HB HD HD JC JC JC JC JC KB KC KD KD
0.56 uF 564 J K M FD FD FD FD FD FF GC GC GG HB HD HD HD JC JC JC JD JD KB KC KD KD
0.68 uF 684 J K M FD FD FD FD FD FG GC GC GG HB HD HD HD JC JC JD JD JD KB KC KD KD
0.82 uF 824 J K M FF FF FF FF FF FL GE GE GG HB HF HF HF JC JC JF JF JF KB KC KE KE
1.0 uF 105 J K M FH FH FH FH FH FM GE GE GG HB HF HF HF JC JC JF JF JF KB KD KE KE
1.2 uF 125 J K M FH FH FH FH FG HB JC JC KB KE KE KE
1.5 uF 155 J K M FH FH FH FH FG HC JC JC KC
1.8 uF 185 J K M FH FH FH FH FG HD JD JD KD
2.2 uF 225 J K M FJ FJ FJ FJ FG FT2GO GO GO² HF JF JF KD
2.7 uF 275 J K M FE FE FE FG FH
3.3 uF 335 J K M FF FF FF FM FM
3.9 uF 395 J K M FG FG FG FG FK
4.7 uF 475 J K M FC FC FC FG FS GK GK
5.6 uF 565 J K M FF FF FF FH
Cap Cap
Code
Voltage DC
6.3
10
16
25
50
100
200
250
50
100
200
25
50
100
200
250
50
100
200
250
25
50
100
200
250
50
100
200
250
Voltage Code 9843512A512 3 5 12A512A3 5 12A512A
Series C1210 C1808 C1812 C1825 C2220 C2225
Roll Over for
Order Info.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Cap Cap
Code
Series C1210 C1808 C1812 C1825 C2220 C2225
Voltage Code 9843512A512 3 5 12A512A3 5 12A512A
Voltage DC
6.3
10
16
25
50
100
200
250
50
100
200
25
50
100
200
250
50
100
200
250
25
50
100
200
250
50
100
200
250
Cap Tolerance Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions
6.8 uF 685 J K M FG FG FG FM
8.2 uF 825 J K M FH FH FH FK
10 uF 106 J K M FH FH FH FS GK JF JO
12 uF 126 J K M
15 uF 156 J K M FM FM JO JO
18 uF 186 J K M
22 uF 226 J K M FS FS FS¹ FS¹ JO
47 uF 476 JK M FS²
Cap Cap
Code
Voltage DC
6.3
10
16
25
50
100
200
250
50
100
200
25
50
100
200
250
50
100
200
250
25
50
100
200
250
50
100
200
250
Voltage Code 9843512A512 3 5 12A512A3 5 12A512A
Series C1210 C1808 C1812 C1825 C2220 C2225
Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes) cont'd
xx1 Available only in M tolerance.
xx2 Available only in K, M tolerance.
Table 2 – Chip Thickness/Packaging Quantities
Package quantity based on nished chip thickness specications.
Thickness
Code
Case
Size Thickness ±
Range (mm)
Paper Quantity Plastic Quantity
7" Reel 13" Reel 7" Reel 13" Reel
0402
0.50 ± 0.05
10,000
50,000
0
0
0603
0.80 ± 0.07
4,000
10,000
0
0
0603
0.80 ± 0.10
4,000
10,000
0
0
0603
0.80 ± 0.15
4,000
10,000
0
0
0805
0.78 ± 0.10
4,000
10,000
0
0
0805
0.90 ± 0.10
4,000
10,000
0
0
0805
1.00 ± 0.10
0
0
2,500
10,000
0805
1.25 ± 0.15
0
0
2,500
10,000
0805
1.25 ± 0.20
0
0
2,500
10,000
1206
0.78 ± 0.10
4,000
10,000
4,000
10,000
1206
0.90 ± 0.10
0
0
4,000
10,000
1206
0.95 ± 0.10
0
0
4,000
10,000
1206
1.00 ± 0.10
0
0
2,500
10,000
1206
1.10 ± 0.10
0
0
2,500
10,000
1206
1.20 ± 0.15
0
0
2,500
10,000
1206
1.25 ± 0.15
0
0
2,500
10,000
1206
1.60 ± 0.15
0
0
2,000
8,000
1206
1.60 ± 0.20
0
0
2,000
8,000
1210
0.78 ± 0.10
0
0
4,000
10,000
1210
0.90 ± 0.10
0
0
4,000
10,000
1210
0.95 ± 0.10
0
0
4,000
10,000
1210
1.00 ± 0.10
0
0
2,500
10,000
1210
1.10 ± 0.10
0
0
2,500
10,000
1210
1.25 ± 0.15
0
0
2,500
10,000
Thickness
Code Case
Size Thickness ±
Range (mm)
7" Reel 13" Reel 7" Reel 13" Reel
Paper Quantity Plastic Quantity
Roll Over for
Order Info.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Table 2 – Chip Thickness/Packaging Quantities cont'd
Package quantity based on nished chip thickness specications.
Thickness
Code
Case
Size Thickness ±
Range (mm)
Paper Quantity Plastic Quantity
7" Reel 13" Reel 7" Reel 13" Reel
1210
1.40 ± 0.15
0
0
2,000
8,000
1210
1.55 ± 0.15
0
0
2,000
8,000
1210
1.70 ± 0.20
0
0
2,000
8,000
1210
1.85 ± 0.20
0
0
2,000
8,000
1210
1.90 ± 0.20
0
0
1,500
4,000
1210
2.10 ± 0.20
0
0
2,000
8,000
1210
2.50 ± 0.20
0
0
1,000
4,000
1706
0.90 ± 0.10
0
0
4,000
10,000
1706
1.00 ± 0.15
0
0
4,000
10,000
1808
0.90 ± 0.10
0
0
2,500
10,000
1808
1.00 ± 0.15
0
0
2,500
10,000
1812
1.00 ± 0.10
0
0
1,000
4,000
1812
1.10 ± 0.10
0
0
1,000
4,000
1812
1.25 ± 0.15
0
0
1,000
4,000
1812
1.30 ± 0.10
0
0
1,000
4,000
1812
1.40 ± 0.15
0
0
1,000
4,000
1812
1.55 ± 0.10
0
0
1,000
4,000
1812
1.60 ± 0.20
0
0
1,000
4,000
1812
1.70 ± 0.15
0
0
1,000
4,000
1812
2.50 ± 0.20
0
0
500
2,000
1825
1.10 ± 0.15
0
0
1,000
4,000
1825
1.15 ± 0.15
0
0
1,000
4,000
1825
1.30 ± 0.15
0
0
1,000
4,000
1825
1.40 ± 0.15
0
0
1,000
4,000
1825
1.50 ± 0.15
0
0
1,000
4,000
2220
1.00 ± 0.15
0
0
1,000
4,000
2220
1.10 ± 0.15
0
0
1,000
4,000
2220
1.30 ± 0.15
0
0
1,000
4,000
2220
1.40 ± 0.15
0
0
1,000
4,000
2220
1.50 ± 0.15
0
0
1,000
4,000
2220
2.40 ± 0.15
0
0
500
2,000
2225
1.00 ± 0.15
0
0
1,000
4,000
2225
1.10 ± 0.15
0
0
1,000
4,000
2225
1.30 ± 0.15
0
0
1,000
4,000
2225
1.40 ± 0.15
0
0
1,000
4,000
Thickness
Code Case
Size Thickness ±
Range (mm)
7" Reel 13" Reel 7" Reel 13" Reel
Paper Quantity Plastic Quantity
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351
EIA
Size
Code
Metric
Size
Code
Density Level A:
Maximum (Most)
Land Protrusion (mm)
Density Level B:
Median (Nominal)
Land Protrusion (mm)
Density Level C:
Minimum (Least)
Land Protrusion (mm)
CY X V1 V2 CY X V1 V2 CY X V1 V2
01005 0402 0.33 0.46 0.43 1.60 0.90 0.28 0.36 0.33 1.30 0.70 0.23 0.26 0.23 1.00 0.50
0201 0603 0.38 0.56 0.52 1.80 1.00 0.33 0.46 0.42 1.50 0.80 0.28 0.36 0.32 1.20 0.60
0402 1005 0.50 0.72 0.72 2.20 1.20 0.45 0.62 0.62 1.90 1.00 0.40 0.52 0.52 1.60 0.80
0603 1608 0.90 1.15 1.10 4.00 2.10 0.80 0.95 1.00 3.10 1.50 0.60 0.75 0.90 2.40 1.20
0805 2012 1.00 1.35 1.55 4.40 2.60 0.90 1.15 1.45 3.50 2.00 0.75 0.95 1.35 2.80 1.70
1206 3216 1.60 1.35 1.90 5.60 2.90 1.50 1.15 1.80 4.70 2.30 1.40 0.95 1.70 4.00 2.00
1210 3225 1.60 1.35 2.80 5.65 3.80 1.50 1.15 2.70 4.70 3.20 1.40 0.95 2.60 4.00 2.90
1808 4520 2.30 1.75 2.30 7.40 3.30 2.20 1.55 2.20 6.50 2.70 2.10 1.35 2.10 5.80 2.40
1812 4532 2.15 1.60 3.60 6.90 4.60 2.05 1.40 3.50 6.00 4.00 1.95 1.20 3.40 5.30 3.70
1825 4564 2.15 1.60 6.90 6.90 7.90 2.05 1.40 6.80 6.00 7.30 1.95 1.20 6.70 5.30 7.0 0
2220 5650 2.75 1.70 5.50 8.20 6.50 2.65 1.50 5.40 7.30 5.90 2.55 1.30 5.30 6.60 5.60
2225 5664 2.70 1.70 6.90 8.10 7.90 2.60 1.50 6.80 7.20 7.3 0 2.50 1.30 6.70 6.50 7.0 0
Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reow solder
processes. KEMET only recommends wave soldering of EIA 0603, 0805, and 1206 case sizes.
Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reow solder processes.
Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualication
testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).
Soldering Process
Recommended Soldering Technique:
• Solder wave or solder reow for EIA case sizes 0603, 0805, and 1206
• All other EIA case sizes are limited to solder reow only
Recommended Soldering Prole:
• KEMET recommends following the guidelines outlined in IPC/JEDEC J–STD020
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress Reference Test or Inspection Method
Terminal Strength JISC6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds.
Board Flex JISC6429
Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for C0G.
Flexible termination system – 3.0 mm (minimum).
Solderability JSTD002
Magnication 50 X. Conditions:
a) Method B, 4 hours @ 155°C, dry heat @ 235°C
b) Method B @ 215°C category 3
c) Method D, category 3 @ 260°C
Temperature Cycling JESD22 Method JA–104 1,000 Cycles (-55°C to +125°C). Measurement at 24 hours +/- 2 hours after test conclusion.
Biased Humidity MILSTD–202 Method 103
Load Humidity: 1,000 hours 85°C/85% RH and rated voltage. Add 100 K ohm resistor. Measurement
at 24 hours +/- 2 hours after test conclusion.
Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.
Measurement at 24 hours +/- 2 hours after test conclusion.
Moisture Resistance MILSTD–202 Method 106
t = 24 hours/cycle. Steps 7a and 7b not required. Unpowered.
Measurement at 24 hours +/- 2 hours after test conclusion.
Thermal Shock MILSTD–202 Method 107
-55°C/+125°C. Note: Number of cycles required – 300, maximum transfer time – 20 seconds, dwell
time – 15 minutes. Air – Air.
High Temperature Life
MILSTD–202 Method 108
/EIA–198
1,000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 2 X rated voltage applied.
Storage Life MILSTD–202 Method 108 150°C, 0 VDC for 1,000 hours.
Mechanical Shock MILSTD–202 Method 213 Figure 1 of Method 213, Condition F.
Resistance to Solvents MILSTD–202 Method 215 Add aqueous wash chemical, OKEM Clean or equivalent.
Storage & Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other
environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term
storage. In addition, packaging materials will be degraded by high temperature– reels may soften or warp and tape peel force may
increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum storage humidity not exceed 70%
relative humidity. Temperature uctuations should be minimized to avoid condensation on the parts and atmospheres should be free of
chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of
receipt.
Construction
Reference Item Material
A
Termination
System
Finish
100% Matte Sn
B Barrier Layer Ni
CBase Metal Cu
DInner Electrode Ni
EDielectric Material BaTiO3
Note: Image is exaggerated in order to clearly identify all components of construction.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 12
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA
Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on
reeling quantities for commercial chips.
8 mm, 12 mm
or 16 mm Carrier Tape
178 mm (7.00")
or
330 mm (13.00")
Anti-Static Reel
Embossed Plastic* or
Punched Paper Carrier.
Embossment or Punched Cavity
Anti-Static Cover Tape
(.10 mm (.004") Maximum Thickness)
Chip and KPS Orientation in Pocket
(except 1825 Commercial, and 1825 and 2225 Military)
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
KEMET
®
Bar Code Label
Sprocket Holes
Table 5 – Carrier Tape Con guration – Embossed Plastic & Punched Paper (mm)
EIA Case Size Tape Size (W)* Lead Space (P
1
)*
01005 – 0402 8 2
0603 – 1210 8 4
1805 – 1808 12 4
≥ 1812 12 8
KPS 1210 12 8
KPS 1812 & 2220 16 12
Array 0508 & 0612 8 4
*Refer to Figures 1 & 2 for W and P1 carrier tape reference locations.
*Refer to Tables 6 & 7 for tolerance speci cations.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
Po
T
F
W
Center Lines of Cavity
Ao
Bo
User Direction of Unreeling
Cover Tape
Ko
B
1
is for tape feeder reference only,
including draft concentric about B
o
.
T
2
ØD
1
ØDo
B
1
S
1
T
1
E
1
E
2
P
1
P
2
Embossment
For cavity size,
see Note 1 Table 4
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size D0
D
1
Minimum
Note 1
E1P0 P2
R Reference
Note 2
S
1
Minimum
Note 3
T
Maximum
T
1
Maximum
8 mm
1.5 +0.10/-0.0 (0.059
+0.004/-0.0)
1.0
(0.039)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05 (0.079
±0.002)
25.0
(0.984)
0.600
(0.024)
0.600
(0.024)
0.100
(0.004)
12 mm 1.5
(0.059)
30
(1.181)
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size Pitch
B
1
Maximum
Note 4
E
2
Minimum
F P1
T
2
Maximum
W
Maximum
A0,B0 & K0
8 mm Single (4 mm) 4.35
(0.171)
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
4.0 ±0.10
(0.157 ±0.004)
2.5
(0.098)
8.3
(0.327)
Note 512 mm Single (4 mm) &
Double (8 mm)
8.2
(0.323)
10.25
(0.404)
5.5 ±0.05
(0.217 ±0.002)
8.0 ±0.10 (0.315
±0.004)
4.6
(0.181)
12.3
(0.484)
16 mm Triple (12 mm) 12.1
(0.476)
14.25
(0.561)
5.5 ±0.05
(0.217 ±0.002)
8.0 ±0.10 (0.315
±0.004)
4.6
(0.181)
16.3
(0.642)
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and
hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 6).
3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity de ned by A0, B0 and K0 shall surround the component with suf cient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).
(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
User Direction of Unreeling
Top Cover Tape
T
Center Lines of Cavity
P
1
ØDo Po
P
2
E
1
F
E
2
W
G
A
0
B
0
Cavity Size,
See
Note 1, Table 7
Bottom Cover Tape
T
1
T
1
Bottom Cover Tape
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size D0E1P0P2T1 Maximum G Minimum
R Reference
Note 2
8 mm 1.5 +0.10 -0.0
(0.059 +0.004 -0.0)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
0.10
(0.004) Maximum
0.75
(0.030)
25
(0.984)
Variable Dimensions — Millimeters (Inches)
Tape Size Pitch E2 Minimum F P1 T Maximum W Maximum A0 B0
8 mm Half (2 mm) 6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
2.0 ±0.05
(0.079 ±0.002)
1.1
(0.098)
8.3
(0.327)
Note 1
8 mm Single (4 mm)
4.0 ±0.10
(0.157 ±0.004)
8.3
(0.327)
1. The cavity de ned by A0, B0 and T shall surround the component with suf cient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
c) rotation of the component is limited to 20° maximum (see Figure 3).
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).
e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 6).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1002_X7R_SMD • 8/8/2012 15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 Kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width Peel Strength
8 mm 0.1 to 1.0 Newton (10 to 100 gf)
12 and 16 mm 0.1 to 1.3 Newton (10 to 130 gf)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180°
from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 3 – Maximum Component Rotation
Ao
Bo
°
T
°
s
Maximum Component Rota