FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2007-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.6
ASSP
Spread Spectrum Clock Generator
MB88151A
DESCRIPTION
MB88151A is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary
radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with
the internal modulator. It corresponds to both of the center spread which modulates frequency in modulation off
as Middle Centered and down spread which modulates so as not to exceed frequency in modulation off.
FEATURES
Modulation rate : ± 0.5%, ± 1.5% (Center spread), 1.0%, 3.0% (Down spread)
Equipped with oscillation circuit : Range of oscillation 8.3 MHz to 33.4 MHz
Modulation clock output Duty : 40% to 60%
Low current consumption by CMOS process : 5 mA (24 MHz : Typ-sample, no load)
Power supply voltage : 3.3 V ± 0.3 V
Operating temperature : 40 °C to + 85 °C
Package : SOP 8-pin
MB88151A-
100/101
(multiply-by-1)
MB88151A-
200/201
(multiply-by-2)
MB88151A-
400/401
(multiply-by-4)
MB88151A-
500/501
(multiply-by-1/2)
MB88151A-
800/801
(multiply-by-8)
Input
frequency/
Output
frequency
16.6 MHz to 33.4 MHz/
16.6 MHz to 33.4 MHz 16.6 MHz to 33.4 MHz/
33.2 MHz to 66.8 MHz 16.6 MHz to 33.4 MHz/
66.4 MHz to 133.6 MHz 16.6 MHz to 33.4 MHz/
8.3 MHz to 16.7 MHz 8.3 MHz to 16.7 MHz
66.4 MHz to 133.6 MHz
Modulation
clock
cycle-cycle
jitter
Less than100 ps Less than 100 ps Less than 150 ps Less than 200 ps Less than 150 ps
DS04-29127-3E
MB88151A
2DS04-29127-3E
PRODUCT LINEUP
MB88151A has five kinds of multiplication type.
PIN ASSIGNMENT
PIN DESCRIPTION
* : XPD = 800 kΩ pull-up resistor at “L”
Product Input frequency range Multiplier ratio Output frequency range
MB88151A-100/101
16.6 MHz to 33.4 MHz
Multiply-by-1 16.6 MHz to 33.4 MHz
MB88151A-200/201 Multiply-by-2 33.2 MHz to 66.8 MHz
MB88151A-400/401 Multiply-by-4 66.4 MHz to 133.6 MHz
MB88151A-500/501 Multiply-by-1/2 8.3 MHz to 16.7 MHz
MB88151A-800/801 8.3 MHz to 16.7 MHz Multiply-by-8 66.4 MHz to 133.6 MHz
Pin name I/O Pin no. Description
XIN I 1 Resonator connection pin/clock input pin
VSS 2 GND pin
SEL0 I 3 Modulation rate setting pin
SEL1 I 4 Modulation rate setting pin
CKOUT O 5 Modulated clock output pin
ENS/XPD I 6 Modulation enable setting pin (with pull-up resistance)/
Power down pin (with pull-up resistor)*
VDD 7 Power supply voltage pin
XOUT O 8 Resonator connection pin
1
2
3
4
8
7
6
5
XIN
V
SS
SEL0
SEL1
XOUT
V
DD
ENS/XPD
CKOUT
MB88151A
TOP VIEW
FPT-8P-M02
MB88151A
DS04-29127-3E 3
I/O CIRCUIT TYPE
(Continued)
Pin Circuit type Remarks
SEL0,
SEL1 CMOS hysteresis input
ENS With 50 kΩ pull-up resistors
CMOS hysteresis input
XPD With 50 kΩ + 800 kΩ pull-up
resistors
Note : If “L” is input to XPD, 50 kΩ
pull-up resistor is disconnected.
CMOS hysteresis input
50 kΩ
800 kΩ
50 kΩ
MB88151A
4DS04-29127-3E
(Continued)
Note : For XIN and XOUT pins, refer to “OSCILLATION CIRCUIT”.
Pin Circuit type Remarks
CKOUT CMOS output
•I
OL = 4 mA
MB88151A
DS04-29127-3E 5
HANDLING DEVICES
Preventing Latch-up
A latch-up can occur if , on this device, (a) a voltage higher than VDD or a voltage lo w er than VSS is applied to an
input or output pin or (b) a voltage higher than the rating is applied between VDD pin and VSS pin. The latch-up,
if it occurs, significantly increases the pow er supply current and ma y cause thermal destruction of an element.
When you use this device, be very careful not to exceed the maximum rating.
Handling unused pins
Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or
pull-down resistor.
Unused output pin should be opened.
The attention when the external clock is used
Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock.
Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin.
Power supply pins
Please design connecting the pow er supply pin of this device b y as lo w impedance as possible from the current
supply source.
We recommend connecting electrolytic capacitor (about 10 μF) and the ceramic capacitor (about 0.01 μF) in
parallel between VSS pin and VDD pin near the device, as a bypass capacitor.
Oscillation circuit
Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that
electric wiring of XIN or XOUT pin and the resonator do not intersect other wiring.
Design the printed circuit board that surrounds the XIN and XOUT pins with ground.
MB88151A
6DS04-29127-3E
BLOCK DIAGRAM
1
M
1
N
1
L
IDAC ICO
VDD
CKOUT
VSS
Rf = 1 MΩ
SEL1
XOUT
XIN
SEL0
ENS/XPD
Modulation
clock output
Modulation rate
setting
Modulation rate
setting
Modulation enable setting/
Power down setting
Reference clock
PLL block
Reference clock
Phase
compare V/I
conversion
Modulation logic Modulation
rate setting/
Modulation
enable setting
Loop filter
Modulation clock
output
MB88151A PLL block
Charge
pump
A glitchless IDAC (current output D/A converter) provides precise modulation,
thereby dramatically reducing EMI.
MB88151A
DS04-29127-3E 7
PIN SETTING
When changing the pin setting, the stabilization wait time for the modulation cloc k is required. The stabilization
wait time for the modulation clock take the maximum value of “ ELECTRICAL CHARACTERISTICS AC
Characteristics Lock-up time”.
ENS modulation enable setting (MB88151A-100/200/400/500/800)
Note : Spectrum does not spread when “L” is set to ENS. The clock with low jitter can be obtained. Because of ENS
has Pull-up resistance, spectrum spread when “H” is set to it or open the terminal.
XPD Power down setting (MB88151A-101/201/401/501/801)
Note : CKOUT of output pins are fixed to “L” output during power down.
SEL0, SEL1 Modulation rate setting
Note : The modulation rate can be changed at the level of the terminal.
ENS Modulation
L No modulation
H Modulation
XPD Status
L Power down Status
H Operating status
SEL1 SEL0 Modulation rate Modulation type
LL ± 1.5%Center spread
LH ± 0.5%Center spread
HL 1.0%Down spread
HH 3.0%Down spread
MB88151A
8DS04-29127-3E
Center spread
Spectrum is spread (modulated) by centering on the frequency in modulation off.
Down spread
Spectrum is spread (modulated) below the frequency in modulation off.
1.5% +1.5%
Radiation level
Frequency
Frequency in modulation off
Center spread example of ± 1.5% modulation rate
Modulation width 3.0%
3.0%
Frequency in modulation off
Frequency
Radiation level
Down spread example of 3.0% modulation rate
Modulation width 3.0%
MB88151A
DS04-29127-3E 9
ABSOLUTE MAXIMUM RATINGS
* : The parameter is based on VSS = 0.0 V.
WARNING: Semiconductor devices can be permanently damaged by application of stress (v oltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Parameter Symbol Rating Unit
Min Max
Power supply voltage* VDD 0.5 + 4.0 V
Input voltage* VIVSS 0.5 VDD + 0.5 V
Output voltage* VOVSS 0.5 VDD + 0.5 V
Storage temperature TST 55 + 125 °C
Operation junction temperature TJ 40 + 125 °C
Output current IO 14 + 14 mA
Overshoot VIOVER VDD + 1.0 (tOVER 50 ns) V
Undershoot VIUNDER VSS1.0 (tUNDER 50 ns) V
VDD
VSS
Input pin
Overshoot/Undershoot
tUNDER 50 ns
tOVER 50 ns
VIOVER VDD + 1.0 V
VIUNDER VSS 1.0 V
MB88151A
10 DS04-29127-3E
RECOMMENDED OPERATING CONDITIONS (VSS = 0.0 V)
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
Parameter Symbol Pin Conditions Value Unit
Min Typ Max
Power supply voltage VDD VDD 3.0 3.3 3.6 V
“H” level input voltage VIH XIN,
SEL0,
SEL1,
ENS
VDD × 0.8 VDD + 0.3 V
“L” level input voltage VIL VSS VDD × 0.2 V
Input clock
duty cycle tDCI XIN 8.3 MHz to
33.4 MHz 40 50 60 %
Operating temperature Ta ⎯⎯ 40 + 85 °C
XIN
t
a
t
b
1.5 V
Input clock duty cycle (tDCI = tb/ta)
MB88151A
DS04-29127-3E 11
ELECTRICAL CHARACTERISTICS
DC Characteristics (Ta = 40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V)
Parameter Symbol Pin Conditions Value Unit
Min Typ Max
Power supply current ICC VDD
No load capacitance at
output 24 MHz
MB88151A-100 5.0 7.0 mA
At power down
MB88151A-101 10 ⎯μA
Output voltage VOH CKOUT
“H” level output,
IOH = 4 mA VDD 0.5 VDD V
VOL “L” level output,
IOL = 4 mA VSS 0.4 V
Output impedance ZOCKOUT 8.3 MHz to 133.6 MHz 45 ⎯Ω
Input capacitance CIN
XIN,
SEL0,
SEL1,
ENS
Ta = + 25 °C,
VDD = VI = 0.0 V,
f = 1 MHz ⎯⎯16 pF
Load capacitance CLCKOUT
8.3 MHz to 66.8 MHz ⎯⎯15
pF66.8 MHz to 100 MHz ⎯⎯10
100 MHz to 133.6 MHz ⎯⎯ 7
Input pull-up resistance RPUE ENS VIL = 0.0 V 25 50 200 kΩ
RPUP XPD VIL = 0.0 V 500 800 1200
MB88151A
12 DS04-29127-3E
AC Characteristics (Ta = 40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V)
Note : The modulation clock stabilization wait time is required after the power is turned on, the IC recovers from
power saving, or after FREQ (frequency range) or ENS (modulation ON/OFF) setting is changed. For the
modulation clock stabilization wait time, assign the maximum value for lock-up time.
Parameter Symbol Pin Conditions Value Unit
Min Typ Max
Oscillation frequency fxXIN,
XOUT Fundamental
oscillation 8.3 33.4 MHz
Input frequency fin XIN
External clock input
(multiply-by-1, 2, 4,
divided by 2) 16.6 33.4 MHz
External clock input
(multiply-by-8) 8.3 16.7
Output frequency fOUT CKOUT
MB88151A-100/101
(Multiply by 1) 16.6 33.4
MHz
MB88151A-200/201
(Multiply by 2) 33.2 66.8
MB88151A-400/401
(Multiply by 4) 66.4 133.6
MB88151A-500/501
(2-frequency division) 8.3 16.7
MB88151A-800/801
(multiply-by-8) 66.4 133.6
Output slew rate SR CKOUT 0.4 V to 2.4 V
Load capacitance 15 pF 0.4 4.0 V/ns
Output clock duty cycle tDCC CKOUT 1.5 V 40 60 %
Modulation period
(Number of input clocks
per modulation)
fMOD
(nMOD) CKOUT
MB88151A-100/101,
MB88151A-200/201,
MB88151A-400/401,
MB88151A-500/501
fin/2200
(2200) fin/1900
(1900) fin/1600
(1600) kHz
(clks)
MB88151A-800/801 fin/880
(880) fin/760
(760) fin/640
(640) kHz
(clks)
Lock-up time tLK CKOUT 8.3 MHz to 80 MHz 25
ms
80 MHz to 133.6 MHz 38
Cycle-cycle jitter tJC CKOUT
MB88151A-100/101,
MB88151A-200/201
No load capacitance,
Ta = + 25 °C, VDD = 3.3 V
⎯⎯100
ps-rms
MB88151A-400/401,
MB88151A-800/801
No load capacitance,
Ta = + 25 °C, VDD = 3.3 V
⎯⎯150
MB88151A-500/501
No load capacitance,
Ta = + 25 °C, VDD = 3.3 V ⎯⎯200
MB88151A
DS04-29127-3E 13
<Definition of modulation frequency and number of input clocks per modulation>
MB88151A contains the modulation period to realize the efficient EMI reduction.
The modulation period fMOD depends on the input frequency and changes between fMOD (Min) and fMOD (Max) .
Furthermore, the average value of fMOD equals the typical value of the electrical characteristics.
t
f
MOD
(Min) f
MOD
(Max)
t
Modulation waveform
Clock time
nMOD (Max)
fOUT (Output frequency)
Clock time
nMOD (Min)
MB88151A
14 DS04-29127-3E
OUTPUT CLOCK DUTY CYCLE (tDCC = tb/ta)
INPUT FREQUENCY (fin = 1/tin)
OUTPUT SLEW RATE (SR)
CYCLE-CYCLE JITTER (tJC = | tn tn+1 |)
0.8 VDD
tin
XIN
2.4 V
0.4 V
tftr
CKOUT
Note : SR = (2.4 0.4) /tr, SR = (2.4 0.4) /tf
tn+1tn
CKOUT
Note : Cycle-cycle jitter is defined the difference between a certain cycle and immediately after
(or, immediately before) .
MB88151A
DS04-29127-3E 15
MODULATION WAVEFORM
fMOD
1.5 %
+ 1.5 %
fMOD
1.0 %
0.5 %
±1.5% modulation rate, Example of center spread
1.0% modulation rate, Example of down spread
CKOUT
Output frequency
CKOUT
Output frequency
Frequency at modulation OFF
Frequency at modulation OFF
Time
Time
MB88151A
16 DS04-29127-3E
LOCK-UP TIME
If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock
signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “tLK”).
For the input clock stabilization time, check the characteristics of the resonator or oscillator used.
For modulation enable control using the ENS pin during normal operation, the set clock signal is output from
CKOUT pin at most the lock-up time (tLK) after the level at the ENS pin is determined.
Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output
clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cycle-
cycle jitter cannot be guaranteed. It is theref ore advisab le to perf orm processing such as cancelling a reset
of the device at the succeeding stage after the lock-up time.
3.0 V
VDD
XIN
VIH
CKOUT
Setting pin
SEL0,
SEL1,
ENS
Internal clock
stabilization wait time
tLK
(lock-up time )
V
IL
V
IH
XIN
ENS
CKOUT
tLK
(lock-up time ) tLK
(lock-up time )
MB88151A
DS04-29127-3E 17
When the power down is controlled by XPD pin, the desired cloc k is obtained after the pin is set to H lev el until
the maximum lock-up time tLK is elapsed.
XPD
XIN
CKOUT
Internal clock
stabilization wait time
tLK
(lock-up time)
MB88151A
18 DS04-29127-3E
OSCILLATION CIRCUIT
The figure below sho ws the connection example about general resonator. The oscillation circuit has the b uilt-in
resistance (Rf). The value of capacity (C1 and C2) is required adjusting to the most suitable value of individual
resonator.
The most suitable value is different by individual resonator. Please refer to the resonator manufacturer which
you use for the most suitable value.
Input the clock to XIN pin, and do not connect an ything with XOUT pin if you use the e xternal clock (y ou do not
use the resonator).
C1
Rf (1 MΩ)
C2
XIN Pin
MB88151A LSI Internal
MB88151A LSI External
XOUT Pin
When using the resonator
When using an external clock
OPEN
Rf (1 MΩ)
Note : Note that a jitter characteristic of an input clock may cause an affect a cycle-cycle jitter
characteristic.
MB88151A LSI Internal
MB88151A LSI External
XOUT Pin
XIN Pin
External clock
MB88151A
DS04-29127-3E 19
INTERCONNECTION CIRCUIT EXAMPLE
1
2
3
4
8
7
6
5
MB88151A
C1C2
C4C3
R1
+
SEL0
SEL1
Xtal
ENS
C1, C2 : Oscillation stabilization capacitance (refer to “OSCILLATION CIRCUIT”.)
C3 : Capacitor of 10 μF or higher
C4 : Capacitor about 0.01 μF (connect a capacitor of good high frequency
property (ex. laminated ceramic capacitor) to close to this device.)
R1 : Impedance matching resistor for board pattern
MB88151A
20 DS04-29127-3E
SPECTRU M EXAMPLE CHARACTERISTICS
The condition of the examples of the characteristic is shown as follows : Input frequency = 20 MHz (Output
frequency = 20 MHz : Using MB88151A-100 (Multiply-by-1)), Power - supply voltage = 3.3 V, None load capacity ,
Modulation rate = ± 1.5% (center spread).
Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with RBW = 1 kHz
(ATT use for 6dB).
CH B Spectrum 10 dB /REF 0 dBm
Avg
4
RBW# 1 kHZVBW 1 kHZATT 6 dB
CENTER 20 MHZ
SWP 2.505 s
SPAN 4 MHZ
No modulation
6.54 dBm
±1.5% modulation
24.45 dBm
MB88151A
DS04-29127-3E 21
ORDERING INFORMATION
Part number Input frequency
range Multiplier
ratio Output frequency
range Package Remarks
MB88151APNF-G-100-JNE1
MB88151APNF-G-101-JNE1
16.6 MHz to
33.4 MHz
Multiply-
by-116.6 MHz to 33.4 MHz
8-pin plastic
SOP
(FPT-8P-M02)
MB88151APNF-G-200-JNE1
MB88151APNF-G-201-JNE1 Multiply-
by-233.2 MHz to 66.8 MHz
MB88151APNF-G-400-JNE1
MB88151APNF-G-401-JNE1 Multiply-
by-466.4 MHz to 133.6 MHz
MB88151APNF-G-500-JNE1
MB88151APNF-G-501-JNE1 Multiply-
by-1/2 8.3 MHz to 16.7 MHz
MB88151APNF-G-800-JNE1
MB88151APNF-G-801-JNE1 8.3 MHz to
16.7 MHz Multiply-
by-866.4 MHz to 133.6 MHz
MB88151APNF-G-100-JNEFE1
MB88151APNF-G-101-JNEFE1
16.6 MHz to
33.4 MHz
Multiply-
by-116.6 MHz to 33.4 MHz
Emboss
taping
(EF type)
MB88151APNF-G-200-JNEFE1
MB88151APNF-G-201-JNEFE1 Multiply-
by-233.2 MHz to 66.8 MHz
MB88151APNF-G-400-JNEFE1
MB88151APNF-G-401-JNEFE1 Multiply-
by-466.4 MHz to 133.6 MHz
MB88151APNF-G-500-JNEFE1
MB88151APNF-G-501-JNEFE1 Multiply-
by-1/2 8.3 MHz to 16.7 MHz
MB88151APNF-G-800-JNEFE1
MB88151APNF-G-801-JNEFE1 8.3 MHz to
16.7 MHz Multiply-
by-866.4 MHz to 133.6 MHz
MB88151APNF-G-100-JNERE1
MB88151APNF-G-101-JNERE1
16.6 MHz to
33.4 MHz
Multiply-
by-116.6 MHz to 33.4 MHz
Emboss
taping
(ER type)
MB88151APNF-G-200-JNERE1
MB88151APNF-G-201-JNERE1 Multiply-
by-233.2 MHz to 66.8 MHz
MB88151APNF-G-400-JNERE1
MB88151APNF-G-401-JNERE1 Multiply-
by-466.4 MHz to 133.6 MHz
MB88151APNF-G-500-JNERE1
MB88151APNF-G-501-JNERE1 Multiply-
by-1/2 8.3 MHz to 16.7 MHz
MB88151APNF-G-800-JNERE1
MB88151APNF-G-801-JNERE1 8.3 MHz to
16.7 MHz Multiply-
by-866.4 MHz to 133.6 MHz
MB88151A
22 DS04-29127-3E
PACKAGE DIMENSION
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
8-pin plastic SOP Lead pitch 1.27 mm
Package width
×
package length
3.9 × 5.05 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 1.75 mm MAX
Weight 0 .06 g
8-pin plastic SOP
(FPT-8P-M02)
(FPT-8P-M02)
C
2002 FUJITSU LIMITED F08004S-c-4-7
1.27(.050)
3.90±0.30 6.00±0.40
.199 –.008
+.010
–0.20
+0.25
5.05
0.13(.005)
M
(.154±.012) (.236±.016)
0.10(.004)
14
58
0.44±0.08
(.017±.003)
–0.07
+0.03
0.22
.009 +.001
–.003
45
˚
0.40(.016) "A" 0~8
˚
0.25(.010)
(Mounting height)
Details of "A" part
1.55±0.20
(.061±.008)
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.15±0.10
(.006±.004)
(Stand off)
0.10(.004)
*1
*2
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
©2002-2008 FUJITSU MICROELECTRONICS LIMITED F08004S-c-4-8
Note 1) *1 : These dimensions include resin protrusion.
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
MB88151A
DS04-29127-3E 23
MEMO
MB88151A
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,
Shinjuku-ku, Tokyo 163-0722, Japan
Tel: +81-3-5322-3329
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
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1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
Europe
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Pittlerstrasse 47, 63225 Langen, Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fmk/
Asia Pacific
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151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://www.fmal.fujitsu.com/
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm. 3102, Bund Center, No.222 Yan An Road (E),
Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to
the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear
facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon
system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited: Sales Promotion Department