1 MHz to 2.7 GHz
RF Gain Block
Data Sheet
AD8353
Rev. F Document Feedback
Informatio
n furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2002–2017 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Fixed gain of 20 dB
Operational frequency of 1 MHz to 2.7 GHz
Linear output power up to 9 dBm
Input/output internally matched to 50 Ω
Temperature and power supply stable
Noise figure: 5.3 dB
Power supply: 3 V or 5 V
APPLICATIONS
VCO buffers
General Tx/Rx amplification
Power amplifier predrivers
Low power antenna drivers
FUNCTIONAL BLOCK DIAGRAM
AD8353
BIAS AND VREF
RFIN
VPOS
RFOUT
COM2COM1
02721-001
Figure 1.
GENERAL DESCRIPTION
The AD8353 is a broadband, fixed-gain, linear amplifier that
operates at frequencies from 1 MHz up to 2.7 GHz. It is
intended for use in a wide variety of wireless devices, including
cellular, broadband, CATV, and LMDS/MMDS applications.
By taking advantage of Analog Devices, Inc., high performance,
complementary Si bipolar process, these gain blocks provide
excellent stability over process, temperature, and power supply.
This amplifier is single-ended and internally matched to 50 Ω
with a return loss of greater than 10 dB over the full operating
frequency range.
The AD8353 provides linear output power of 9 dBm with 20 dB
of gain at 900 MHz when biased at 3 V and an external RF
choke is connected between the power supply and the output
pin. The dc supply current is 42 mA. At 900 MHz, the output
third-order intercept (OIP3) is greater than 23 dBm and is
19 dBm at 2.7 GHz.
The noise figure is 5.3 dB at 900 MHz. The reverse isolation
(S12) is −36 dB at 900 MHz and −30 dB at 2.7 GHz.
The AD8353 can also operate with a 5 V power supply; in
which case, no external inductor is required. Under these
conditions, the AD8353 delivers 8 dBm with 20 dB of gain at
900 MHz. The dc supply current is 42 mA. At 900 MHz, the
OIP3 is greater than 22 dBm and is 19 dBm at 2.7 GHz. The noise
figure is 5.6 dB at 900 MHz. The reverse isolation (S12) is −35 dB.
The AD8353 is fabricated on Analog Devices proprietary, high
performance, 25 GHz, Si complementary, bipolar IC process.
The AD8353 is available in a chip scale package that uses an
exposed paddle for excellent thermal impedance and low
impedance electrical connection to ground. It operates over a
−40°C to +85°C temperature range, and an evaluation board is
also available.
AD8353 Data Sheet
Rev. F | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ..............................................7
Theory of Operation ...................................................................... 13
Basic Connections ...................................................................... 13
Applications Information .............................................................. 14
Low Frequency Applications Below 100 MHz ........................... 14
Evaluation Board ............................................................................ 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
2/2017—Rev. E to Rev. F
Changed CP-8-1 to CP-8-23 ........................................ Throughout
Changes to Figure 2 .......................................................................... 6
Changes to Ordering Guide .......................................................... 16
Updated Outline Dimensions ....................................................... 16
12/2013—Rev. D to Rev. E
Changes to Figure 35 ...................................................................... 12
9/2013—Rev. C to Rev. D
Changes to Figure 2 .......................................................................... 6
Added EPAD Row, Table 4 .............................................................. 6
Added Figure 35; Renumbered Sequentially .............................. 12
Added Exposed Pad Notation to Outline Dimensions ............. 16
3/2009—Rev. B to Rev. C
Changes to Lead Temperature (Soldering, 60 sec) Parameter,
Table 3 ................................................................................................ 5
Changes to Ordering Guide .......................................................... 16
12/2005—Rev. A to Rev. B
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Changes to Figure 16 ........................................................................ 9
Changes to Figure 32 ...................................................................... 11
Moved Figure 39 to Page 15; Renumbered Sequentially ........... 15
Changes to Ordering Guide .......................................................... 16
8/2005—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Product Title .................................................................. 1
Changes to Features, Figure 1, and General Description ............. 1
Changes to Table 1 ............................................................................. 3
Changes to Table 2 ............................................................................. 4
Changes to Figure 2 and Table 4 ...................................................... 6
Changes to Figure 3 caption and Figure 6 caption........................ 7
Changes to Figure 17 caption and Figure 20 caption ................... 9
Changes to Basic Connections Section ....................................... 13
Added Low Frequency Applications Below 100 MHz Section ....... 14
Changes to Table 5 .......................................................................... 15
Changes to Ordering Guide .......................................................... 16
Updated Outline Dimensions ....................................................... 16
2/2002—Revision 0: Initial Version
Data Sheet AD8353
Rev. F | Page 3 of 16
SPECIFICATIONS
VS = 3 V, T A = 25°C, 100 nH external inductor between RFOUT and VPOS, ZO = 50 Ω, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
OVERALL FUNCTION
Frequency Range 1 2700 MHz
Gain f = 900 MHz 19.8 dB
f = 1.9 GHz 17.7 dB
f = 2.7 GHz 15.6 dB
Delta Gain f = 900 MHz, −40°C ≤ TA ≤ +85°C −0.97 dB
f = 1.9 GHz, −40°C ≤ T
A
≤ +85°C
dB
f = 2.7 GHz, −40°C ≤ TA ≤ +85°C −1.34 dB
Gain Supply Sensitivity VPOS ± 10%, f = 900 MHz 0.04 dB/V
f = 1.9 GHz −0.004 dB/V
f = 2.7 GHz −0.04 dB/V
Reverse Isolation (S12) f = 900 MHz −35.6 dB
f = 1.9 GHz −34.9 dB
f = 2.7 GHz −30.3 dB
RF INPUT INTERFACE Pin RFIN
Input Return Loss f = 900 MHz 22.3 dB
f = 1.9 GHz 20.9 dB
f = 2.7 GHz 11.2 dB
RF OUTPUT INTERFACE Pin RFOUT
Output Compression Point f = 900 MHz, 1 dB compression 9.1 dBm
f = 1.9 GHz 8.4 dBm
f = 2.7 GHz 7.6 dBm
Delta Compression Point
f = 900 MHz, −40°C ≤ T
A
≤ +85°C
dB
f = 1.9 GHz, −40°C ≤ TA ≤ +85°C −1.17 dB
f = 2.7 GHz, −40°C ≤ TA ≤ +85°C −1 dB
Output Return Loss f = 900 MHz 26.3 dB
f = 1.9 GHz 16.9 dB
f = 2.7 GHz 13.3 dB
DISTORTION/NOISE
Output Third-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 23.6 dBm
f = 1.9 GHz, ∆f = 1 MHz, PIN = −28 dBm 20.8 dBm
f = 2.7 GHz, ∆f = 1 MHz, P
IN
= −28 dBm
dBm
Output Second-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 31.6 dBm
Noise Figure f = 900 MHz 5.3 dB
f = 1.9 GHz 6 dB
f = 2.7 GHz 6.8 dB
POWER INTERFACE Pin VPOS
Supply Voltage 2.7 3 3.3 V
Total Supply Current 35 41 48 mA
Supply Voltage Sensitivity 15.3 mA/V
Temperature Sensitivity −40°C ≤ TA ≤ +85°C 60 µA/°C
AD8353 Data Sheet
Rev. F | Page 4 of 16
VS = 5 V, T A = 25°C, no external inductor between RFOUT and VPOS, ZO = 50 Ω, unless otherwise noted.
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
OVERALL FUNCTION
Frequency Range 1 2700 MHz
Gain f = 900 MHz 19.5 dB
f = 1.9 GHz
17.6
dB
f = 2.7 GHz 15.7 dB
Delta Gain f = 900 MHz, −40°C ≤ TA ≤ +85°C −0.96 dB
f = 1.9 GHz, −40°C ≤ TA ≤ +85°C −1.18 dB
f = 2.7 GHz, −40°C ≤ TA ≤ +85°C −1.38 dB
Gain Supply Sensitivity
VPOS ± 10%, f = 900 MHz
0.09
dB/V
f = 1.9 GHz −0.01 dB/V
f = 2.7 GHz −0.09 dB/V
Reverse Isolation (S12) f = 900 MHz −35.4 dB
f = 1.9 GHz −34.6 dB
f = 2.7 GHz −30.2 dB
RF INPUT INTERFACE Pin RFIN
Input Return Loss f = 900 MHz 22.9 dB
f = 1.9 GHz 21.7 dB
f = 2.7 GHz
11.5
dB
RF OUTPUT INTERFACE Pin RFOUT
Output Compression Point f = 900 MHz 8.3 dBm
f = 1.9 GHz 8.1 dBm
f = 2.7 GHz 7.5 dBm
Delta Compression Point f = 900 MHz, −40°C ≤ TA ≤ +85°C −1.05 dB
f = 1.9 GHz, −40°C ≤ TA ≤ +85°C −1.49 dB
f = 2.7 GHz, −40°C ≤ TA ≤ +85°C −1.33 dB
Output Return Loss f = 900 MHz 27 dB
f = 1.9 GHz 22 dB
f = 2.7 GHz 14.3 dB
DISTORTION/NOISE
Output Third-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 22.8 dBm
f = 1.9 GHz, ∆f = 1 MHz, PIN = −28 dBm 20.6 dBm
f = 2.7 GHz, ∆f = 1 MHz, PIN = −28 dBm 19.5 dBm
Output Second-Order Intercept f = 900 MHz, ∆f = 1 MHz, PIN = −28 dBm 30.3 dBm
Noise Figure f = 900 MHz 5.6 dB
f = 1.9 GHz 6.3 dB
f = 2.7 GHz 7.1 dB
POWER INTERFACE Pin VPOS
Supply Voltage 4.5 5 5.5 V
Total Supply Current 35 42 52 mA
Supply Voltage Sensitivity 4.3 mA/V
Temperature Sensitivity −40°C ≤ TA ≤ +85°C 45.7 µA/°C
Data Sheet AD8353
Rev. F | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage, VPOS 5.5 V
Input Power (re: 50 Ω)
10 dBm
Equivalent Voltage 700 mV rms
Internal Power Dissipation
Paddle Not Soldered 325 mW
Paddle Soldered 812 mW
θ
JA
(Paddle Soldered)
80°C/W
θJA (Paddle Not Soldered)
200°C/W
Maximum Junction Temperature 150°C
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 260°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
AD8353 Data Sheet
Rev. F | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. NC = NO CO NNE C T. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED PAD MUST BE CONNECTED TO A
LO W I M P E DANCE GRO UND P AD.
1COM1
2NC
3RFIN
4COM2
8COM1
7RFOUT
6 VPOS
5COM2
AD8353
TOP VIEW
(Not t o S cale)
02721-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 8 COM1 Device Common. Connect to low impedance ground.
2 NC No Connection.
3 RFIN RF Input Connection. Must be ac-coupled.
4, 5 COM2 Device Common. Connect to low impedance ground.
6
VPOS
Positive Supply Voltage.
7 RFOUT RF Output Connection. Must be ac-coupled.
EPAD Exposed Pad. The exposed pad must be connected to a low impedance ground pad.
Data Sheet AD8353
Rev. F | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
180
150
120
90
60
30
330
300
270
240
210
02721-003
Figure 3. S11 vs. Frequency, VS = 3 V, TA = 25°C, dc ≤ f ≤ 3 GHz
02721-004
25
500 1000 1500 2000 3000
GAIN (dB)
20
15
10
5
02500
GAIN AT 3.3V
GAIN AT 2.7V
GAIN AT 3.0V
0FREQUENCY (MHz)
Figure 4. Gain vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
02721-005
500 1000 1500 2000 3000
REVERSE ISOLATION (dB)
25000 FREQUENCY (MHz)
S
12
AT 3.0V
0
–20
–30
–10
–15
–25
–5
–35
–40
S
12
AT 2.7V
S
12
AT 3.3V
Figure 5. Reverse Isolation vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
180
150
120
90
60
30
330
300
270
240
210
02721-006
Figure 6. S22 vs. Frequency, VS = 3 V, TA = 25°C, dc ≤ f ≤ 3 GHz
02721-007
500 1000 1500 2000 3000
GAIN (dB)
25000 FREQUENCY (MHz)
15
10
5
0
20
25
GAIN AT +85°C
GAIN AT +25°C
GAIN AT –40°C
Figure 7. Gain vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
02721-008
500 1000 1500 2000 3000
REVERSE ISOLATION (dB)
25000 FREQUENCY (MHz)
S
12
AT –40°C
S
12
AT +25°C
0
–20
–30
–10
–15
–25
–5
–35
–40 S
12
AT +85°C
Figure 8. Reverse Isolation vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
AD8353 Data Sheet
Rev. F | Page 8 of 16
02721-009
500 1000 1500 2000 300025000 FREQUENCY (MHz)
10
6
4
2
12
8
0
P
1dB
AT 3.0V
P
1dB
AT 3.3V
P
1dB
AT 2.7V
P
1dB
(dBm)
Figure 9. P1dB vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
02721-010
7.0 7.2
35
10
45
25
0
40
20
15
30
5
7.4 7.6 7.8 8.0 8.2 8.4 8.6 8.8 9.0
OUTPUT 1dB COMPRESSION POINT (dBm)
PERCENTAGE (%)
Figure 10. Distribution of P1dB, VS = 3 V, TA = 25°C, f = 2.2 GHz
02721-011
OIP3 (dBm)
FREQUENCY (MHz)
5000 1000 1500 2000 2500
26
16
14
12
3000
28
20
10
22
18
24
OIP3 AT 3.0V OIP3 AT 2.7V
OIP3 AT 3.3V
Figure 11. OIP3 vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
02721-012
500 1000 1500 2000 300025000 FREQUENCY (MHz)
10
6
4
2
12
8
0
P
1dB
AT +25°C P
1dB
AT +85°C
P
1dB
AT –40°C
P
1dB
(dBm)
Figure 12. P1dB vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
02721-013
OIP3 (dBm)
PERCENTAGE (%)
19.1
30
0
25
15
10
20
5
19.5 19.9 20.3 20.7 21.1 21.5 21.9
Figure 13. Distribution of OIP3, VS = 3 V, TA = 25°C, f = 2.2 GHz
02721-014
OIP3 (dBm)
FREQUENCY (MHz)
5000 1000 1500 2000 2500
26
16
14
12
3000
28
20
10
22
18
24 OIP3 AT –40°C
OIP3 AT +85°C OIP3 AT +25°C
Figure 14. OIP3 vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
Data Sheet AD8353
Rev. F | Page 9 of 16
02721-015
NOISE FIGURE (dBm)
FREQUENCY (MHz)
500 1000 1500 2000 2500
5.5
5.0
4.5
4.0 3000
8.0
6.5
7.0
6.0
7.5
NF AT 3. 3V
NF AT 2. 7V NF AT 3.0V
0
Figure 15. Noise Figure vs. Frequency, VS = 2.7 V, 3 V, and 3.3 V, TA = 25°C
02721-016
PERCENTAGE (%)
NOISE FIGURE (dB)
5.90 5.95
10
35
25
0
30
20
15
5
6.00 6.10 6.15 6.30 6.35 6.45 6.50 6.556.20 6.25 6.40 6.60
6.05
Figure 16. Distribution of Noise Figure, VS = 3 V, TA = 25°C, f = 2.2 GHz
02721-017
180
150
120
90
60
30
0
330
300
270
240
210
Figure 17. S11 vs. Frequency, VS = 5 V, TA = 25°C, dc ≤ f ≤ 3 GHz
02721-018
NOISE FIGURE (dB)
FREQUENCY (MHz)
500 1000 1500 2000 2500
5.5
5.0
4.5
4.0 3000
8.0
8.5
6.5
7.0
6.0
7.5
0
Ð
�
�
NF AT +85°C
NF AT +25°C
NF AT –40°C
Figure 18. Noise Figure vs. Frequency, VS = 3 V, TA = −40°C, +25°C, and +85°C
02721-019
SUPP LY CURRE NT (mA)
TEMPERATURE (°C)
–60
10
50
40
0
45
30
15
5
040
35
25
20
–40 20 60 80–20 100
I
S
AT 3.3V
I
S
AT 3.0V
I
S
AT 2.7V
Figure 19. Supply Current vs. Temperature, VS = 2.7 V, 3 V, and 3.3 V
02721-020
180
150
120
90
60
30
0
330
300
270
240
210
Figure 20. S22 vs. Frequency, VS = 5 V, TA = 25°C, dc ≤ f ≤ 3 GHz
AD8353 Data Sheet
Rev. F | Page 10 of 16
02721-021
25
500 1000 1500 2000 3000
GAIN (dB)
20
15
10
5
02500
GAIN AT 5.0V
0FREQUENCY (MHz)
GAIN AT 4.5V
GAIN AT 5.5V
Figure 21. Gain vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C
02721-022
REVERSE ISOLATION (dB)
FREQUENCY (MHz)
S
12
AT 5V
S
12
AT 5.5V
S
12
AT 4.5V
500 1000 1500 2000 2500
–20
–30
–35
3000
0
–10
–40
–15
–25
–5
0
Figure 22. Reverse Isolation vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C
02721-023
P
1dB
(d Bm)
FREQUENCY (MHz)
500 1000 1500 2000 2500
5
3
1
3000
10
9
0
7
4
2
6
8
0
P
1dB
AT 5.5V
P
1dB
AT 5.0V P
1dB
AT 4.5V
Figure 23. P1dB vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C
02721-024
25
500 1000 1500 2000 3000
GAIN (dB)
20
15
10
5
02500
0FREQUENCY (MHz)
GAIN AT +85°C
GAIN AT +25°C
GAIN AT –40°C
Figure 24. Gain vs. Frequency, VS = 5 V, TA = −40°C, +25°C, and +85°C
02721-025
REVERSE ISOLATION (dB)
FREQUENCY (MHz)
500 1000 1500 2000 2500
–20
–30
–35
3000
0
–10
–40
–15
–25
–5
0
S
12
AT +85°C
S
12
AT +25°C
S
12
AT –40°C
Figure 25. Reverse Isolation vs. Frequency, VS = 5 V, TA = −40°C, +25°C, and +85°C
02721-026
500 1000 1500 2000 300025000 FREQUENCY (MHz)
10
6
4
2
12
8
0
P
1dB
AT –40°C
P
1dB
AT +85°C P
1dB
AT +25°C
P
1dB
(dBm)
Figure 26. P1dB vs. Frequency, VS = 5 V, TA = –40°C, +25°C, and +85°C
Data Sheet AD8353
Rev. F | Page 11 of 16
02721-027
35
10
45
25
0
40
20
15
30
5
OUTPUT 1dB COMPRESSION POINT (dBm)
PERCENTAGE (%)
7.0 7.2 7.4 7.8 8.2 8.4 8.6
8.0 8.87.6
Figure 27. Distribution of P1dB, VS = 3 V, TA = 25°C, f = 2.2 GHz
02721-028
FREQUENCY (MHz)
OIP3 (dBm)
500 1000 1500 2000 2500
20
16
12
3000
26
24
10
18
14
22
0
OIP3 AT 5.0V
OIP3 AT 5.5V
OIP3 AT 4.5V
Figure 28. OIP3 vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 27°C
02721-029
NOISE FIGURE (dB)
FREQUENCY (MHz)
500 1000 1500 2000 2500
6.5
5.5
4.5
3000
9.0
8.0
4.0
6.0
5.0
7.0
8.5
7.5
0
NF AT 5.0V
NF AT 5.5V
NF AT 4.5V
Figure 29. Noise Figure vs. Frequency, VS = 4.5 V, 5 V, and 5.5 V, TA = 25°C
02721-030
OIP3 (dBm)
PERCENTAGE (%)
18.8 20.0
10
30
0
20
5
20.4 21.2 21.6
20.8
25
15
19.6
19.2
Figure 30. Distribution of OIP3, VS = 5 V, TA = 25°C, f = 2.2 GHz
02721-031
FREQUENCY (MHz)
OIP3 (dBm)
500 1000 1500 2000 2500
20
16
12
3000
26
24
10
18
14
22
0
OIP3 AT +25°C OIP3 AT +85°C
OIP3 AT –40°C
Figure 31. OIP3 vs. Frequency, VS = 5 V, TA = –40°C, +25°C, and +85°C
02721-032
FREQUENCY (MHz)
NOISE FIGURE (dBm)
500 1000 1500 2000 2500
7
5
3000
10
9
4
8
6
NF AT +85°C
NF AT +25°C
NF AT –40°C
0
Figure 32. Noise Figure vs. Frequency, VS = 5 V, TA = –40°C, +25°C, and +85°C
AD8353 Data Sheet
Rev. F | Page 12 of 16
02721-033
PERCENTAGE (%)
NOISE FIGURE (dB)
6.10 6.15
10
30
0
25
15
5
6.20 6.25 6.30 6.35 6.45 6.55 6.60 6.65 6.706.40 6.50
20
Figure 33. Distribution of Noise Figure, VS = 5 V, TA = 25°C, f = 2.2 GHz
02721-034
SUPPLY CURRENT (mA)
TEMPERATURE (°C)
–60
10
50
40
0
45
30
15
5
0 40
35
25
20
–40 20 60 80–20 100
I
S
AT 5.0V
I
S
AT 5.5V
I
S
AT 4.5V
Figure 34. Supply Current vs. Temperature, VS = 4.5 V, 5 V, and 5.5 V
30
35
40
45
50
55
–10 –9 –8 –7 –6 –5 –4 –3 –2 –1 0 1 23 4 5 6 7 8 9
SUPPLY CURRENT ( mA)
I
S
AT 3V + 85°C
I
S
AT 5V + 25°C
I
S
AT 5V + 85°C
P
OUT
(d Bm)
I
S
AT 5V –40°C
I
S
AT 3V –40°C
I
S
AT 3V + 25°C
02721-135
Figure 35. Supply Current vs. Temperature, VS = 3 V and
5 V Frequency = 900 MHz
02721-035
POUT (dBm)
GAIN (dB)
PIN (dBm)
–30 50–25 –20 –15 –10 –5
5
0
15
–15
10
–5
–10
20
14
19
18
17
16
15
Figure 36. Output Power and Gain vs. Input Power, VS = 3 V, TA = 25°C, f = 900 MHz
02721-036
POUT (dBm)
GAIN (dB)
PIN (dBm)
–30 5
0–25 –20 –15 –10 –5
5
0
15
–15
10
–5
–10
20
14
19
18
17
16
15
Figure 37. Output Power and Gain vs. Input Power, VS = 5 V, TA = 25°C, f = 900 MHz
Data Sheet AD8353
Rev. F | Page 13 of 16
THEORY OF OPERATION
The AD8353 is a 2-stage, feedback amplifier employing both
shunt-series and shunt-shunt feedback. The first stage is
degenerated and resistively loaded and provides approximately
10 dB of gain. The second stage is a PNP-NPN Darlington
output stage, which provides another 10 dB of gain. Series-
shunt feedback from the emitter of the output transistor sets the
input impedance to 50 Ω over a broad frequency range. Shunt-
shunt feedback from the amplifier output to the input of the
Darlington stage helps to set the output impedance to 50 Ω. The
amplifier can be operated from a 3 V supply by adding a choke
inductor from the amplifier output to VPOS. Without this
choke inductor, operation from a 5 V supply is also possible.
BASIC CONNECTIONS
The AD8353 RF gain block is a fixed gain amplifier with
single-ended input and output ports whose impedances are
nominally equal to 50 Ω over the frequency range 1 MHz to
2.7 GHz. Consequently, it can be directly inserted into a 50 Ω
system with no impedance matching circuitry required.
The input and output impedances are sufficiently stable vs.
variations in temperature and supply voltage that no impedance
matching compensation is required. A complete set of
scattering parameters is available at http://www.analog.com.
The input pin (RFIN) is connected directly to the base of the first
amplifier stage, which is internally biased to approximately 1 V;
therefore, a dc blocking capacitor should be connected between the
source that drives the AD8353 and the input pin, RFIN.
It is critical to supply very low inductance ground connections
to the ground pins (Pin 1, Pin 4, Pin 5, and Pin 8) as well as to
the backside exposed paddle. This ensures stable operation.
The AD8353 is designed to operate over a wide supply voltage
range, from 2.7 V to 5.5 V. The output of the part, RFOUT, is
taken directly from the collector of the output amplifier stage.
This node is internally biased to approximately 2.2 V when the
supply voltage is 5 V. Consequently, a dc blocking capacitor
should be connected between the output pin, RFOUT, and the
load that it drives. The value of this capacitor is not critical, but
it should be 100 pF or larger.
When the supply voltage is 3 V, it is recommended that an
external RF choke be connected between the supply voltage
and the output pin, RFOUT. This increases the dc voltage
applied to the collector of the output amplifier stage, which
improves performance of the AD8353 to be very similar to the
performance produced when 5 V is used for the supply voltage.
The inductance of the RF choke should be approximately
100 nH, and care should be taken to ensure that the lowest
series self-resonant frequency of this choke is well above the
maximum frequency of operation for the AD8353. For lower
frequency operation, use a higher value inductor.
Bypass the supply voltage input, VPOS, using a large value
capacitance (approximately 0.47 µF or larger) and a smaller,
high frequency bypass capacitor (approximately 100 pF)
physically located close to the VPOS pin.
The recommended connections and components are shown in
Figure 41.
AD8353 Data Sheet
Rev. F | Page 14 of 16
APPLICATIONS INFORMATION
The AD8353 RF gain block can be used as a general-purpose,
fixed gain amplifier in a wide variety of applications, such as a
driver for a transmitter power amplifier (see Figure 38). Its
excellent reverse isolation also makes this amplifier suitable for
use as a local oscillator buffer amplifier that would drive the
local oscillator port of an upconverter or downconverter mixer
(see Figure 39).
AD8353 HIGH POWER
AMPLIFIER
02721-037
Figure 38. AD8353 as a Driver Amplifier
AD8353
MIXER
LOCAL OSCILLATOR
04862-038
Figure 39. AD8353 as a LO Driver Amplifier
LOW FREQUENCY APPLICATIONS BELOW 100 MHz
The AD8353 RF gain block can be used below 100 MHz. To
accomplish this, the series dc blocking capacitors, C1 and C2,
need to be changed to a higher value that is appropriate for the
desired frequency. C1 and C2 were changed to 0.1 µF to
accomplish the sweep in Figure 40.
02721-042
21.0
20.5
20.0
19.5
19.0
18.5
18.0
17.5
17.0
16.5
16.0
dB-S21
CH 1: START 300.000kHz STOP 100.000MHz
Figure 40. Low Frequency Application from
300 kHz to 100 MHz at 5 V VPOS, −12 dBm Input Power
Data Sheet AD8353
Rev. F | Page 15 of 16
EVALUATION BOARD
Figure 41 shows the schematic of the AD8353 evaluation board.
Note that L1 is shown as an optional component that is used to
obtain maximum gain only when VP = 3 V. The board is powered
by a single supply in the 2.7 V to 5.5 V range. The power supply
is decoupled by a 0.47 µF and a 100 pF capacitor.
6
5
7
8
NC = NO CONNECT
02721-039
COM1
NC
RFIN
COM1
RFOUT
VPOS
COM2COM2
AD8353
C3
100pF C4
0.47µF
OUTPUT
1
2
3
4
C1
1000pF
C2
1000pF
INPUT L1
Figure 41. Evaluation Board Schematic
Table 5. Evaluation Board Configuration Options
Component Function
Default
Value
C1, C2 AC coupling capacitors. 1000 pF,
0603
C3 High frequency bypass capacitor. 100 pF
0603
C4 Low frequency bypass capacitor. 0.47 µF,
0603
L1 Optional RF choke, used to increase
current through output stage when
VP = 3 V. Not recommended for use
when VP = 5 V.
100 nH,
0603
04862-040
Figure 42. Silkscreen Top
04862-041
Figure 43. Component Side
AD8353 Data Sheet
Rev. F | Page 16 of 16
OUTLINE DIMENSIONS
SEATING
PLANE
0.30
0.23
0.18 0.203 REF
0.80
0.75
0.70
1.89
1.74
1.59
0.50 BSC
0.20 MIN
0.60
0.45
0.30
0.55
0.40
0.30
BOTT OM VIEW
41
58
3.25
3.00
2.75
2.25
2.00
1.75
TOP VI EW
0.05 M A X
0.02 NOM
EXPO SED PAD
PKG-004467
PIN 1 INDEX
AREA
02-13-2017-
A
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE P IN CONF IGURATION AND
FUNCTI ON DE S C RIPTI ONS
SECTION OF THIS DATA SHEET
PIN 1
INDICATOR AREA OPTIONS
(SEE DETAIL A)
DETAIL A
(JEDEC 9 5 )
Figure 44. 8-Lead Lead Frame Chip Scale Package [LFCSP]
2 mm × 3 mm Body and 0.75 mm Package Height
(CP-8-23)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
AD8353ACPZ-REEL7 −40°C to +85°C 8-Lead Lead Frame Chip Scale Package [LFCSP], 7" Tape
and Reel
CP-8-23 0E
AD8353-EVALZ Evaluation Board
1 Z = RoHS Compliant Part.
© 2002–2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02721-0-2/17(F)