Memory Module Specifications KVR16LSE11/4HB 4GB 1Rx8 512M x 72-Bit PC3L-12800 CL11 204-Pin ECC SODIMM DESCRIPTION SPECIFICATIONS This document describes ValueRAM's 512M x 72-bit (4GB) DDR3L-1600 CL11 SDRAM (Synchronous DRAM), 1Rx8, ECC, low voltage, memory module, based on nine 512M x 8-bit FBGA components. The SPD is programmed to JEDEC standard latency DDR3-1600 timing of 11-11-11 at 1.35V and backwards compatible at 1.5V. This 204-pin SODIMM uses gold contact fingers. The electrical and mechanical specifications are as follows: CL(IDD) 11 cycles Row Cycle Time (tRCmin) 48.125ns (min.) Refresh to Active/Refresh Command Time (tRFCmin) 260ns (min.) Row Active Time (tRASmin) 35ns (min.) Maximum Operating Power (1.35V) = 1.46 W* UL Rating 94 V - 0 Operating Temperature 0o C to 85o C FEATURES Storage Temperature -55o C to +100o C * JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V) Power Supply *Power will vary depending on the SDRAM. * VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V) * 800MHz fCK for 1600Mb/sec/pin * 8 independent internal bank * Programmable CAS Latency: 5, 6, 7, 8, 9, 10, 11 * Programmable Additive Latency: 0, CL - 2, or CL - 1 clock * 8-bit pre-fetch * Burst Length: 8 (Interleave without any limit, sequential with starting address "000" only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS] * Bi-directional Differential Data Strobe * With Integrated onboard Temperature Sensor EEPROM * Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm 1%) * On Die Termination using ODT pin * Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE < 95C * Asynchronous Reset * PCB: Height 1.18" (30mm), double sided component SDRAM SUPPORTED Hynix (B-Die) Continued >> Document No. VALUERAM1463-001.A00 04/01/15 Page 1 Document No. VALUERAM1463-001.A00 Page 2