General Description The MIC4423/4424/4425 family of parts are CMOS butter/ drivers built using a highly reliable BCD process. They are higher output current versions of the new MIC4426 family of buffer/drivers, which, in turn, are improved versions of the MIC426/427/428 family. All three families are pin-compatible. The MIC4423/24/25 drivers are capable of giving reliable service in far more demanding electrical environments than their antecedents. They will not latch under any conditions within their power and voltage ratings. They are not subject to damage when up to 5V of noise spiking, of either polarity, occurs on the ground pin. They can accept, without either damage or logic upset, up to half an amp of reverse current (of either polarity) being forced back into their outputs. All terminals are fully protected against up to 2kV of electrostatic discharge. Asaresult, the MIC4423/24/25 series drivers are much easier to use, more flexible in operation, and much more forgiving than any other driver, CMOS or bipolar, currently available. Because they are fabricated in BICMOS/DMOS, they dissipate a minimum of power, and provide rail-to-rail voltage swings to better insure the logic state of any load they drive. Although primarily intended for driving power MOSFETs, the 4423/4424/4425 series drivers are equally well suited to driving any other load (capacitive, resistive, or inductive) which requires a low-impedance driver capable of high peak currents and fast switching times. For example, heavily loaded clock lines, coaxial cables, or piezoelectric transducers all can be driven from the MIC4423/24/25. The only known limitation on loading is that total power dissipated in the driver must be kept within the maximum power dissipation limits of the package. MIC4423/4424/4425 3A Dual High Speed MOSFET Driver Bipolar/CMOS/DMOS Process Features e Built using reliable. low power Bipolar/CMOS/DMOS process Latch-Up Protected: Withstands >500mA Reverse Current Logic Input Will Withstand Negative Swing to -5V ESD Protected oo... cece creer eeetneetseeseerteeeee High Peak Output Current * Wide Operating Range .......0... eee 4.5V to 18V High Capacitive Load Drive Capability... eee 1800pF in 25nS e = Short Delay Times oo... cece etree <40nS typ. * Consistent Delay Times with Changes in Supply Voltage * Matched Rise and Fail Times Logic High Input for Any Voltage From 2.4V to Vgt Logic Input Threshold Independent of Supply Voltage Low Supply Current 3.5mA with Logic 1 Input 350A with Logic 0 Input Low Output Impedance 00... eects 3.52 typ. * Qutput Voltage Swing to Within 25mV of Ground or Vet Pin-Out Same as MIC426/427/428 Available in Inverting, Non-Inverting, and Differential Configurations e MIL-STD-883 Method 5004/5005 version available As MOSFET drivers, the MIC4423/24/25 can easily switch 1000pF gate capacitances in under 30nS, and provide low enough impedances in both the ON and OFF states to assure that a MOSFET's intended state will not be affected even by large transients. Functional Diagram S ar ot 300mVv V5 45V OR 20V (WHICHEVER IS LESS) | INPUT [ +e : wae a ] [7> p omnia > Is INVERTING OUTPUTS tT 4 OUTPUT OUTPUTS | a GND + EFFECTIVE INPUT C 20pF (each input) 2-43MiC4423/4424/4425 Micrel Ordering Information Part Number Temperature Range Package Configuration MIC4423CWM Orc to +70C 16-Pin SO Wide Dual Inverting MIC4423BWM 40C to +85C MIC4423CN 0C to +70C 8-Pin Plastic DIP Dual Inverting MIC4423BN ~40C to +85C MIC4423BJ 25C to +85C 8-Pin CerDIP Dual Inverting MIC4423AJ -55C to +125C MIC4423AJB* ~55C to +125C MIC4424CWM orc ta +70C 16-Pin SO Wide Dual Non-Inverting MiC4424BWM 40C to +85C MIC4424CN 0C to +70C 8-Pin Plastic DIP Dual Non-Inverting MIC4424BN 40C to +85C MIC4424BJ -25C to +85C 8-Pin CerDIP Dual Non-Inverting MIC4424AJ ~55C to +125C MIC 4424AJB* ~55C to +125C MIC4425CWM 0C to +70C 16-Pin SO Wide | Inverting + Non Inverting MIC4425BWM 40C to +85C MIC4425CN OSC to +70C 8-Pin Plastic DIP | Inverting + Non inverting MIC4425BN 40C to +85C MIC4425BJ 25C to +85C 8-Pin CerDIP Inverting + Non Inverting MIC4425AJ ~55C to +125C MIC4425AJB" 55C to +125C * AJB indicates units screened to MIL-STD 883, Method 5004, condition B, and burned-in for 1-week. Absolute Maximum Ratings (Notes 1, 2, and 3) if Military/Aerospace specified devices are required, contact Micrel for availability and specifications. Package Power Dissipation 1000 Supply Voltage 22V aco SLOPE = -8mwi"C Maximum Chip Temperature 150C Storage Temperature Range -65C to 150C Lead Temperature (10 sec.) 300C sco SLOPE = -6.4mwrC Package Thermal Resistance = CERDIP Regy-a 150C/W = CERDIP Rej-c 50C/W ao 00 PDIP Raya 125C/w PDIP Resc 42C/'W SOIC Rey-a 250C/W noo |_SLOPE = anne SOIC Reas-c 75CIW Operating Temperature Range C Version arc to +70C B Version -40C to +85C oe 50 ets A Version 55C to +125C AMBIENT TEMPERATURE (C) 2-44MIC4423/4424/4425 Micrel MIC4423/4424/4425 Electrical Characteristics: Specifications measured at Ta = 25C with 4.5V < Vs < 18V unless otherwise specified. Symbol Parameter [ Conditions | Min | Typ | Max | Units INPUT VIH Logic 1 Input Voltage 2.4 v VIL Logic 0 Input Voltage 0.8 Vv lin Input Current -5V < Vins Vs ~1 1 uA OUTPUT VOH High Output Voltage Vsg-0.025 Vv VoL Low Output Voltage 0.025 v Ro Output Resistance HI State lout = 10mA, Vs = 18V 2.8 5 Q Ro Output Resistance LO State louT = 10mA, Vg = 18V 3.5 5 9 IpK Peak Output Current 3 A | Latch-Up Protection Withstand Reverse Current >500 mA SWITCHING TIME TR Rise Time Test Figure 1, CL = 1800pF 23 35 ns Te Fail Time Test Figure 1, CL = 1800pF 25 35 ns Toi Delay Time Test Figure 1, C,_ = 1800pF 33 75 ns Tpo2 Delay Time Test Figure 1, C, = 1800pF 38 75 ns POWER SUPPLY Is Power Supply Current VIN = 3.0V (Both Inputs) 1.5 2.5 mA Is Power Supply Current Vin = 0.0V (Both Inputs) 0.15 0.25 mA MIC4423/4424/4425 Electrical Characteristics: Specifications measured over operating temperature range with 4.5V < Vs < 18V unless otherwise specified. Symbol Parameter | Conditions | Min Typ Max | Units INPUT VIH Logic 1 Input Voltage 2.4 Vv VIL Logic 0 Input Voltage 0.8 Vv UN Input Current -5< Vins Vs 10 10 pA OUTPUT VOH High Output Voltage Vs-0.025 Vv VoL Low Output Voltage 0.025 Vv 2-45MIC4423/4424/4425 Micrel MIC4423/4424/4425 Electrical Characteristics: Specifications measured over operating temperature range with 4.5V < Vs < 18V unless otherwise specified. Symbol Parameter Conditions | Min | Typ | Max Units OUTPUT Ro Output Resistance, Output High | Vin = 0.8V lout = 10mA, Vg = 18V 3.7 8 2 Ro Output Resistance, Output Low | Vin = 2.4V lout = 10mA, Vg = 18V 43 8 Q SWITCHING TIME Tr Rise Time Test Figure 1, C= 1800pF 28 60 ns Tr Fall Time Test Figure 1, C, = 1800pF 32 60 ns Toi Delay Time Test Figure 1, CL = 1800pF 32 100 ns Tp2 Delay Time Test Figure 1, C, = 1800pF 38 100 ns POWER SUPPLY Is Power Supply Current Vin = 3.0V (Both Inputs) 20 3.5 mA Is Power Supply Current Vin = 0.0V (Both inputs) 0.20 0.3 mA Note 1: Functional operation above the absolute maximum stress ratings is not implied. Note 2: Static Sensitive device. Unused devices must be stored in conductive material to protect devices from static discharge and static fields. Note 3: Switching times guaranteed by design. Vg = 18V 2 | 4.7pF IH HH 2.4 5.7 INPUT & Figure 1. Switching Time Test Circuit 0.1uF +5V INPUT o4V 18V OUTPUT av rT OUTPUT C.=1 F L = 1800p +5V INPUT 0.4V 1av OUTPUT ov INVERTING DRIVER NON-INVERTING DRIVER 2-46MIC4423/4424/4425 Typical Characteristic Curves Micrel Rise Time vs Supply Voltage Fall Time vs Supply Voltage 100 100 4700pF 4700pF 80 80 3300pF g 60 ge 60 B Z 2200pF = 40 e 40 20 20 1500pF 1 0 0 4 6 8 10 12 14 #16 18 4 6 8 10 12 14 16 18 Vsuppty(V) Veuppiy(V) Rise Time vs Capacitive Load Fall Time vs Capacitive Load 100 80 ~ 60 = g 2 x 3 oO < Fes 40 E 20 0 100 1000 10000 100 1000 10000 Coan (pF) Coan (pF) Propagation Delay vs Rise and Fall Time vs Temperature Input Amplitude 32 Coan = 2200pF Tea Veuppy = 10V iL 100 SUPPLY = 30 Croan = 28 Trise 80 wn n Ke 24 - 60 22 40 20 F-Trau 18 20 +55 -35 -15 5 25 45 65 85 105 125 04123 45 67 8 9 101112 TEMPERATURE (C) Input (V) 2-47MIC4423/4424/4425 Typical Characteristic Curves (Continued) Supply Current vs Capacitive Load Vsuppty = 18V = E > 2 a 355kHz 200KIZ 63.4kHz M2.5kHz 35.5kHz 20kHz 100 1000 10000 Coan (pF) Supply Current vs Capacitive Load Vsupp.y = 12V 2.0MHz = E = 1.125MHz z a 2 a 634kHz 355kHz 112.5kHz 63.4kHz 20kHz 100 1000 10000 C.oac (pF) Supply Current vs Capacitive Load 120 Vsuppcy = 6V 10G < 80 > a 60 a ~ 40 634kHz 2.0MHz 20 $1.125MHz 355kHz 112.5kHz 0 20kHz 100 1000 10000 Coan (pF) Micrel Supply Current vs Frequency Vsuppiy = 18V 1000pF IsuppLy (mA) 10 100 1000 FREQUENCY (kHz) Supply Current vs Frequency Vsuppry = 12V] 4 3300pF 1000pF Isuppiy (MA) 10 100 1000 FREQUENCY (kHz) Supply Current vs Frequency Veuep_y = 6V 4700pF 2200pF IsuppLy (mA) 1000pF 100pF 10 100 1000 FREQUENCY (kHz) 2-48MIC4423/4424/4425 Micrel Typical Characteristic Curves (Continued) Propagation Delay Time vs Supply Voltage Delay Time vs Temperature 50 50 Tt T Croan = 2200pF Croan = 2200pF Too | c 45 45 aan LH Tos 40 40 i ~ _ Le 36 2 35 K be | a 30 30 ~ 25 25 20 20 | L | 4 6 8 10 #12 14 #16 18 -55 -35 -15 5 25 45 65 85 105 125 Vsuppcy (V) TEMPERATURE (C) Quiescent Supply Current vs Voltage Quiescent Current vs Temperature Ty = 25C BOTH INPUTS = 1 INPUTS = 1 BOTH INPUTS = 0 quiescent (MA) I quiescent (MA) INPUTS = 0 55-35-15 5 25 45 65 85 105 125 4 6 8 10 12 14 16 18 TEMPERATURE (C) Vsuppiy (V) Output Resistance (Output High) Output Resistance (Output Low) vs Supply Voltage vs Supply Voltage 4 T 1 12 \ \ WC @ 150C Ty WC @ 150C Ty = 40 N g g 8 2 o ~~, a 6 SA |e 4 t i 2 4 6 8 10 12 14 16 #18 4 6 8 10 12 14 16 18 Vguppcy (V} Vsuppiy(V) 2-49MIC4423/4424/4425 Application information Although the MIC4423/24/25 drivers have been specifically constructed to operate reliably under any practical circumstances, there are nonetheless details of usage which will provide better operation of the device. Supply Bypassing Charging and discharging large capacitive loads quickly requires large currents. For example, charging 2000pF from 0 to 15 volts in 20nS requires a constant current of 1.5A. In practice, the charging current is not constant, and will usually pak at around 3A. In order to charge the capacitor, the driver must be capable of drawing this much current. this quickly, from the system power supply. In turn, this means that as far as the driver is concerned, the system power supply, as seen by the driver, must have a VERY low impedance. As a practical matter, this means that the power supply bus must be capacitively bypassed at the driver with at least 100X the load capacitance in order to achieve optimum driving speed. It also implies that the bypassing capacitor must have very low internal inductance and resistance at all frequencies of interest. Generally, this means using two capacitors, one a high-performance low ESR film, the other a low internal resistance ceramic, as together the valleys in their two impedance curves allow adequate performance over a broad enough band to get the job done. PLEASE NOTE that many film capacitors can be sufficiently inductive as to be useless for this service. Likewise, many multilayer ceramic capacitors have unacceptably high internal resistance. Use capacitors intended for high pulse current service. (in-house we use WIMA film capacitors and AVX Ramguard ceramics. Several other manufacturers of equivalent devices exist.) The high pulse current demands of capacitive drivers also mean that the bypass capacitors must be mounted very close to the driver in order to prevent the effects of lead inductance or PCB land inductance from nullifying what you are trying to accomplish. For optimum results the sum of the lengths of the leads and the lands from the capacitor body to the driver body should total 2.5cm or less. Bypass capacitance, and its close mounting to the driver serves two purposes. Not only does it allow optimum performance from the driver, it minimizes the amount of lead length radiating at high frequency during switching, (due to the large A!) thus minimizing the amount of EMI later available for system disruption and subsequent cleanup. It should also be noted that the actual frequency of the EMI produced by a driver is not the clock frequency at which it is driven, but is related to the highest rate of change of current produced during switching, a frequency generally one or two orders of magnitude higher, and thus more difficult to filter if you let it permeate your system. Good bypassing practice is essential to proper operation of high speed driver ICs. Grounding Both proper bypassing and proper grounding are necessary for optimum driver operation. Bypassing capacitance only allows a driver to turn the load ON. Eventually (except in rare Micrel circumstances) it is also necessary to turn the ioad OFF. This requires attention to the ground path. Two things other than the driver affect the rate at which it is possible to turn a load off: The adequacy of the grounding available for the driver, and the inductance of the leads from the driver to the load. The latter will be discussed in a separate section. Best practice for a ground path is obviously a well laid out ground piane. However, this is not always practical, and a poorly-laid cut ground plane can be worse than none. Attention to the paths taken by return currents even in a ground plane is essential. In general, the leads from the driver to its load, the driver to the power supply, and the driver to whatever is driving it should ail be as low in resistance and inductance as possible. Of the three paths. the ground lead from the driver to the logic driving it is most sensitive to resistance or inductance, and ground current from the Joad are whatis most likely to cause disruption. Thus, these ground paths should be atranged so that they never share a land, or do so for as short a distance as is practical. To illustrate what can happen, consider the following: The inductance of a 2cm long fand, 1.59mm (0.062") wide on a PCB with no ground plane is approximately 45nH. Assuming a di/dt of 0.3A/nS (which will allow a current of 3A to flow after 10nS, and is thus slightly slow for our purposes) a voltage of 13.5 Volts will develop along this land in response to our postulated AI. Fora 1cm land. (approximately 15nH) 4.5 Volts is developed. Either way, anyone using TTL-level input signals to the driver will find that the response of their driver has been seriously degraded by a common ground path for input to and output from the driver of the given dimensions. Note that this is before accounting for any resistive drops in the circuit. The resistive drop in a 1.59mm (0.062") land of 20z. Copper carrying 3A will be about 4mV/cm (10mV/in) at DC, and the resistance will increase with frequency as skin effect comes into play. The problem is most obvious in inverting drivers where the input and output currents are in phase so that any attempt to raise the driver's input voltage (in order to turn the driver's load off) is countered by the voltage developed on the common ground path as the driver attempts to do what it was supposed to. It takes very little common ground path, under these circumstances, to alter circuit operation drastically. Output Lead Inductance The same descriptions just given for PCB land inductance apply equally well for the output leads from a driver to its load. except that commonly the load is located much further away from the driver than the driver's ground bus. Generally, the best way to treat the output lead inductance probiem, when distances greater than 4cm (2") are involved, requires treating the output leads as a transmission line. Unfortunately, as both the output impedance of the driver and the input impedance of the MOSFET gate are atleast an order of magnitude lower than the impedance of common coax, using coax is seldom a cost-effective solution. A twisted pair works about as well, is generally lower in cost. and allows use of a wider variety of connectors. The second wire of the 2-50MIC 4423/4424/4425 twisted pair should carry common from as close as possible to the ground pin of the driver directly to the ground terminal of the load. Do not use a twisted pair where the second wire in the pair is the output of the other driver, as this will not provide a complete current path for either driver. Likewise, do not use a twisted triad with two outputs and a common return unless both of the loads to be driver are mounted extremely close to each other, and you can guarantee that they wiil never be switching at the same time. For output leads on a printed circuit, the general rule is to make them as short and as wide as possible. The lands should also be treated as transmission lines: i.e. minimize sharp bends, or narrowings in the land, as these will cause ringing. For a rough estimate, on a 1.59mm (0.062") thick G-10 PCB apair of opposing lands each 2.36mm (0.093") wide transiates to a characteristic impedance of about 50Q. Half that width suffices on a 0.787mm (0.031") thick board. For accurate impedance matching with a MIC4423/24/25 driver, on a 1.59mm (0.062") board a land width of 42.75mm (1.683") would be required, due to the low impedance of the driver and (usuaily) its load. This is obviously impractical under most circumstances. Generally the tradeoff point between lands and wires comes when jands narrower than 3.18mm (0.125") would be required on a 1.59mm (0.062") board. To obtain minimum delay between the driver and the load, it is considered best to locate the driver as close as possible to the load (using adequate bypassing). Using matching transformers at both ends of a piece of coax, or several matched lengths of coax between the driver and the load, works in theory, but is not optimum. Driving At Controlled Rates Occasionally there are situations where acontrolled rise or fall time (which may be considerably longer than the normal rise or fall time of the driver's output) is desired for a load. In such cases it is still prudent to employ best possible practice in terms of bypassing, grounding and PCB layout, and then reduce the switching speed of the load (NOT the driver) by adding a noninductive series resistor of appropriate value between the output of the driver and the load. For situations where only rise or only fall should be slowed. the resistor can be paralleled with a fast diode so that switching in the other direction remains fast. Due to the Schmitt-trigger action of the driver's input it is not possible to siow the rate of rise (or fall) of the driver's input signal to achieve slowing of the output. Input Stage The input stage of the MIC4423/24/25 consists of a single- MOSFET class A stage with an input capacitance of <38pF. This capacitance represents the maximum load from the driver that will be seen by its controlling logic. The drain load on the input MOSFET is a 2mA current source. Thus, the quiescent current drawn by the driver varies, depending on the logic state of the input. Following the input stage is a buffer stage which provides ~300mV of hysteresis for the input, to prevent oscillations Micre! when slowly-changing input signals are used or when noise is present on the input. Input voltage switching threshold is 1.5V which makes the driver directly compatible with TTL signals, or with CMOS powered from any supply voltage between 3V and 15V. The MiC4423/24/25 drivers can also be driven directly by the $G1524/25/26/27, TL494/95, TL594/95, NE5560/61/62/68, TSC170, MIC38C42, and similar switch mode power supply ICs. By relocating the main switch drive function into the driver rather than using the somewhat limited drive capabilities of a PWM IC. The PWMIC runs cooler, which generally improves its performance and longevity, and the main switches switch faster, which reduces switching losses and increase system efficiency. The input protection circuitry of the MIC 4423/24/25, in addition to providing 2kV or more of ESD protection, also works to prevent latchup or logic upset due to ringing or voltage spiking on the logic input terminal. In most CMOS devices when the logic input rises above the power supply terminal, or descends below the ground terminal, the device can be destroyed or rendered inoperable until the power supply is cycled OFF and ON. The MIC4423/24/25 drivers have been designed to prevent this. Input voltages excursions as great as 5V below ground will not alter the operation of the device. Input excursions above the power supply voltage will result in the excess voltage being conducted to the power supply terminal of the IC. Because the excess voltage is simply conducted to the power terminal, if the input to the driver is left in a high state when the power supply to the driver is turned off, currents as high as 30mA can be conducted through the driver from the input terminal to its power supply terminal. This may overload the output of whatever is driving the driver, and may cause other devices that share the driver's power supply. as well as the driver, to operate when they are assumed to be off, but it will not harm the driver itself. Excessive input voltage will also slow the driver down, and result in much longer internal propagation delays within the drivers. Tp, for example, may increase to several hundred nanoseconds. in general, while the driver will accept this sort of misuse without damage, proper termination of the line feeding the driver so that line spiking and ringing are minimized, will always result in faster and more reliable operation of the device. leave fess EMI to be filtered elsewhere, be less stressful to other components in the circuit. and leave less chance of unintended modes of operation. Power Dissipation CMOS circuits usually permit the user to ignore power dissipation. Logic families such as 4000 series and 74Cxxx have outputs which can only source or sink a few milliamps of current, and even shorting the output of the device to ground or Voc may not damage the device. CMOS drivers, on the other hand, are intended to source or sink several Amps of current. This is necessary in order to drive large capacitive loads at frequencies into the megahertz range. Package power dissipation of drivr ICs can easily be exceeded when driving large loads at high frequencies. Care must therefore be paid to device dissipation when operating in this domain. 2-51MIC 4423/4424/4425 The Supply Current vs Frequency and Supply Current vs Load characteristic curves furnished with this data sheet aid in estimating power dissipation in the driver. Operating frequency, power supply voltage, and load all affect power dissipation. Given the power dissipation in the device, and the thermal resistance of the package, junction operating temperature for any ambient is easy to calculate. For example, the thermal resistance of the 8-pin CerDIP package, from the datasheet, is 150C/W. In a 25C ambient, then, using a maximum junction temperature of 150C, this package will dissipate 800mW. Accurate power dissipation numbers can be obtained by summing the three sources of power dissipation in the device: Load power dissipation (PL) Quiescent power dissipation (Pq) Transition power dissipation (PT) Calculation of load power dissipation differs depending on whether the load is capacitive, resistive or inductive. Resistive Load Power Dissipation Dissipation caused by a resistive joad can be calculated as: PL=l2RAoD where: |= the current drawn by the load Ro = the output resistance of the driver when the output is high, at the power supply voltage used (See characteristic curves) D = fraction of time the load is conducting (duty cycle) Capacitive Load Power Dissipation Dissipation caused by a capacitive load is simply the energy placed in, or removed from, the load capacitance by the driver. The energy stored in a capacitor is described by the equation: E=1/2C V2 As this energy is lost in the driver each time the loadis charged or discharged, for power dissipation calculations the 1/2 is removed. This equation also shows that itis good practice not to place more voltage in the capacitor than is necessary, as dissipation increases as the square of the voltage applied to the capacitor. For a driver with a capacitive load: PL =F C (Vtg)? where: F = Operating Frequency C= Load Capacitance V*s = Driver Supply Voltage Inductive Load Power Dissipation For inductive loads the situation is more complicated. For the part of the cycle in which the driver is actively forcing current into the inductor, the situation is the same as it is in the resistive case: Micrel PL1=I2RoD However, in this instance the Ro required may be either the on resistance of the driver when its output is in the high state, or its on resistance when the driver is in the low state, depending on how the inductor is connected, and this is still only half the story. For the part of the cycle when the inductor is forcing current through the driver, dissipation is best described as PL2 ='Vp (1 -D) where Vp is the forward drop of the clamp diode in the driver (generally around 0.7V). The two parts of the load dissipation must be summed in to produce PL P_=P.ii+Pio Quiescent Power Dissipation Quiescent power dissipation (Pq, as described in the input section) depends on whether the input is high or low. A low input will result in a maximum current drain (per driver) of <0.2mA; a logic high will result in a current drain of <2.0mA. Quiescent power can therefore be found from: Pg = V+s5 [D 1H + (1 -D) It] where: lH = quiescent current with input high IL = quiescent current with input low D= fraction of time input is high (duty cycle) Vtg = power supply voltage Transition Power Dissipation Transition power is dissipated in the driver each time its output changes state, because during the transition, for a very brief interval, both the N- and P-channel MOSFETs in the output totem-pole are ON simultaneously, and a currentis conducted through them from Vs to ground. The transition power dissipation is approximately: Pr =F Vtg (AeS) where (AeS) is a time-current factor derived from the graph on page 12. Total power (PD) then, as previously described is just Pp =PL+PqQ+Pr Examples show the relative magnitude for each term. EXAMPLE 1: A MIC4423 operating on a 12V supply driving two capacitive loads of 3OO0pF each, operating at 250kHz, with a duty cycle of 50%, ina maximum ambient of 60C. First calculate load power loss: PL=FxCx (Vtg) PL = 250,000 x (3 x 10-6 + 3 x 10-8) x 122 = 0.2160W Then transition power loss: Py =F x Vtg x (AsS) 2-52MIC4423/4424/4425 = 250,000 * 12 2.5 x 10-8 = 0.0750W Then quiescent power loss: Pq =Vtgx[DxlH+(1D) xh] = 12 x [(0.5 x 0.0035) + (0.5 x 0.0003)] Micrel The actual junction temperature will be lower than calculated both because duty cycle is less than 100% and because the graph lists Ros(on) ata Ty of 150C and the Rpsyony at 125C Ty will be somewhat lower. = 0.0228W Definitions Total power dissipation, then, is: C= Load Capacitance in Farads. Pp = 0.2160 + 0.0750 + 0.0228 D= Duty Cycle expressed as the fraction of time the input - 0.31 3gW , , to the driver is high. Assuming a plastic package, with an Rey-a of 170C, this F= Operating Frequency of the driver in Hertz will result in the junction running at: ly = Power supply current drawn by a driver when both 0.3138 x 170 = 53.3C inputs are high and neither output is loaded. above ambient, which, givenamaximum ambient temperature IL= Power supely curen ual bya driver when both of 60C, will result in a maximum junction temperature of inputs are low and neither output is loaded. 113.3C. Ip = Output current from a driver in Amps. EXAMPLE 2: A MIC 4424 operating ona 15V input, with one Pp = Total power dissipated in a driver in Watts. driver driving a 50Q resistive load at 1MHz, with a duty cycle . ; ; of 67%, and the other driver quiescent, inamaximumambient | PL = Power dissipated in the driver due to the driver's load temperature of 40C: in Watts. PL=l2xRoxD Pq= Power dissipated in a quiescent driver in Watts. First, io must be determined. Pty = Power dissipated ina driver when the output changes lo = Vtg /(Ro + RLoap) Given Ro from the characteristic curves then, Io = 15/ (6.3 + 50) Io = 0.2664A and: Py = 0.2664 x 6.3 x 0.67 = 0.2996W Pr =F x Vtg x (AeS)/2 (because only one side is operating) (1,000,000 x 15x 3.3 x 10-8) /2 0.2475 W and: Pq = 15 x [(0.67 x 0.00125) + (0.33 x 0.000125) + (1 x 0.000125)] (this assumes that the unused side of the driver has its input grounded, which is more efficient) = 0.0150W then: Pp = 0.2996 + 0.2475 + 0.0150 = 0.5621W In a ceramic package with an Rey-a of 150C/W, this amount of power results in a junction temperature given the maximum 40C ambient of: (0.5621 x 150) + 40 = 124.3C states (shoot-through current) in Watts. NOTE: The shoot-through current from a dual transition (once up, once down) for both drivers is stated in the graph on the following page in ampere-nanoseconds. This figure must be multiplied by the number of repetitions per second (frequency to find Watts). Ro= Output resistance of a driver in Ohms. V+g= Power supply voltage to the IC in Volts. 2-53MIC 4423/4424/4425 Micrel Crossover Energy Loss 10-7 8 6 4 > 2 Cc Qo oO & 10-8 Ee 8 <6 4 2 10-9 0 2 4 6 8 10 12 14 16 18 Vin NOTE: THE VALUES ON THIS GRAPH REPRESENT THE LOSS SEEN BY BOTH DRIVERS IN A PACKAGE DURING ONE COMPLETE CYCLE. FOR A SINGLE DRIVER DIVIDE THE STATED VALUES BY 2 FOR A SINGLE TRANSITION OF A SINGLE DRIVER, DIVIDE THE STATED VALUE BY 4. Pin Configuration nc [ile hie] NC ott f+ Ina[2 | [15] OUT A no [2] [ra] GuT A 7 40.11 4 5 GN 13] Vgr > p G| 16-PIN pa] s eno [5 | 2] ve" DIFFERENTIAL DIFFERENTIAL ne [6] 1] ours = = 2 14,15 2 14,15 24 75 24 7.5 nei | fa] our 8 7 O17 10.11 nc [a] @] NC NON-INVERTING INVERTING NC =NO CONNECTION NON-INVERTING INVERTING 2-54