bq78PL116
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
PowerLAN™Master Gateway Battery Management Controller
With PowerPump™Cell Balancing Technology
Check for Samples: bq78PL116
1FEATURES of Cells and MOSFETs With up to 4 Sensors
23•bq78PL116 Designed for Managing 3- to •Fail-Safe Operation of Pack Protection
16-Series-Cell Battery Systems Circuits: Up to Three Power MOSFETs and
One Secondary Safety Output (Fuse)
–Support for LCD and Electronic Paper
Displays or EPDs •Fully Programmable Voltage, Current, Balance,
and Temperature-Protection Features
–Configurable for 11-A, 26-A, or 110-A
Operating Currents •External Inputs for Auxiliary MOSFET Control
•Systems With More Than Four Series Cells •Smart Battery System 1.1 Compliant via
Require External bq76PL102 Dual-Cell SMBus
Monitors APPLICATIONS
•SmartSafety Features: •Portable Medical Instruments and Test
–Prevention: Optimal Cell Management Equipment
–Diagnosis: Improved Sensing of Cell •Mobility Devices (E-Bike)
Problems •Uninterruptible Power Supplies and Hand-Held
–Fail Safe: Detection of Event Precursors Tools
•Rate-of-Change Detection of All Important Cell
Characteristics: DESCRIPTION
–Impedance The bq78PL116 master gateway battery controller is
–Cell Temperature part of a complete Li-Ion control, monitoring, and
safety solution designed for large series cell strings.
•PowerPump Technology Transfers Charge
Efficiently From Cell to Cell During All The bq78PL116 along with bq76PL102 PowerLAN™
Operating Conditions, Resulting in Longer dual-cell monitors provide complete battery-system
Run Time and Cell Life control, communications, and safety functions for a
structure of three up to 16 series cells. This
–Includes User-Configurable PowerPump PowerLAN system provides simultaneous,
Cell-Balancing Modes synchronized voltage and current measurements
•High-Resolution 18-Bit Integrating Delta-Sigma using one A/D per-cell technology. This eliminates
Coulomb Counter for Precise Charge-Flow system-induced noise from measurements and allows
Measurements and Gas Gauging the precise, continuous, real-time calculation of cell
impedance under all operating conditions, even
•Multiple Independent Δ-ΣADCs: One-per-Cell during widely fluctuating load conditions.
Voltage, Plus Separate Temperature, Current,
and Safety PowerPump technology transfers charge between
cells to balance their voltage and capacity. Balancing
•Simultaneous, Synchronous Measurement of is possible during all battery modes: charge,
Pack Current and Individual Cell Voltages discharge, and rest. Highly efficient charge-transfer
•Very Low Power Consumption circuitry nearly eliminates energy loss while providing
– < 400 μA Active, <185 μA Standby, <85 μAtrue real-time balance between cells, resulting in
Ship, and <1μA Undervoltage Shutdown longer run-time and improved cycle life.
•Accurate, Advanced Temperature Monitoring
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PowerLAN, PowerPump, bqWizard are trademarks of Texas Instruments.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. ©2010–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Core / CPU
Measure
I/O
Safety
B0320-03
FLASH
PRE
CHG
EFCID
EFCIC
SMBus
DSG
SMBCLK
SMBDAT
SPROT
CSBAT
CSPACK
GPIO 7
CELL 4
Voltage
Temp
Balance
V4
P4N
P4S
XT4
V3
P3N
P3S
XT3
V2
P2N
P2S
XT2
CELL 3
Voltage
Temp
Balance
CELL 2
Voltage
Temp
Balance
CELL 1
Voltage
Temp
Balance
2.5VLDO
VLDO1 Watchdog
Coulomb Counter CCBAT
CCPACKCurrent A/D
SRAM
RSTN
Internal
Temperature
RISC
CPU
Internal
Oscillator
Reset
Logic
First-LevelSafety
and
FET Control
Second-Level
Safety
LED1–5/SEG1–5,
PSH/BP/TP,
FIELD
PowerLAN
Communication
Link
P-LAN
V1
P1N
P1S
XT1
bq78PL116
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
Temperature is sensed by up to 4 external sensors and one on-chip sensor. This permits accurate temperature
monitoring of each cell individually. Firmware is then able to compensate for the temperature-induced effects on
capacity, impedance, and OCV on a cell-by-cell basis, resulting in superior charge/ discharge and balancing
control.
External MOSFET control inputs provide user- definable direct hardware control over MOSFET states. Smart
control prevents excessive current through MOSFET body diodes. Auxiliary inputs can be used for enhanced
safety and control in large multicell arrays.
The bq78PL116 is completely user-configurable, with parametric tables in flash memory to suit a variety of cell
chemistries, operating conditions, safety controls, and data reporting needs. It is easily configured using the
supplied bqWizard™graphical user interface (GUI). The device is fully programmed and requires no algorithm or
firmware development.
The bq78PL116 pin functions of LED1/SEG1–LED5/SEG5, PSH/BP/TP, and FIELD support LED, LCD, and
electronic paper displays (EPDs). The user can configure the bq78PL116 for the desired display type.
Figure 1. BQ78PL116 Internal Block Diagram
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PowerLAN
Communication
Link
PowerLAN
Master Gateway Battery Controller
bq78PL116
Pack
Positive
Pack
Negative
Example 12-cell configuration shown
SMBus
RSENSE
Pack Protection
Circuits and Fuse
bq76PL102
Dual-Cell Monitor
bq76PL102
Dual-Cell Monitor
Bq76PL102
Dual-Cell Monitor
Bq76PL102
Dual-Cell Monitor
V1 X 1T V2
X 2T
V3 X 3T V4 X 4T
V1 T1 V2 T2 V1 T1 V2 T2 V1 T1 V2 T2 V1 T1 V2 T2
1
2
3
4
5
6
7
8
9
10
11
12
B0332-03
bq78PL116
www.ti.com
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
Figure 2. Example bq78PL116 System Implementation (12 Cells)
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Product Folder Link(s): bq78PL116
P0023-25
bq78PL116
RGZ Package
(Top View)
CHG
SDO0
DSG
SDI1
PRE
P1N
EFCIC
P2S
EFCID
P2N
CCBAT
SDO2
CCPACK
SDI3
VLDO1
P3S
CSBAT
P3N
CSPACK
P4S
OSCI
P4N
OSCO
P-LAN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
LED5/SEG5
VSS
LED4/SEG4
V1
LED3/SEG3
XT1
LED2/SEG2
XT2
LED1/SEG1
V2
PSH/BP/TP
VLDO2
SPROT
V3
FIELD
XT3
NC
XT4
NC
V4
NC
SMBDAT
RSTN
SMBCLK
36
35
34
33
32
31
30
29
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
Thermal Pad
bq78PL116
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
Table 1. ORDERING INFORMATION
Cell Package Temperature Ordering Quantity, Transport
Product Package
Configuration(1) Designator Range Number Media
bq78PL116RGZ 250, tape and reel
T
QFN-48, 7-mm ×
bq78PL116 3 to 16 series cells RGZ –40°C to 85°C
7-mm bq78PL116RGZ 2500, tape and reel
R
(1) For configurations consisting of more than four series cells, additional bq76PL102 parts must be used.
AVAILABLE OPTIONS
Figure 3. bq78PL116 Pinout
bq78PL116 TERMINAL FUNCTIONS
NAME NO. TYPE(1) DESCRIPTION
CCBAT 6 IA Coulomb counter input (sense resistor), connect to battery negative
CCPACK 7 IA Coulomb counter input (sense resistor), connect to pack negative
CHG 1 O Charge MOSFET control (active-high, low opens MOSFET)
CSBAT 9 IA Current sense input (safety), connect to battery negative
CSPACK 10 IA Current sense input (safety), connect to pack negative
DSG 2 O Discharge MOSFET control (active-high, low opens MOSFET)
EFCIC 4 I External charge MOSFET control input
EFCID 5 I External discharge MOSFET control input
(1) Types: I = Input, IA = Analog input, IO = Input/Output, O = Output, P = Power
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
bq78PL116 TERMINAL FUNCTIONS (continued)
NAME NO. TYPE(1) DESCRIPTION
FIELD 29 O EPD field segment
LED1/SEG1 32 O LED1 –open-drain, active-low, LCD and EPD segment 1
LED2/SEG2 33 O LED2 –open-drain, active-low, LCD and EPD segment 2
LED3/SEG3 34 O LED3 –open-drain, active-low, LCD and EPD segment 3
LED4/SEG4 35 O LED4 –open-drain, active-low, LCD and EPD segment 4
LED5/SEG5 36 O LED5 –open-drain, active-low, LCD and EPD segment 5
N/C 26, 27 IO Connect 1-MΩresistor to VSS
N/C 28 O No connect
OSCI 11 I External oscillator input (no connect, internal oscillator used)
OSCO 12 O External oscillator output (no connect, internal oscillator used)
P1N 15 O Charge-balance gate drive, cell 1 north
P2N 17 O Charge-balance gate drive, cell 2 north
P2S 16 O Charge-balance gate drive, cell 2 south
P3N 21 O Charge-balance gate drive, cell 3 north
P3S 20 O Charge-balance gate drive, cell 3 south
P4N 23 O Charge-balance gate drive, cell 4 north
P4S 22 O Charge-balance gate drive, cell 4 south
P-LAN 24 IO PowerLAN I/O to external bq76PL102 nodes
PRE 3 O Precharge MOSFET control (active-high)
PSH/BP/TP 31 IO Pushbutton detect for LED display, LCD backplane, EPD top plane and charge pump
RSTN 25 I Device reset, active-low
SDI1 14 I Connect to SDO0 via a capacitor
SDI3 19 I Internal PowerLAN connection –connect to SDO2 through a 0.01-μF capacitor
SDO0 13 O Requires 100-kΩpullup resistor to VLDO1
SDO2 18 O Internal PowerLAN connection –connect to SDI3 through a 0.01-μF capacitor
SMBCLK 37 IO SMBus clock signal
SMBDAT 38 IO SMBus data signal
SPROT 30 O Secondary protection output, active-high (FUSE)
V1 47 IA Cell-1 positive input
V2 44 IA Cell-2 positive input
V3 42 IA Cell-3 positive input
V4 39 IA Cell-4 positive input
VLDO1 8 P Internal LDO-1 output, bypass with 10-μF capacitor to VSS
VLDO2 43 P Internal LDO-2 output, bypass with 10-μF capacitor to V2
VSS 48 IA Cell-1 negative input
XT1 46 IA External temperature-sensor-1 input
XT2 45 IA External temperature-sensor-2 input
XT3 41 IA External temperature-sensor-3 input
XT4 40 IA External temperature-sensor-4 input
– – P Thermal pad. Connect to VSS
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
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ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted) RANGE UNITS
TAOperating free-air temperature (ambient) –40 to 85 °C
Tstg Storage temperature –65 to 150 °C
V4 Voltage range with respect to V3 –0.5 to 5.0 V
V3 Voltage range with respect to V2 –0.5 to 5.0 V
V2 Voltage range with respect to V1 –0.5 to 5.0 V
V1 Voltage range with respect to VSS –0.5 to 5.0 V
EFCIC, EFCID Voltage range with respect to VSS –0.5 to 5.0 V
LED1/SEG1—LED5/SEG5 Voltage on I/O pin with respect to VSS –0.5 to 5.0 V
SMBCLK, SMBDAT Voltage range with respect to VSS –0.5 to 6.0 V
VLDO1 Voltage with respect to VSS 3.0 V
VLDO2 Voltage range with respect to V2 3.0 V
RSTN Voltage range with respect to VSS –0.5 to VLDO1 + 0.5 V
FIELD, SPROT, PSH/BP/TP Voltage range with respect to VSS –0.5 to VLDO1 + 0.5 V
CCBAT, CCPACK, CSBAT, CSPACK Voltage range with respect to VSS –0.5 to VLDO1 + 0.5 V
CHG, DSG, PRE Voltage range with respect to VSS –0.5 to VLDO1 + 0.5 V
OSCI, OSCO Voltage with respect to VSS –0.5 to VLDO1 + 0.5 V
XT1, XT2 Voltage with respect to VSS –0.5 to VLDO1 + 0.5 V
SDO0 Voltage range with respect to VSS –0.5 to VLDO1 + 0.5 V
XT3, XT4 Voltage range with respect to V2 –0.5 to VLDO2 + 0.5 V
SDO2, SDI3, P-LAN Voltage range with respect to V2 –0.5 to VLDO2 + 0.5 V
SDO0, SDI1 Voltage range with respect to VSS –0.5 to V1 + 0.5 V
P1N, P2S, P2N Voltage range with respect to VSS –0.5 to V1 + 0.5 V
P3S, P3N, P4S, P4N Voltage range with respect to V2 –0.5 to V3 + 0.5 V
PRE, CHG, DSG, SPROT, FIELD, Current source/sink 20 mA
PSH/BP/TP
LED1/SEG1–LED5/SEG5 Current source/sink 20 mA
VLDO1, VLDO2 Current source/sink 20 mA
ESD tolerance JEDEC, JESD22-A114 human-body model, R = 1500 Ω, C = 2 kV
100 pF
Lead temperature, sodlering Total time <3 seconds 300 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT
All cell voltages equal, 4.5
2.5 3.6
four-cell operation
VSUP Supply voltage—V1, V2, V3, V4 V
All cell voltages equal,
three-cell operation (V3 = 2.8 3.6 4.5
V4)
VStartup Minimum startup voltage—V1, V2, V3, V4 All cell voltages equal 2.9 V
VIN Input cell voltage range—V(n+1) –V(n), n 0 4.5 V
= 1, 2, 3, 4
CVLDO1 VLDO 1 capacitor—VLDO1 2.2 10 47 μF
CVLDO2 VLDO 2 capacitor—VLDO2 2.2 10 47 μF
CVn Cell-voltage capacitor—Vn 1 μF
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
ELECTRICAL CHARACTERISTICS
TA=–40°C to 85°C (unless otherwise noted)
DC Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IDD Operating-mode current (at Acrtive mode, cells = 3.6 V 400 μA
V2)
ISTBY Standby-mode current (at V2) SMBCLK = SMBDAT = VSS, IBAT = 0, 185 μA
cells = 3.6 V
ISHIP Ship-mode current (at V2) SMBCLK = SMBDAT = VSS, IBAT = 0, 85 μA
cells = 3.6 V
Extreme cell undervoltage All cells <2.7 V and any cell <ECUV set
IECUV 1μA
shutdown current point
VOL SPROT, LEDEN, IOL <4 mA 0 0.5 V
PSH/BP/TP(bq78PL116),
FIELD(bq78PL116)
VOH (1) SPROT, LEDEN, IOH < –4 mA VLDO1 –0.1 V
PSH/BP/TP(bq78PL116),
FIELD(bq78PL116)
VIL SPROT, LEDEN, 0.25 VLDO1 V
PSH/BP/TP(bq78PL116),
FIELD(bq78PL116)
VIH SPROT, LEDEN, 0.75 VLDO1 V
PSH/BP/TP(bq78PL116),
FIELD(bq78PL116)
(1) Does not apply to SMBus pins.
Voltage-Measurement Characteristics
TA=–40°C to 85°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Measurement range 2.75 4.5 V
Resolution <1 mV
25°C±3±7
Accuracy(1) mV
0°C to 60°C±10
Measurement temperature coefficient 160 180 200 µV/°C
(1) Voltage measurement calibrated at factory
Current-Sense Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Measurement range Hardware gain = 9 –0.112 0.1 V
Measurement range (SENSE1) 10-mΩsense resistor(1) –11.2 10 A
Measurement range (SENSE2) 3-mΩsense resistor (hardware gain = 13) –25.8 25.8 A
Measurement range (SENSE3) 1-mΩsense resistor(2) –112 100 A
Input offset TA= 25°C±50 μV
Offset drift TA= 0°C to 60°C 0.5 μV/°C
Resolution Hardware gain = 9 10 μV
Full-scale error(3) TA= 25°C±0.1%
Full-scale error drift TA= 0°C to 60°C 50 PPM/°C
(1) Default setting
(2) Measurement range beyond ±32,768 mA requires the use of an SBData IPScale Factor.
(3) After calibration. Accuracy is dependent on system calibration and temperature coefficient of sense resistor.
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
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Coulomb-Count Characteristics(1) (2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Resolution 5 nVh
Intergral nonlinearity 0.008%
Snap-to-zero (deadband) ±100(3) μV
(1) Shares common input with current-sense section (CCBAT, CCPACK)
(2) After calibration. Accuracy is dependent on system calibration and temperature.
(3) Corresponds to ±10 mA with 10-mΩsense resistor
Current-Sense (Safety) Characteristics(1)
over free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Measurement range –0.312 0.312 V
Minimum threshold setting 25 42 mV
Accuracy(1) Short-circuit detection –20 20 mV
Overcurrent detection, charge and discharge –4 4
Short-circuit detection 10
Resolution mV
Overcurrent detection, charge and discharge 1.25
Short-circuit detection 0.1 3.2
Duration ms
Overcurrent detection, charge and discharge 0.9 106
(1) After calibration. Accuracy is dependent on system calibration and temperature coefficient of sense resistor.
Internal Temperature-Sensor Characteristics(1)
over free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Measurement range –30 85 °C
Resolution 0.1 °C
Accuracy(1) 0°to 85° ±2°C
(1) After calibration. Accuracy is dependent on system calibration.
LDO Voltage Characteristics(1)
over free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VLDO1 LDO1 operating voltage, referenced to Load = –200 μA 2.425 2.5 2.575 V
VSS
VLDO2 LDO2 operating voltage, referenced to V2 Load = –2 mA 2.425 2.5 2.575 V
(1) After calibration. Accuracy is dependent on system calibration.
External Temperature-Sensor Characteristics
over free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Measurement range –40 90 °C
Resolution 0.2 °C
25° ±2
Accuracy(1) °C
0°to 85° ±2
Source current 30 50 70 µA
(1) After calibration. Accuracy is dependent on system calibration.
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
SMBus Characteristics(1)
over free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIL Input low voltage 0 0.8 V
VIH Input high voltage 2.1 5.5 V
VOL Output low voltage 350-µA sink current 0 0.4 V
CLCapacitance, each I/O pin 10 pF
SCLK nominal clock
fSCL TA= 25°C 10 100 100 kHz
frequency VBUS 5 V nominal 13.3 45.3
Pullup resistors for SCLK,
RPU(2) kΩ
SDATA VBUS 3 V nominal 2.4 6.8
(1) SMBus timing and signals meet the SMBus 2.0 specification requirements under normal operating conditions. All signals are measured
with respect to PACK-negative.
(2) Pullups are typically implemented external to the battery pack and are selected to meet SMBus requirements.
PowerLAN Characteristics(1)(2)(3)
over free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CLLoad capacitance SDI1, SDI3, SDO0, SDO2, P-LAN 100 pF
SDI1 0.8 VLDO1
VIH Input logic high V
SDI3 0.8 VLDO2
SDO0, SDO2 0.9 VLDO1
VOH Output logic high V
P-LAN 0.9 VLDO2
SDI1 0.2 VLDO1
VIL Input logic low V
SDI3 0.2 VLDO2
SDO0, SDO2 0.1 VLDO1
VOL Output logic low V
P-LAN 0.1 VLDO2
tr(I) Input rise time SDI1, SDI3 500 ns
tf(I) Input fall time SDI1, SDI3 500 ns
tr(O) Output rise time SDO0, SDO2, P-LAN 30 50 ns
tf(O) Output fall time SDO0, SDO2, P-LAN 30 50 ns
(1) Values specified by design and are over the full input voltage range and the maximum load capacitance.
(2) The SDI and SDO pins are ac-coupled from the cell circuits downstream and upstream, respectively. The limits specified here are the
voltage transitions which must occur within the SDI and SDO rise-and fall-time specifications.
(3) Coupling capacitor between PowerLAN pins is 1000 pF. This value is specified by design.
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 9
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
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PowerPump Characteristics(1)
over free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOH High drive, P2S IOUT =–10 µA 0.9 V1 V
VOL Low drive, P2S IOUT = 200 µA 0.1 V1 V
VOH High drive, P1N, P2N IOUT =–200 µA 0.9 V1 V
VOL Low drive, P1N, P2N IOUT = 10 µA 0.1 V1 V
VOH High drive, P3S, P4S IOUT =–10 µA 0.9 V1 V
VOL Low drive, P3S, P4S IOUT = 200 µA 0.1 V1 V
VOH High drive, P3N, P4N IOUT =–200 µA 0.9 V1 V
VOL Low drive, P1N, P2N IOUT = 10 µA 0.1 V1 V
IOH Source current, P2S, P3S, VOH = V1 –0.8 V 250 µA
P4S
IOL Sink current, P1N, P2N, VOH = V1 + 0.2 V –250 µA
P3N, P4N
trSignal rise time CLoad = 300 pF 100 ns
tfSignal FET fall time CLoad = 300 pF 100 ns
fPFrequency 204.8 kHz
D PWM duty cycle P1N, P2N, P3N, P4N 33%
P2S, P3S, P4S 67%(2)
(1) All parameters representative of a typical cell voltage of 3.6 V.
(2) Effective duty cycle is 33%. PxS pins are P-channel drives and MOSFET on-time is (1 –D).
10 Submit Documentation Feedback ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
bq78PL116
PowerLAN
Gateway Battery
Management
Controller
RPRE
+PACK+
–
SMBCLK
SMBDAT
RSENSE
PACK–
XT1–XT4
Temperature
Sensor (typ.)
SPROT
LED1–LED5
Typical six-cell configuration shown.
Additional cells added via PowerLAN connection.
Some components omitted for clarity.
V2
V3
V4
V1
VLDO2
CRFI
VLDO1
RSTN
SDO2
SDI3
EFCID
EFCIC
One of 4 external
sensors shown
P-LAN
5
CELL 6
CELL 5
V2
V1
SDI1
SDO0
Level-Shift Circuits
CHG
DSG
PRE
ESD Protection
SMBus Aux FET
Control
TAB
VSS
CSBAT
CCBAT
CCPACK
CSPACK
Cell Balancing
Circuits
Cell Balancing Circuits
bq76PL102
CELL 4
CELL 3
CELL 2
CELL 1
S0342-04
bq78PL116
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
Figure 4. bq78PL116 Simplified Example Circuit Diagram
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
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FEATURE SET
Primary (First-Level) Safety Features
The bq78PL116 implements a breadth of system protection features which are easily configured by the
customer. First-level protections work by controlling the MOSFET switches. These include:
•Battery cell over/undervoltage protection
•Pack over/undervoltage protection
•Charge and discharge overcurrent protection
•Short-circuit protection
•External MOSFET control inputs (EFCIx) with programmable polarity
•Up to four external temperature inputs for accurate cell and MOSFET monitoring
•Watchdog timer protection
•Brownout detection and protection against extreme pack undervoltage
Secondary (Second-Level) Safety Features
The bq78PL116 can detect more serious system faults and activate the SPROT pin, which can be used to open
an in-line chemical fuse to permanently disable the pack. Secondary optional features include
•Fully independent of first-level protections
•SmartSafety algorithms for early detection of potential faults
–Temperature abnormalities (extremes, rate of change)
–Cell imbalance exceeds safety limits
–Impedance rise due to cell or weld strap fault
•MOSFET failure or loss of MOSFET control
•Safety overvoltage, pack and cell
•Safety overtemperature, limits for both charge and discharge
•Safety overcurrent, charge and discharge
•Failed current measurement, voltage measurement, or temperature measurement
Charge Control Features
•Meets SMBus 1.1 and Smart Battery System (SBS) Specification 1.1 requirements
•Active cell balancing using patented PowerPump technology, which eliminates unrecoverable capacity loss
due to normal cell imbalance
•Simultaneous, synchronous measurement of all cell voltages in a pack
•Simultaneous, synchronous measurement of pack current with cell voltages
•Reports target charging current and/or voltage to an SBS Smart Charger
•Reports the chemical state-of-charge for each cell and pack
•Supports precharging and zero-volt charging with separate MOSFET control
•Programmable, Chemistry-specific parameters
•Fault reporting
Gas Gauging
•The bq78PL116 accurately reports battery cell and pack state-of-charge (SOC). No full charge/discharge
cycle is required for accurate reporting.
•State-of-charge is reported via SMBus and optional display.
•18-bit integrating delta-sigma ADC coulomb counter
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Product Folder Link(s): bq78PL116
bq78PL116
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
Display Types
•The bq78PL116 drives a three- to five-segment LED display in response to a pushbutton (LEDEN) input
signal. Each LED pin can sink up to 10 mA.
•The bq78PL116 drives a three- to five-segment static liquid-crystal display.
•The bq78PL116 drives a three- to five-segment electronic paper display. An external 15-V voltage source is
required. E Ink Corporation supplies this type of display.
The display type is selected via the parameter set.
Lifetime Logging (Readable via SMBus)
•Lifetime delivered ampere-hours
•Last discharge average
•Lifetime maximum power
•Maximum/minimum temperature
•Maximum/minimum pack voltage
•Maximum/minimum cell voltage in a pack
•Maximum charge and discharge currents
Power Modes
•Normal Mode: The bq78PL116 performs measurements and calculations, makes decisions, and updates
internal data approximately once per second. All safety circuitry is fully functional in this mode.
•Standby Mode: The bq78PL116 performs as in normal mode, but at a dramatically reduced rate to lower
power consumption at times when the host computer is inactive or the battery system is not being used. All
safety circuitry remains fully functional in this mode.
•Ship Mode: The bq78PL116 disables (opens) all the protection MOSFETs, and continues to monitor
temperature and voltage, but at a reduced measurement rate to dramatically lower power consumption.
Environmental data is saved in flash as a part of the historical record. Safety circuitry is disabled in this mode.
The device does not enter this power state as a part of normal operation; it is intended for use after factory
programming and test. Entry occurs only after a unique SMBus command is issued. Exit occurs when the
SMBus lines return to an active state.
•Extreme Cell Undervoltage (ECUV) Shutdown Mode: In this mode, the bq78PL116 draws minimal current
and the charge and discharge protection MOSFETs are disabled (opened). The precharge MOSFET remains
enabled when a charge voltage is present. Safety circuitry is disabled in this mode. The device does not enter
this mode as a part of normal operation; it enters this state during extreme cell undervoltage conditions
(ECUV). The ECUV threshold is programmable between 2.5 V and 2.8 V for even series cell applications and
2.7 V to 2.8 V for odd series cell applications.
OVERCURRENT
STATE ENTRY CONDITION EXIT CONDITION
PROTECTION
Normal operation as determined by firmware Firmware directed to the following operating
Active Fully active modes
No load current flowing for predetermined
Standby Fully active Load activity
time
Ship Not active Protected SMBus command SMBus becomes active
Extreme cell Not active (precharge Vcell charge above ECUV recovery threshold
Enabled when Vcell <ECUV
undervoltage enabled) (2.9 V/cell typical)
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 13
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bq78PL116
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
OPERATION
The bq78PL116 battery-management controller serves as a master controller for a Li-Ion battery system
consisting of up to 16 cells in series. Any number of cells may be connected in parallel; other system or safety
issues limit the number of parallel cells. The bq78PL116 provides extraordinarily precise state-of-charge gas
gauging along with first- and second-level pack safety functions. Voltage and current measurements are
performed synchronously and simultaneously for all cells in the system, allowing a level of precision not
previously possible in battery management. Temperature is measured by up to four additional external
temperature sensors. Coulomb counting is captured continuously by a dedicated 18-bit integrating delta-sigma
ADC in the bq78PL116. The CPU in the bq78PL116 is also responsible for system data calculations and
communicating parameters via the SMBus interface.
PowerLAN Communication Link
PowerLAN technology is Texas Instruments’patented serial network and protocol designed specifically for
battery management in a multicell system environment. The PowerLAN link is used to initiate and report
measurements of cell voltage and temperature, and control cell balancing. The bq78PL116 serves as the master
controller of the PowerLAN link and can interface to multiple bq76PL102 dual-cell battery monitors, which
measure and balance additional cells. The bq78PL116 monitors the first three or four cells, and bq76PL102s can
be added to monitor more series cells.
The PowerLAN link isolates voltages from adjacent bq76PL102 devices to permit high-voltage stack assembly
without compromising precision and accuracy. The PowerLAN link is expandable to support up to 16 cells in
series. Each bq76PL102 handles voltage and temperature measurements, as well as balancing for two cells. The
PowerLAN link provides high ESD tolerance and high immunity to noise generated by nearby digital circuitry or
switching currents. Each bq76PL102 has both a PowerLAN input and PowerLAN output: Received data is
buffered and retransmitted, permitting high numbers of nodes without loss of signal fidelity. Signals are
capacitor-coupled between nodes, providing dc isolation.
Safety
Unique in the battery-management controller market, the bq78PL116 simultaneously measures voltage and
current using independent and highly accurate delta-sigma ADCs. This technique removes virtually all systemic
noise from measurements, which are made during all modes of battery operation: charge, discharge, and rest.
The bq78PL116 also directs all connected bq76PL102 dual-cell battery monitors to measure each cell voltage
simultaneously with the bq78PL116 measurements. Battery impedance and self-discharge characteristics are
thus measured with an unprecedented level of accuracy in real time. The bq78PL116 applies this precise
information to SmartSafety algorithms to detect certain anomalies and conditions which may be indicative of
internal cell faults, before they become serious problems.
The bq78PL116 uses its enhanced measurement system to detect system faults including cell under- and
overvoltage, cell under- and overtemperature, system overvoltage, and system overcurrent. First-level safety
algorithms first attempt to open the MOSFET safety switches. If this fails, second-level safety algorithms activate
the SPROT output, normally used to open a fuse and provide permanent, hard protection for the systems.
External MOSFET control inputs with programmable polarity can also be used to operate the safety MOSFETs
under control of user supplied circuitry. The bq78PL116 continuously monitors these inputs. If any MOSFET fails
to open when commanded; the 2nd level safety algorithms also activate the SPROT output. All first- and
second-level safety algorithms have fully programmable time delays to prevent false triggering.
Cell Balancing
Patented PowerPump cell balancing technology drastically increases the useful life of battery packs by
eliminating the cycle life fade of multi-cell packs due to cell imbalance. PowerPump technology efficiently
transfers charge from cell to cell, rather than simply bleeding off charging energy as heat as is typically done with
resistive-bleed balancing circuits. Balancing is configurable and may be performed during any battery operational
modes: charge, discharge, or rest. Compared to resistive bleed balancing, virtually no energy is lost as heat. The
actual balance current is externally scalable and can range from 10 mA to 1 A (100 mA typical) depending on
component selection and system or cell requirements.
14 Submit Documentation Feedback ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
bq78PL116
www.ti.com
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
A variety of techniques, such as simple terminal voltage, terminal voltage corrected for impedance and
temperature effects, or state-of-charge balancing, is easily implemented by the bq78PL116. By tracking the
balancing required by individual cells, overall battery safety is enhanced, often allowing early detection of soft
shorts or other cell failures. Balancing is achieved between all cells within the pack as dynamically determined by
the bq78PL116.
The bq78PL116 supports the following configurable cell-balancing features:
•Turbo-pump mode. When enabled, this allows 60%–70% pump availability when there are no active safety
events and current is not flowing. While in turbo-pump mode, temperature rate-of-rise features are not
available.
•Option to disable cell balancing during discharge
•Option to disable cell balancing during charge
•Test mode operation that allows for convenient production-line testing of PowerPump circuitry
Outputs
Charge Control
The CHG and PRE outputs are ordinarily used to drive MOSFET transistors controlling charge to the cell stack.
Charge or precharge mode is selected based on the present cell voltage compared to the user-definable cell
precharge, undervoltage, and temperature thresholds. When below these limits, the PRE signal is active and the
CHG signal is inactive. This turns on the precharge MOSFET and is used to charge a depleted system through a
current-limiting series resistor. When all cell voltages are above the limit and the temperature is above the charge
temperature minimum, then the CHG output also becomes active and enables the charge MOSFET to turn on,
providing a high-current path between charger and battery cells.
The CHG and PRE MOSFET control outputs are both disabled (low) when any cell reaches the safety cutoff limit
or temperature threshold. During active charging modes (and above cell voltage thresholds), the discharge
MOSFET is also enabled to avoid excessive heating of the body diode. Similarly, the charge MOSFET is active
during discharge, provided current flow is in the correct direction and no safety violations are present.
The CHG and PRE outputs are intended to drive buffer transistors acting as inverting level shifters.
Discharge Control
The DSG output operates similarly to control-system discharging. It is enabled (high) by default. If a cell voltage
falls below a programmable threshold, or excessive current or other safety related fault is sensed, the DSG
output is disabled (low) to prevent damage to the cells.
All facets of safely charging and discharging the cell stack are controlled by user-definable parameters which
provide precise control over MOSFET states. Both system and cell over- and undervoltage limits are provided, as
well as programmable hysteresis to prevent oscillation. Temperature and current thresholds are also provided,
each with independent timers to prevent nuisance activations.
The DSG output is intended to drive a buffer transistor acting as an inverting level-shifter.
Display
The bq78PL116 shows state-of-charge indication on LED, static liquid crystal, and electronic paper displays or
EPDs in a bar-graph-type format. The parameter set allows selection of display type and configuration.
PSH/BP/TP is a multifunction pin. In LED display mode, PSH serves as an input that monitors for closure of a
state-of-charge indicator (SOCi) push-button switch. In LCD mode, this pin is used to drive the LCD backplane.
In EPD mode, this pin drives the top plane common signal of the display.
In LED display mode, the signals LED1/SEG1–LED5/SEG5 are current-sinking outputs designed to drive
low-current LEDs.
In LCD and EPD modes, the LED1/SEG1–LED5/SEG5 pins drive the active segments through external buffer
transistors. In EPD mode, the FIELD pin drives the display background field.
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 15
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
Electronic paper displays require an external power supply, typically 15 V, to power the display. In EPD, mode
the bq78PL116 strobes the display outputs for a user- programmable period of milliseconds to drive an external
voltage multiplier or charge pump to the required display supply voltage. The display segments are then updated
in a manner that ensures the required 0-Vdc segment voltage offset is maintained and keeps the external power
supply at its nominal voltage.
Inputs
Current Measurement
Current is monitored by four separate ADCs. All use the same very low-value sense resistor, typically 10, 3, or 1
milliohms in series with the pack negative connection. CCBAT and CCPACK connections to the sense resistor
use an R/C filter for noise reduction. (CSBAT and CSPACK are direct connections used for secondary safety).
When configured to use a 1-milliohm sense resistor, the maximum available pack capacity increases to 327 Ah
from 32.7 Ah.
A 14-bit delta-sigma ADC is used to measure current flow accurately in both directions. The measurements are
taken simultaneously and synchronously with all the cell voltage measurements, even those cells measured by
bq76PL102 dual-cell battery monitors.
Coulomb Counting
A dedicated coulomb counter is used to measure charge flow with 18-bit precision in both directions by a
calibrated, integrating delta-sigma ADC. This allows the bq78PL116 to keep very accurate state-of-charge (SOC)
information and battery statistics. A small deadband is applied to further reduce noise effects. The coulomb
counter is unique in that it continues to accumulate (integrate) current flow in either direction even as the rest of
the internal microcontroller is placed in a very low power state, further lowering power consumption without
compromising system accuracy.
Safety Current
Two additional ADCs are used to directly monitor for overcurrent or short-circuit current conditions, independently
of the internal function. This provides a direct and rapid response to insure pack integrity and safe operation by
opening the appropriate MOSFETs. These functions are implemented in hardware, and do not require firmware
for functionality.
Voltage Measurement
Voltage measurement is performed by four independent delta-sigma ADCs which operate simultaneously and
are triggered synchronously so that all voltages are read at precisely the same moment. The bq78PL116
coordinates the attached bq76PL102 dual-cell battery monitors so they also perform their cell voltage
measurements in sync with the bq78PL116 voltage and current measurements. Voltage measurements are
converted with better than 1 mV of resolution, providing superior accuracy. One-ADC-per-cell technology means
that voltage is also measured simultaneously with current, permitting accurate, real-time cell impedance
calculation during all operating conditions. This technique also provides greatly enhanced noise immunity and
filtering of the input signal without signal loss.
Temperature Measurement
XT1–XT4 are dedicated temperature-sensor inputs. Each external sensor consists of a low-cost silicon diode
(dual diode in one package is recommended) and capacitor combination. The bq78PL116 can report all four of
these temperatures individually. The bq78PL116 firmware uses the internal temperature sensor of the device for
board temperature measurements.
EFCIx
The external MOSFET control inputs are for user control of MOSFETs based on external circuitry and conditions.
The polarity of the input signal is user-programmable. These pins can be used to force the protection MOSFETs
to an OFF state.
16 Submit Documentation Feedback ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
bq78PL116
www.ti.com
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
COMMUNICATIONS
SMBus
The bq78PL116 uses the industry-standard Smart Battery System’s two-wire System Management Bus (SMBus)
communications protocol for all external communication. SMBus version 1.1 is supported by the bq78PL116, and
includes clock stretching, bus fault time-out detection, and optional packet error checking (PEC). For additional
information, see the www.smbus.org and www.sbs-forum.org Web sites.
Smart Battery Data (SBData)
The bq78PL116 supports Smart Battery System's (SBS) Smart Battery Data Specification 1.1. See the
SBS/SMBus site at www.sbs-forum.org for further information regarding these specifications.
This SBS Data (SBData) specification defines read/write commands for accessing data commonly required in
laptop computer applications. The commands are generic enough to be useful in most applications.
The bq78PL116 provides a wealth of data beyond the standard set of SBData (0x00 - 0x23) through Extended
SBData Commands. See the following table for a listing of the SBData commands and the default set of
Extended SBData (0x3C - 0x58). SBData command locations 0x80 and 0x81 are used to implement some of the
features unique to the bq78PL116. Refer to the bq78PL116 Technical Reference Manual Document for additional
details on compliance to SBData and how to take advantage of the data and controls specific to bq78PL116.
THERMAL PAD
The large pad on the bottom of the package is square, located in the center, and is 5.3 ±0.05 mm per side.
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 17
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
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SBS Standard Data Parameter List (Abridged)(1)
Command Data Type Description
00 R/W word (unsigned) Manufacturer Access
01 R/W word (unsigned) Remaining Capacity Alarm Level
02 R/W word (unsigned) Remaining Time Alarm Level
03 R/W word (unsigned) Battery Mode
04 R/W word (unsigned) At Rate value used in AtRate calculations –NOT SUPPORTED
05 Read word (unsigned) At Rate Time to Full –NOT SUPPORTED
06 Read word (unsigned) At Rate Time to Empty –NOT SUPPORTED
07 Read word (Boolean) At Rate OK –NOT SUPPORTED
08 Read word (unsigned) Pack Temperature (maximum of all individual cells)
09 Read word (unsigned) Pack Voltage (sum of individual cell readings)
0A Read word (unsigned) Pack Current
0B Read word (unsigned) Average Pack Current
0C Read word (unsigned) Max Error
0D Read word (unsigned) Relative State of Charge
0E Read word (unsigned) Absolute State of Charge
0F Read word (unsigned) Remaining Pack Capacity
10 Read word (unsigned) Full Charge Capacity
11 Read word (unsigned) Run Time to Empty
12 Read word (unsigned) Average Time to Empty
13 Read word (unsigned) Average Time to Full
14 Read word (unsigned) Charging Current
15 Read word (unsigned) Charging Voltage
16 Read word (unsigned) Battery Status
17 Read word (unsigned) Cycle Count
18 Read word (unsigned) Design Capacity
19 Read word (unsigned) Design Voltage
1A Read word (unsigned) Specification Information
1B Read word (unsigned) Manufacture Date
1C Read word (unsigned) Serial Number
1D–1F Reserved
20 Read block (string) Pack Manufacturer Name (31 characters maximum)
21 Read block (string) Pack Device Name (31 characters maximum)
22 Read block (string) Pack Chemistry
23 Read block (string) Manufacturer Data
24–2E Reserved
2F R/W Block Optional Manufacturer Function 5
30–3B Reserved
3C R/W word (unsigned) Optional Manufacturer Option 4 (Vcell 1)
3D R/W word (unsigned) Optional Manufacturer Option 3 (Vcell 2)
3E R/W word (unsigned) Optional Manufacturer Option 2 (Vcell 3)
3F R/W word (unsigned) Optional Manufacturer Option 1 (Vcell 4)
40 R/W word (unsigned) Extended Data (Vcell 5)
41 R/W word (unsigned) Extended Data (Vcell 6)
42 R/W word (unsigned) Extended Data (Vcell 7)
43 R/W word (unsigned) Extended Data (Vcell 8)
44 R/W word (unsigned) Extended Data (Vcell 9)
(1) Parameters 0x00–0x3F are compatible with the SBDATA specification.
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
Command Data Type Description
45 R/W word (unsigned) Extended Data (Vcell 10)
46 R/W word (unsigned) Extended Data (Vcell 11)
47 R/W word (unsigned) Extended Data (Vcell 12)
48 R/W word (unsigned) Extended Data (Vcell 13)
49 R/W word (unsigned) Extended Data (Vcell 14)
4A R/W word (unsigned) Extended Data (Vcell 15)
4B R/W word (unsigned) Extended Data (Vcell 16)
4C R/W word (unsigned) Extended Data (Temp 0 –Intenal)
4D R/W word (unsigned) Extended Data (Temp 1 –Extenal)
4E R/W word (unsigned) Extended Data (Temp 2 –Extenal)
4F R/W word (unsigned) Extended Data (Temp 3 –Extenal)
50 R/W word (unsigned) Extended Data (Temp 4 –Extenal)
51 R/W word (unsigned) Extended Data (Safety Status)
52 R/W word (unsigned) Extended Data (Permanent Fail Status)
53 R/W word (unsigned) Extended Data (Charge Status)
54 R/W word (unsigned) Extended Data (Lifetime Maximum Pack Voltage)
55 R/W word (unsigned) Extended Data (Lifetime Maximum Cell Voltage)
56 R/W word (unsigned) Extended Data (Lifetime Maximum Charge Current)
57 R/W word (unsigned) Extended Data (Lifetime Maximum Discharge Current)
58 R/W word (unsigned) Extended Data (Lifetime Maximum Temperature)
80 R/W word (unsigned) Extended Command (Device Status)
81 R/W word (unsigned) Extended Command (Device Command)
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): bq78PL116
V0
V1
V2
V3
1
1
1
2
FOR 3 CELL APPLICATIONS (3SxP) XT4, P3N, P4S, P-LAN AND P4N ARE 'NO-CONNECT.'
2
3
3
PRE-CHARGE RESISTOR (R9) VALUE WILL VARY BY APPLICATION.
POWERPUMP CIRCUIT COMPONENT VALUES/TYPE WILL VARY BY APPLICATION. TYPICAL SHOWN.
GND
SMBDAT
SMBCLK
EFCID
EFCIC
bq78PL116
1
CHG
2
DSG
3
PRE
4
EFCIC
5
EFCID
6CCBAT
7CCPACK
8VLDO1
9CSBAT
10 CSPACK
11 OSCI
12 OSCO
13
SDO0
14
SDI1
15 P1N
16 P2S
17 P2N
18
SDO2
19
SDI3
20 P3S
21 P3N
22 P4S
23 P4N
24
P-LAN
25
RSTN
26 N/C
27 N/C
28 N/C
29
FIELD
30
SPROT
31
PSH/BP/TP
32
LED1/SEG1
33
LED2/SEG2
34
LED3/SEG3
35
LED4/SEG4
36
LED5/SEG5
37
SMBCLK
38
SMBDAT
39 V4
40
XT4
41
XT3
42 V3
43 VLDO2
44 V2
45
XT2
46
XT1
47 V1
48 VSS
49
tab
U1
C24
C18
C11
C25
C23
R4
C16
C20
R26
C8
R33
R31
R28 R19 Z1
R13
R20
R23 R11
R32
R30
Z2
R14
R22
R29
RSENSE
R27
C3
Q1
R35
R34
R6
R5
R10
C21
C7
L1
C4
C5
R12
R21
R24
C17
C19
L2
Q9-A
Q9-B
Q10-A
Q10-B
C6
D3
D4
D1
D2
C1
C2
R1
LED5
LED4
LED3
LED2
LED1
SOCI
R3
R8 R7 R15
R9
R2 R16
Q5
Q6
Q11
Q7
CSD17307Q5A
Q12
C13
C12
Q3 Q4
R36 R37
Z3
Z4
Q2
R25
R17 R18
C10 C22
T1
C14 T2
C15
T3
C9
F1
HOST
CELLS
BATTERY+
BATTERY- PACK-
PACK+
Z5
R38
GND
VSS
VSS
VSS
S001
bq78PL116
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
REFERENCE SCHEMATICS
Figure 5. Typical 3S Application Schematic
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
Table 2. Bill of Materials for 3S Application
Qty Reference Value Description Size Manufacturer Mfg Part No.
Capacitor SMT
5 C10 C12-13 C16 C22 0.1uF Ceramic X7R +/-10% 603 Standard Standard
50V
Capacitor SMT
5 C11 C18 C20 C23-24 10uF Ceramic X5R +/-10% 603 Standard Standard
6.3V
Capacitor SMT
3 C1-3 0.01uF Ceramic X7R +/-10% 603 Standard Standard
25V
Capacitor SMT
3 C4-6 22uF Ceramic Y5V +/-20% 805 Standard Standard
10V
Capacitor SMT
4 C7 C17 C19 C21 3300pF Ceramic X7R +/-10% 603 Standard Standard
50V
Capacitor SMT
5 C8-9 C14-15 C25 1000pF Ceramic X7R +/-10% 603 Standard Standard
50V
R1 R7-8 R11 R15 Resistor SMT 1/10W
12 R19 R23 R25 R28 1.0M 603 Standard Standard
+/-5%
R36-38 Resistor SMT 1/10W
2 R17-18 30K 603 Standard Standard
+/-5%
Resistor SMT 1/10W
2 R2 R16 200K 603 Standard Standard
+/-5%
Resistor SMT 1/10W
2 R26 R35 100K 603 Standard Standard
+/-5%
Resistor SMT 1/10W
2 R27 R29 4.7K 603 Standard Standard
+/-5%
R3 R6 R12-14 R20 Resistor SMT 1/10W
11 100 603 Standard Standard
R22 R30-33 +/-5%
Resistor SMT 1/10W
2 R4 R34 10K 603 Standard Standard
+/-5%
Resistor SMT 1/10W
4 R5 R10 R21 R24 20K 603 Standard Standard
+/-5%
Resistor SMT +/-5%
1 R9 100 603 Standard Standard
1W
Resistor SMT +/-1%
1 RSENSE 0.01 2512 Standard Standard
1W +/-100ppm/°C
Schottky Rectifier
4 D1-4 Vf=385mV SOD-123 Standard Standard
Diode 20V IFSM>2A
Inductor SMT 4.9mm x 4.9mm x NRS5020T4R7MMG
2 L1-2 4.7uH Taiyo Yuden
Shielded Isat=2.0A 2.0mm J
5 LED1-5 Green LED 603 Standard Standard
Momentary
1 SOCI 50mA Standard Standard
Pushbutton
Dual Diode (Series
3 T1-3 SOT-23 Fairchild MMBD4148SE
Arrangement)
N-Channel MOSFET
4 Q1-4 2.5Vgs rated, SOT-23 Infineon BSS138N
Vds>30V
N-Channel JFET
Vdg =
2 Q5-6 Idss>0.2mA, SOT-23 Fairchild MMBFJ201
-40V Vgs<-1.5V
9.7 mOhm MOSFET N-Channel
1 Q7 SON 5mm x 6mm Texas Instruments CSD17307Q5A
RDSon SMT 30Vds
MOSFET N/P
2 Q9-10 6-TSOP Alpha &Omega AO6604
Complementary Pair
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): bq78PL116
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SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
Table 2. Bill of Materials for 3S Application (continued)
Qty Reference Value Description Size Manufacturer Mfg Part No.
MOSFET P-Channel
2 Q11-12 SOIC-8 Fairchild FDS6673
SMT -30VDS
PowerLAN Master
Gateway Battery
1 U1 QFN48 Texas Instruments bq78PL116RGZR
Management
Controller
Common Anode
3 Z1-2 Z5 5.6V Zener Diode Pair SOT-23 Standard Standard
300mW
2 Z3-4 12V Zener Diode 500mW SOD-123 Diodes, Inc BZT52C12-13-F
Chemical Fuse For
1 F1 12 Amp Sony SFH-1212A
2-3 Cells In Series
BATTERY+
4 BATTERY- PACK+ 2 Pin Connector Standard Standard
PACK-
1 CELLS 4 Pin Connector Standard Standard
1 HOST 5 Pin Connector Standard Standard
22 Submit Documentation Feedback ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
V0
V1
V2
V3
GND
SMBDAT
SMBCLK
EFCID
EFCIC
V4
FUSE
bq78PL116
1
CHG
2
DSG
3
PRE
4
EFCIC
5
EFCID
6CCBAT
7CCPACK
8VLDO1
9CSBAT
10 CSPACK
11 OSCI
12 OSCO
13
SDO0
14
SDI1
15 P1N
16 P2S
17 P2N
18
SDO2
19
SDI3
20 P3S
21 P3N
22 P4S
23 P4N
24
P-LAN
25
RSTN
26 N/C
27 N/C
28 N/C
29
FIELD
30
SPROT
31
PSH/BP/TP
32
LED1/SEG1
33
LED2/SEG2
34
LED3/SEG3
35
LED4/SEG4
36
LED5/SEG5
37
SMBCLK
38
SMBDAT
39 V4
40
XT4
41
XT3
42 V3
43 VLDO2
44 V2
45
XT2
46
XT1
47 V1
48 VSS
49
tab
U1
C24
C18
C11
C25
C23
R4
C16
C20
R26
C8
R33
R31
R28 R19
Z1
R13
R20
R23 R11
R32
R30
Z2
R14
R22
R29
RSENSE
R27
C3
Q1
R35
R34
R6
R5
R10
C21
C7
L1
C4
C5
R12
R21
R24
C17
C19
L2
Q9-A
Q9-B
Q10-A
Q10-B
C6
D3
D4
D1
D2
C1
C2
R1
LED5
LED4
LED3
LED2
LED1
SOCI
R3
R8 R7 R15
R9
R2 R16
Q5
Q6
Q11
Q12
C13
C12
Q3 Q4
R36 R37
Z3
Z4
Q2
R25
R17 R18
C10 C22
T1
C14 T2
C15
T3
C9
J1
BATTERY+
BATTERY- PACK-
PACK+
Z5
R38
C26
R39
R40
R41
C27
C28
L3
Q8-A
Q8-B
D5
D6
C30
R42
R43
R44
C29
C31
L4
Q13-A
Q13-B
D7
D8
C32
C33
Q7
HOST
T4
C96
GND
VSS
V5
VSS
VSS
V4
P5S
PLAN
S002a
bq78PL116
www.ti.com
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
Figure 6. Typical 16S Application Circuit –bq78PL116 and FETs (Sheet 1 of 4)
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): bq78PL116
Cells 5 to 8
V5
V6
V7
V8
R72
R73
R71
C34
C36
Q14-A
Q14-B
L5
C37
C38
R65
R66
R63
C43
C44
Q16-A
Q16-B
L6
C45
C46
C48
C49
C50
D17
D18
D19
D20
15 V1
12 V2 14
XT1 13
XT2
11 N/C
10 N/C
3N/C
8PUMP2N
7PUMP2S
6PUMP1N
5PUMP1S
2
VLDO
16
VPP
9
SDO
4
SDI
17 TAB
1VSS
U2
BQ76PL102
R61
R62
R55
C52
C65
Q18-A
Q18-B
L7
C66
R53
R54
R52
C70
C71
Q19-A
Q19-B
L8
C73
C74
C75
C76
D9
D10
D11
D12
15 V1
12 V2
14
XT1
13
XT2
11 N/C
10 N/C
3N/C
8PUMP2N
7PUMP2S
6PUMP1N
5PUMP1S
2
VLDO
16
VPP
9
SDO 4
SDI
17 TAB
1VSS
U3
BQ76PL102
C35
C39
C64
C63
J2
PLAN
V5
P5S
V9
V8
P9S
SDO5
V4
S002b
bq78PL116
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
Figure 7. Typical 16S Application Circuit –bq76PL102 for Cells 5–8 (Sheet 2 of 4)
24 Submit Documentation Feedback ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
Cells 9 to 12
V9
V10
V11
V12
R45
R46
R47
C40
C41
Q15-A
Q15-B
L9
C42
C47
R48
R49
R50
C51
C53
Q17-A
Q17-B
L10
C54
C55
C56
C57
C58
D13
D14
D15
D16
15 V1
12 V2
14
XT1
13
XT2
11 N/C
10 N/C
3N/C
8PUMP2N
7PUMP2S
6PUMP1N
5PUMP1S
2
VLDO
16
VPP
9
SDO
4
SDI
17 TAB
1VSS
U4
BQ76PL102
R51
R56
R57
C59
C60
Q20-A
Q20-B
L11
C61
R58
R59
R60
C62
C67
Q21-A
Q21-B
L12
C68
C69
C72
C77
D21
D22
D23
D24
15 V1
12 V2
14
XT1
13
XT2
11 N/C
10 N/C
3N/C
8PUMP2N
7PUMP2S
6PUMP1N
5PUMP1S
2
VLDO
16
VPP
9
SDO
4
SDI
17 TAB
1VSS
U5
BQ76PL102
C78
C79
C80
C81
J3
SDO5
V9
P9S
V13
V12
P13S
SDO7
V8
S002c
bq78PL116
www.ti.com
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
Figure 8. Typical 16S Application Circuit –bq76PL102 for Cells 9–12 (Sheet 3 of 4)
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): bq78PL116
bq78PL116
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
Figure 9. Typical 16S Application Circuit –bq76PL102 for Cells 13–16 (Sheet 4 of 4)
Table 3. Bill of Materials for 16S Application
Qty Reference Value Description Size Manufacturer Mfg Part No.
PowerLAN Dual Cell
6 U2-7 QFN-16 QFN16 Texas Instruments bq76PL102RGTT
Monitor
PowerLAN Master
Gateway Battery
1 U1 QFN-48 QFN48 Texas Instruments bq78PL116RGZR
Management
Controller
C11 C18 C20 C23-24 Capacitor SMT
C26 C48-50 C56-58
24 10uF Ceramic X5R +/-10% 603 Standard Standard
C69 C72 C74-77 6.3V
C90-92 C99-101
C1-3 C30 C32 C35 Capacitor SMT
16 C39 C63-64 C78-81 0.01uF Ceramic X7R +/-10% 603 Standard Standard
C102-104 25V
C8-9 C14-15 C25 Capacitor SMT
12 C46 C55 C68 C73 1000pF Ceramic X7R +/-10% 603 Standard Standard
C89 C96 C98 50V
Capacitor SMT
5 C10 C12-13 C16 C22 0.1uF Ceramic X7R +/-10% 603 Standard Standard
50V
26 Submit Documentation Feedback ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
bq78PL116
www.ti.com
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
Table 3. Bill of Materials for 16S Application (continued)
Qty Reference Value Description Size Manufacturer Mfg Part No.
C7 C17 C19 C21
C27-29 C31 C34 C36
C40-41 C43-44 Capacitor SMT
30 C51-53 C59-60 C62 3300pF Ceramic X7R +/-10% 603 Standard Standard
C65 C67 C70-71 50V
C82-83 C86-87
C93-94
C4-6 C33 C37-38 Capacitor Ceramic
C42 C45 C47 C54
16 22uF SMT Y5V +/-20% 805 Standard Standard
C61 C66 C84-85 C88 10V
C95
R3 R6 R12-14 R20
R22 R30-33 R39 R42 Resistor SMT 1/10W
24 R45 R48 R51 R53 100 603 Standard Standard
+/-5%
R58 R61 R64-65 R69
R72 R75 Resistor SMT 1/10W
2 R4 R34 10K 603 Standard Standard
+/-5%
Resistor SMT 1/10W
2 R26 R35 100K 603 Standard Standard
+/-5%
R1 R7-8 R11 R15 Resistor SMT 1/10W
12 R19 R23 R25 R28 1.0M 603 Standard Standard
+/-5%
R36- 38
R5 R10 R21 R24
R40-41 R43-44
R46-47 R49-50 R52 Resistor SMT 1/10W
30 R54-57 R59-60 20K 603 Standard Standard
+/-5%
R62-63 R66- 68
R70-71 R73-74
R76-77 Resistor SMT 1/10W
2 R2 R16 200K 603 Standard Standard
+/-5%
Resistor SMT 1/10W
2 R17-18 30K 603 Standard Standard
+/-5%
Resistor SMT +/-5%
1 R9 3K 603 Standard Standard
1W
Resistor SMT 1/10W
2 R27 R29 4.7K 603 Standard Standard
+/-5%
Resistor SMT +/-1%
1 RSENSE 0.01 2512 Standard Standard
1W +/-100ppm/°C
Inductor SMD 4.9mm x 4.9mm x NRS5020T4R7MMG
15 L1-15 4.7uH Taiyo Yuden
Shielded Isat=2.0A 2.0mm J
N-Channel MOSFET,
4 Q1-4 Vds >80V SOT-23 Standard Standard
2.5Vgs Rated
General Purpose
Idss=0.2
2 Q5-6 N-Channel JFET SOT-23 Fairchild MMBFJ201
to 1.0mA Amplifier
MOSFET N-Channel
1 Q7 100 Vds D2PAK Standard Standard
20Vgs
MOSFET N/P
15 Q8-10 Q13-24 +/-8Vgs 6-TSOP Alpha &Omega AO6604
Complementary Pair
MOSFET P-Channel
2 Q11-12 -100 Vds D2PAK Standard Standard
20Vgs
Schottky Rectifier
30 D1-30 500mA SOD-123 Fairchild MBR0520L
Diode 20V
4 T1-4 Dual Diode SOT-23 Fairchild MMBD4148SE
Green/25 Green Diffused LED
5 LED1-5 603 Standard Standard
mA 1.6mm x 0.8mm SMT
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 27
Product Folder Link(s): bq78PL116
bq78PL116
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
Table 3. Bill of Materials for 16S Application (continued)
Qty Reference Value Description Size Manufacturer Mfg Part No.
Common Anode
2 Z1 Z2 5.6VDC Zener Diode Pair SOT-23 Standard Standard
300mW
Zener Diode 500mW
3 Z3-5 500mW SOD-123 Standard Standard
12V
Tactile Momentary
1 SOCI 50mA Standard Standard
Pushbutton Thru-Hole
1 HOST Header 6 Position Standard Standard
1 J1 1.0 Amp Header 5 Position Standard Standard
3 J2-4 3.0A Header 4 Position Standard Standard
BATTERY+
4 BATTERY- PACK+ 30 Amps Header 2 Position Standard Standard
PACK-
28 Submit Documentation Feedback ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
bq78PL116
29
32
33
34
35
8
36
31
48
Vss
49
TAB
39
FIELD
LED1/SEG1
LED2/SEG2
LED3/SEG3
LED4/SEG4
VLDO1
LED5/SEG5
PSH/BP/TP
V4
FIELD
SEG5
SEG4
SEG3
SEG2
SEG1
TPC 1
2
3
4
5
6
7
NTS4001NT1G
NTS4001NT1G
NTS4001NT1G
NTS4001NT1G
NTS4001NT1G
1MΩ 1MΩ 1MΩ 1MΩ 1MΩ 1MΩ 1MΩ
XF2L-0735-1/
OMRON/ZIFF
BAT54STA
32
1
BAT54STA
32
1
BAT54STA
32
1
1µF 25V1µF 25V1µF 25V
1µF 25V1µF 25V 4.7µF 25V
100Ω
1MΩ
E-Ink SDC3
PET 5-Bar,
Part Number:
520-1285
NTS4001-
NT1G
NTS4001-
NT1G
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
S003
bq78PL116
www.ti.com
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
NOTE: For reference only. Actual display used may require different operating voltage. Consult with display vendor.
Figure 10. Reference Schematic (Electronic-Paper Display Connections)
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 29
Product Folder Link(s): bq78PL116
1
6
5
4
3
2
EXCEL 8-Segment
Display 0408
S8
BP
S1
S2
S3
S4
9
S6
7
S7
8
S5
bq78PL116
32
33
34
35
36
8
31
48
Vss
49
TAB
44
LED1/SEG1
LED3/SEG3
LED4/SEG5
LED5/SEG5
VLDO1
PSH/BP/TP
V2
NTS4001NT1G
NTS4001NT1G
NTS4001NT1G
NTS4001NT1G
1MΩ 1MΩ 1MΩ 1MΩ 1MΩ 1MΩ
1MΩ
NTS4001-
NT1G
NTS4001-
NT1G
1MΩ
1MΩ
1MΩ
1MΩ
To +ve
of Cell 2
LED2/SEG2
S004
bq78PL116
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
www.ti.com
NOTE: For reference only. Actual display used may require different operating voltage. Consult with display vendor.
Figure 11. Reference Schematic (LCD Connections)
30 Submit Documentation Feedback ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): bq78PL116
bq78PL116
www.ti.com
SLUSAB8B –OCTOBER 2010–REVISED FEBRUARY 2011
REVISION HISTORY
Changes from Revision A (October 2010) to Revision B Page
•Revised PowerLAN Characteristics table ............................................................................................................................. 9
•Changed Ah values in Current Measurement paragraph ................................................................................................... 16
©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 31
Product Folder Link(s): bq78PL116
PACKAGE OPTION ADDENDUM
www.ti.com 13-Jun-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
BQ78PL116RGZR NRND VQFN RGZ 48 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR
BQ78PL116RGZT NRND VQFN RGZ 48 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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