1
®
FN4315.16
HIN202E, HIN206E, HIN207E, HIN208E,
HIN211E, HIN213E, HIN232E
±15kV, ESD-Protected, +5V Powered,
RS-232 Transmitters/Receivers
The HIN202E, HIN206E, HIN207E, HIN208E, HIN211E,
HIN213E, HIN232E family of RS-232 transmitters/receivers
interface circuits meet all ElA high-speed RS-232E and V.28
specifications, and are particularly suited for those
applications where ±12V is not available. A redesigned
transmitter circuit improves data rate and slew rate, which
makes this suitable for ISDN and high speed modems. The
transmitter outputs and receiver inputs are pro te cted to
±15kV ESD (Electrostatic Discharge). They require a single
+5V power supply and feature onboard charge pump voltage
converters which generate +10V and -10V supplies from the
5V supply. The family of devices offers a wide variety of
high-speed RS-232 transmitter/receiver combinations to
accommodate various applications (see Selection Table).
The HIN206E, HIN211E and HIN213E feature a low power
shutdown mode to conserve energy in batte ry powered
applications. In addition, the HIN213E provides two active
receivers in shutdown mode allowing for easy “wakeup”
capability.
The driver s fe ature true TT L/CM OS input compatibility, slew
rate-limited output, and 300 power-off source impedance.
The receivers can handle up to ±30V input, and have a 3k
to 7k input impedance. The receivers also feature
hysteresis to greatly improve noise rejection.
Features
Pb-Free Plus Anneal Available (RoHS Compliant)
High Speed ISDN Compatible . . . . . . . . . . . . . 230kbits/s
ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
Meets All RS-232E and V.28 Specifications
Requires Only 0.1µF or Greater External Capacitors
Two Receivers Active in Shutdown Mode (HIN213E)
Requires Only Single +5V Power Supply
Onboard Voltage Doubler/Inverter
Low Power Consumption (Typ) . . . . . . . . . . . . . . . . . 5mA
Low Power Shutdown Function (Typ) . . . . . . . . . . . . .1µA
Three-State TTL/CMOS Receiver Outputs
Multiple Drivers
-±10V Output Swing for +5V Input
-300 Power-Off Source Impedance
- Output Current Limiting
- TTL/CMOS Compatible
Multiple Receivers
-±30V Input Voltage Range
-3k to 7k Input Impedance
- 0.5V Hysteresis to Imp rove Noise Rejection
Applications
Any System Requiring High-Speed RS-232
Communications Port
- Compute r - Portable , Mainframe, Laptop
- Peripheral - Printers and Terminals
- Instrumentation, UPS
- Modems, ISDN T erminal Adaptors
Selecti o n Ta ble
PART
NUMBER POWER SUPPLY
VOLTAGE
NUMBER OF
RS-232
DRIVERS
NUMBER OF
RS-232
RECEIVERS
NUMBER OF
0.1µF
EXTERNAL
CAPACITORS
LOW POWER
SHUTDOWN/TTL
THREE-STATE
NUMBER OF
RECEIVERS
ACTIVE IN
SHUTDOWN
HIN202E +5V 2 2 4 Capacitors No/No 0
HIN206E +5V 4 3 4 Capacitors Yes/Yes 0
HIN207E +5V 5 3 4 Capacitors No/No 0
HIN208E +5V 4 4 4 Capacitors No/No 0
HIN211E +5V 4 5 4 Capacitors Yes/Yes 0
HIN213E +5V 4 5 4 Capacitors Yes/Yes 2
HIN232E +5V 2 2 4 Capacitors No/No 0
Data Sheet November 4, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003-2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
2FN4315.16
November 4, 2005
Ordering Information
PART NO. PART
MARKING
TEMP.
RANGE
(°C) PACKAGE PKG.
DWG. #
HIN202ECB HIN202ECB 0 to 70 16 Ld SOIC (W) M16.3
HIN202ECB-T HIN202ECB 16 Ld SOIC (W) Tape and
Reel M16.3
HIN202ECBZ
(Note) 202ECBZ 0 to 70 16 Ld SOIC (W)
(Pb-free) M16.3
HIN202ECBZ-T
(Note) 202ECBZ 16 Ld SOIC (W) Tape and
Reel (Pb-free) M16.3
HIN202ECBN HIN202ECBN 0 to 70 16 Ld SOIC (N) M16.15
HIN202ECBN-T HIN202ECBN 16 Ld SOIC (N) Tape and
Reel M16.15
HIN202ECBNZ
(Note)
202ECBNZ 0 to 70 16 Ld SOIC (N)
(Pb-free) M16.15
HIN202ECBNZ-T
(Note)
202ECBNZ16 Ld SOIC (N) Tape and
Reel (Pb-free) M16.15
HIN202ECP HIN202ECP 0 to 70 16 Ld PDIP E16.3
HIN202ECPZ
(Note) 202ECPZ 0 to 70 16 Ld PDIP*
(Pb-free) E16.3
HIN202EIB HIN202EIB -40 to 85 16 Ld SOIC (W) M16.3
HIN202EIB-T HIN202EIB 16 Ld SOIC (W) Tape and
Reel M16.3
HIN202EIBZ
(Note) 202EIBZ -40 to 85 16 Ld SOIC (W)
(Pb-free) M16.3
HIN202EIBZ-T
(Note) 202EIBZ 16 Ld SOIC (W) Tape and
Reel (Pb-free) M16.3
HIN202EIBN HIN202EIBN -40 to 85 16 Ld SOIC (N) M16.15
HIN202EIBN-T HIN202EIBN 16 Ld SOIC (N) Tape and
Reel M16.15
HIN202EIBNZ
(Note)
202EIBNZ-40 to 85 16 Ld SOIC (N)
(Pb-free) M16.15
HIN202EIBNZ-T
(Note)
202EIBNZ16 Ld SOIC (N) Tape and
Reel (Pb-free) M16.15
HIN206ECB HIN206ECB 0 to 70 24 Ld SOIC M24.3
HIN206ECB-T HIN206ECB 24 Ld SOIC Tape and
Reel M24.3
HIN206ECBZ
(Note) HIN206ECBZ 0 to 70 24 Ld SOIC
(Pb-free) M24.3
HIN206ECBZ-T
(Note) HIN206ECBZ 24 Ld SOIC Tape and
Reel (Pb-free) M24.3
HIN206EIA HIN206EIA -40 to 85 24 Ld SSOP M24.209
HIN206EIAZ
(Note) HIN206EIAZ -40 to 85 24 Ld SSOP
(Pb-free) M24.209
HIN206EIAZ-T
(Note) HIN206EIAZ 24 Ld SSOP Tape and
Reel (Pb-free) M24.209
HIN206EIAZA
(Note) HIN206EIAZ -40 to 85 24 Ld SSOP
(Pb-free) M24.209
HIN206EIAZA-T
(Note) HIN206EIAZ 24 Ld SSOP Tape and
Reel (Pb-free) M24.209
HIN207ECA-T HIN207ECA 24 Ld SSOP Tape and
Reel M24.209
HIN207ECAZ
(Note) HIN207ECAZ 0 to 70 24 Ld SSOP
(Pb-free) M24.209
HIN207ECAZ-T
(Note) HIN207ECAZ 24 Ld SSOP Tape and
Reel (Pb-free) M24.209
HIN207ECB HIN207ECB 0 to 70 24 Ld SOIC M24.3
HIN207ECB-T HIN207ECB 24 Ld SOIC Tape and
Reel M24.3
HIN207ECBZ
(Note)
HIN207ECBZ 0 to 70 24 Ld SOIC
(Pb-free)
M24.3
HIN207ECBZ-T
(Note)
HIN207ECBZ 24 Ld SOIC Tape and
Reel (Pb-free)
M24.3
HIN207EIA HIN207EIA -40 to 85 24 Ld SSOP M24.209
HIN207EIAZ
(Note) HIN207EIAZ -40 to 85 24 Ld SSOP
(Pb-free) M24.209
HIN207EIAZ-T
(Note) HIN207EIAZ 24 Ld SSOP Tape and
Reel (Pb-free) M24.209
HIN207EIB HIN207EIB -40 to 85 24 Ld SOIC M24.3
HIN207EIB-T HIN207EIB 24 Ld SOIC Tape and
Reel M24.3
HIN207EIBZ
(Note) HIN207EIBZ -40 to 85 24 Ld SOIC
(Pb-free) M24.3
HIN207EIBZ-T
(Note) HIN207EIBZ 24 Ld SOIC Tape and
Reel (Pb-free) M24.3
HIN208ECA HIN208ECA 0 to 70 24 Ld SSOP M24.209
HIN208ECA-T HIN208ECA 24 Ld SSOP Tape and
Reel M24.209
HIN208ECAZ
(Note) HIN208ECAZ 0 to 70 24 Ld SSOP
(Pb-free) M24.209
HIN208ECAZ-T
(Note) HIN208ECAZ 24 Ld SSOP Tape and
Reel (Pb-free) M24.209
HIN208ECAZA-T
(Note) HIN208ECAZ 24 Ld SSOP Tape and
Reel (Pb-free) M24.209
HIN208ECB HIN208ECB 0 to 70 24 Ld SOIC M24.3
HIN208ECB-T HIN208ECB 24 Ld SOIC Tape and
Reel M24.3
HIN208ECBZ
(Note) HIN208ECBZ 0 to 70 24 Ld SOIC
(Pb-free) M24.3
HIN208ECBZ-T
(Note) HIN208ECBZ 24 Ld SOIC Tape and
Reel (Pb-free) M24.3
HIN208EIA HIN208EIA -40 to 85 24 Ld SSOP M24.209
HIN208EIA-T HIN208EIA 24 Ld SSOP Tape and
Reel M24.209
Ordering Information (Continued)
PART NO. PART
MARKING
TEMP.
RANGE
(°C) PACKAGE PKG.
DWG. #
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
3FN4315.16
November 4, 2005
HIN208EIAZ
(Note) HIN208EIAZ -40 to 85 24 Ld SSOP
(Pb-free) M24.209
HIN208EIAZ-T
(Note) HIN208EIAZ 24 Ld SSOP Tape and
Reel (Pb-free) M24.209
HIN208EIB HIN208EIB -40 to 85 24 Ld SOIC M24.3
HIN208EIBZ
(Note) HIN208EIBZ -40 to 85 24 Ld SOIC
(Pb-free) M24.3
HIN211ECA HIN211ECA 0 to 70 28 Ld SSOP M28.209
HIN211ECA-T HIN211ECA 28 Ld SSOP Tape and
Reel M28.209
HIN211ECAZ
(Note) HIN211ECAZ 0 to 70 28 Ld SSOP
(Pb-free) M28.209
HIN211ECAZ-T
(Note) HIN211ECAZ 28 Ld SSOP Tape and
Reel (Pb-free) M28.209
HIN211ECB HIN211ECB 0 to 70 28 Ld SOIC M28.3
HIN211ECBZ
(Note) HIN211ECBZ 0 to 70 28 Ld SOIC
(Pb-free) M28.3
HIN211ECBZ-T
(Note) HIN211ECBZ 28 Ld SOIC Tape and
Reel (Pb-free) M28.3
HIN211EIA HIN211EIA -40 to 85 28 Ld SSOP M28.209
HIN211EIA-T HIN211EIA 28 Ld SSOP Tape and
Reel M28.209
HIN211EIAZ
(Note) HIN211EIAZ -40 to 85 28 Ld SSOP
(Pb-free) M28.209
HIN211EIAZ-T
(Note) HIN211EIAZ 28 Ld SSOP Tape and
Reel (Pb-free) M28.209
HIN211EIB HIN211EIB -40 to 85 28 Ld SOIC M28.3
HIN211EIBZ
(Note) HIN211EIBZ -40 to 85 28 Ld SOIC
(Pb-free) M28.3
HIN213ECA HIN213ECA 0 to 70 28 Ld SSOP M28.209
HIN213ECA-T HIN213ECA 28 Ld SSOP Tape and
Reel M28.209
HIN213ECAZ
(Note) HIN213ECAZ 0 to 70 28 Ld SSOP
(Pb-free) M28.209
HIN213ECAZ-T
(Note) HIN213ECAZ 28 Ld SSOP Tape and
Reel (Pb-free) M28.209
HIN213EIA HIN213EIA -40 to 85 28 Ld SSOP M28.209
HIN213EIA-T HIN213EIA 28 Ld SSOP Tape and
Reel M28.209
HIN213EIAZ
(Note) HIN213EIAZ -40 to 85 28 Ld SSOP
(Pb-free) M28.209
HIN213EIAZ-T
(Note) HIN213EIAZ 28 Ld SSOP Tape and
Reel (Pb-free) M28.209
HIN213EIB HIN213EIB -40 to 85 28 Ld SOIC M28.3
HIN213EIBZ
(Note) HIN213EIBZ -40 to 85 28 Ld SOIC
(Pb-free) M28.3
Ordering Information (Continued)
PART NO. PART
MARKING
TEMP.
RANGE
(°C) PACKAGE PKG.
DWG. #
HIN232ECA HIN232ECA 0 to 70 16 Ld SSOP M16.209
HIN232ECA-T HIN232ECA 16 Ld SSOP Tape and
Reel M16.209
HIN232ECAZ-T
(Note) HIN232ECAZ 16 Ld SSOP Tape and
Reel (Pb-free) M16.209
HIN232ECB HIN232ECB 0 to 70 16 Ld SOIC (W) M16.3
HIN232ECB-T HIN232ECB 16 Ld SOIC (W) Tape and
Reel M16.3
HIN232ECBN HIN232ECBN 0 to 70 16 Ld SOIC (N) M16.15
HIN232ECBN-T HIN232ECBN 16 Ld SOIC (N) Tape and
Reel M16.15
HIN232ECBNZ
(Note) 232ECBNZ 0 to 70 16 Ld SOIC (N)
(Pb-free) M16.15
HIN232ECBNZ-T
(Note) 232ECBNZ 16 Ld SOIC (N) Tape and
Reel (Pb-free) M16.15
HIN232ECBZ
(Note) 232ECBZ 0 to 70 16 Ld SOIC (W)
(Pb-free) M16.3
HIN232ECBZ-T
(Note) 232ECBZ 16 Ld SOIC (W) Tape and
Reel (Pb-free) M16.3
HIN232ECP HIN232ECP 0 to 70 16 Ld PDIP E16.3
HIN232ECPZ
(Note) HIN232ECPZ 0 to 70 16 Ld PDIP*
(Pb-free) E16.3
HIN232EIBN HIN232EIBN -40 to 85 16 Ld SOIC (N) M16.15
HIN232EIBN-T HIN232EIBN 16 Ld SOIC (N) Tape and
Reel M16.15
HIN232EIBNZ
(Note) 232EIBNZ -40 to 85 16 Ld SOIC (N)
(Pb-free) M16.15
HIN232EIBNZ-T
(Note) 232EIBNZ 16 Ld SOIC (N) Tape and
Reel (Pb-free) M16.15
HIN232EIV HIN232EIV -40 to 85 16 Ld TSSOP M16.173
HIN232EIV-T HIN232EIV 16 Ld TSSOP Tape and
Reel M16.173
HIN232EIVZ
(Note) 232EIVZ -40 to 85 16 Ld TSSOP
(Pb-free) M16.173
HIN232EIVZ-T
(Note) 232EIVZ 16 Ld TSSOP Tape and
Reel (Pb-free) M16.173
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Ordering Information (Continued)
PART NO. PART
MARKING
TEMP.
RANGE
(°C) PACKAGE PKG.
DWG. #
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
4FN4315.16
November 4, 2005
Pinouts HIN202E (PDIP, SOIC)
TOP VIEW HIN206E (SOIC, SSOP)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1-
C2+
C2-
R2IN
T2OUT
VCC
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
GND
V-
T3OUT
T1OUT
T2OUT
R1IN
R1OUT
T2IN
T1IN
GND
VCC
C1+
V+
C1-
T4OUT
R2OUT
SD
EN
T4IN
R3OUT
V-
C2-
C2+
R2IN
T3IN
R3IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
VCC
+5V
2
V+
16
T1OUT
T2OUT
T1IN
T2IN
T1
T2
11
10
14
7
+5V400k
+5V400k
R1OUT R1IN
R1
1312
5k
R2OUT R2IN
R2
89
5k
+10V TO -10V
VOLTAGE INVERTER 0.1µF
6
V-
C2+
C2-
+
0.1µF
4
5
+5V TO 10V
VOLTAGE INVERTER
C1+
C1-
+
0.1µF
1
3+0.1µF
+
GND
15
9
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T4OUT
T4IN
T1IN
T2IN
T3IN
T1
T2
T3
T4
+5V
+0.1µF
+0.1µF
+
0.1µF
7
6
2
3
18 1
19 24
10
12 11
15
V+
V-
C1+
C1-
C2+
C2-
+5V400k
+5V400k
+5V400k
+5V400k
+
0.1µF
13
14
R1OUT R1IN
R1
45
5k
R2OUT R2IN
R2
2322
5k
R3OUT R3IN
R3
1617
5k
EN 20 21 SD
GND
8
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
5FN4315.16
November 4, 2005
HIN207E (SOIC, SSOP)
TOP VIEW HIN208E (SOIC, SSOP)
TOP VIEW
Pinouts (Continued)
T3OUT
T1OUT
T2OUT
R1IN
R1OUT
T2IN
T1IN
GND
VCC
C1+
V+
C1-
T4OUT
R2OUT
T5IN
T5OUT
T4IN
R3OUT
V-
C2-
C2+
R2IN
T3IN
R3IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
T2OUT
T1OUT
R2IN
R2OUT
T1IN
R1OUT
R1IN
GND
VCC
C1+
V+
C1-
T3OUT
R3OUT
T4IN
T4OUT
T3IN
R4OUT
V-
C2-
C2+
R3IN
T2IN
R4IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
9
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T4OUT
T4IN
T1IN
T2IN
T3IN
T1
T2
T3
T4
+5V
+0.1µF
+0.1µF
+
0.1µF
7
6
2
3
18 1
19 24
10
12 11
15
V+
V-
C1+
C1-
C2+
C2-
+5V400k
+5V400k
+5V400k
+5V400k
+
0.1µF
13
14
R1OUT R1IN
R1
45
5k
R2OUT R2IN
R2
2322
5k
R3OUT R3IN
R3
1617
5k
T5OUT
T5IN
T5
21 20
+5V400k
GND
8
9
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T4OUT
T4IN
T1IN
T2IN
T3IN
T1
T2
T3
T4
+5V
+0.1µF
+0.1µF
+
0.1µF
5
18
2
1
19 24
21 20
10
12 11
15
V+
V-
C1+
C1-
C2+
C2-
+5V400k
+5V400k
+5V400k
+5V400k
+
0.1µF
13
14
R1OUT R1IN
R1
76
5k
R2OUT R2IN
R2
34
5k
R3OUT R3IN
R3
2322
5k
R4OUT R4IN
R4
1617
5k
GND
8
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
6FN4315.16
November 4, 2005
HIN211E (SOIC, SSOP)
TOP VIEW HIN213E (SOIC, SSOP)
TOP VIEW
NOTE: R4 and R5 active in shutdown.
Pinouts (Continued)
T3OUT
T1OUT
T2OUT
R2IN
R2OUT
T2IN
T1IN
R1OUT
R1IN
GND
VCC
C1+
V+
C1-
T4OUT
R3OUT
SD
EN
R4IN
T4IN
R5OUT
R5IN
V-
C2-
C2+
R3IN
R4OUT
T3IN
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
T3OUT
T1OUT
T2OUT
R2IN
R2OUT
T2IN
T1IN
R1OUT
R1IN
GND
VCC
C1+
V+
C1-
T4OUT
R3OUT
SD
EN
R4IN
T4IN
R5OUT
R5IN
V-
C2-
C2+
R3IN
R4OUT
T3IN
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
11
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T1IN
T2IN
T3IN
T1
T2
T3
+5V
+0.1µF
+0.1µF
+
0.1µF
7
6
2
3
20 1
12
14 13
17
V+
V-
C1+
C1-
C2+
C2-
+5V400k
+5V400k
+5V400k
+
0.1µF
15
16
R1OUT R1IN
R1
9
5k
R2OUT R2IN
R2
45
5k
R3OUT R3IN
R3
2726
5k
R4OUT R4IN
R4
2322
5k
R5OUT R5IN
R5
1819
5k
EN 24
8
T4OUT
T4IN
T4
21 28
+5V400k
SD
25
GND
10
11
VCC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1OUT
T2OUT
T3OUT
T1IN
T2IN
T3IN
T1
T2
T3
+5V
+0.1µF
+0.1µF
+
0.1µF
7
6
2
3
20 1
12
14 13
17
V+
V-
C1+
C1-
C2+
C2-
+5V400k
+5V400k
+5V400k
+
0.1µF
15
16
R1OUT R1IN
R1
9
5k
R2OUT R2IN
R2
45
5k
R3OUT R3IN
R3
2726
5k
R4OUT R4IN
R4
2322
5k
R5OUT R5IN
R5
1819
5k
EN 24
8
T4OUT
T4IN
T4
21 28
+5V400k
25 SD
GND
10
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
7FN4315.16
November 4, 2005
HIN232E (PDIP, SOIC, SSOP, TSSOP)
TOP VIEW
Pin Descriptions
PIN FUNCTION
VCC Power Supply Input 5V ±10%, (5V ±5% HIN207E).
V+ Internally generated positive supply (+10V nominal).
V- Internally generated negative supply (-10V nominal).
GND Ground Lead. Connect to 0V.
C1+ External capacitor (+ terminal) is connected to this lead.
C1- External capacitor (- terminal) is connected to this lead.
C2+ External capacitor (+ terminal) is connected to this lead.
C2- External capacitor (- terminal) is connected to this lead.
TIN Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400k pull-up resisto r to VCC is connected to e ach lead .
TOUT Transmitter Outputs. These are RS-232 levels (nominally ±10V).
RIN Receiver Inputs. These in puts a ccept RS -232 input levels. A n int ernal 5kp ull-do wn re sistor t o GND is conn ect ed to e ach input.
ROUT Receiver Outputs. These are TTL/CMOS levels.
EN, EN Receiver Enable Input. With EN = 5V (HIN213E EN=0V), the receiver outputs are placed in a high impedance state.
SD, SD Shutdown Input. With SD = 5V (HIN213E SD = 0V), the ch arge pump is d isabled, the receiver outputs are in a high impedance
state (except R4 and R5 of HIN213E) and the transmitters are shut off.
NC No Connect. No connections are made to these leads.
Pinouts (Continued)
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1-
C2+
C2-
R2IN
T2OUT
VCC
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
GND
V-
VCC
+5V
2
V+
16
T1OUT
T2OUT
T1IN
T2IN
T1
T2
11
10
14
7
+5V400k
+5V400k
R1OUT R1IN
R1
1312
5k
R2OUT R2IN
R2
89
5k
+10V TO -10V
VOLTAGE INVERTER 0.1µF
6
V-
C2+
C2-
+
0.1µF
4
5
+5V TO 10V
VOLTAGE INVERTER
C1+
C1-
+
0.1µF
1
3+0.1µF
+
GND
15
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
8FN4315.16
November 4, 2005
Absolute Maximum Ratings Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < VCC < 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . .(VCC -0.3V) < V+ < 12V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . .-12V < V- < (GND +0.3V)
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V < VIN < (V+ +0.3V)
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VTXOUT < (V+ +0.3V)
ROUT . . . . . . . . . . . . . . . . . (GND -0.3V) < VRXOUT < (V+ +0.3V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
ESD Classification . . . . . . . . . . . . . . . . . . . . See Specification Table
Operating Conditions
Temperature Range
HIN2XXECX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
HIN2XXEIX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
Thermal Resistance (Typical, Note 1) θJA (°C/W)
16 Ld SOIC (N) Package . . . . . . . . . . . . . . . . . . . . . 110
16 Ld SOIC (W) Package. . . . . . . . . . . . . . . . . . . . . 100
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 155
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 145
16 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . 90
24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75
24 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 135
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 70
28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 100
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300°C
(SOIC and SSOP - Lead Tips Only)
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the ope rational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Test Conditions: VCC = +5V ±10%, (VCC = +5V ±5% HIN207E); C1-C4 = 0.1µF; TA = Operating Temperature
Range
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
SUPPLY CURRENTS
Power Supply Current, ICC No Load,
TA = 25°C HIN202E - 8 15 mA
HIN206E - HIN208E, HIN211E,
HIN213E -1120mA
HIN232E - 5 10 mA
Shutdown Supply Current, ICC(SD) TA = 25°C HIN206E, HIN211E - 1 10 µA
HIN213E - 15 50 µA
LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS
Input Logic Low, VlL TIN, EN, SD, EN, SD --0.8V
Input Logic High, VlH TIN 2.0 - - V
EN, SD, EN, SD 2.4 - - V
Transmitter Input Pullup Current, IPTIN = 0V - 15 200 µA
TTL/CMOS Receiver Output Voltage Low, VOL IOUT = 1.6mA (HIN202E, HIN232E, IOUT = 3.2mA) - 0.1 0.4 V
TTL/CMOS Receiver Output Voltage High, VOH IOUT = -1mA 3.5 4.6 - V
TTL/CMOS Receiver Output Leakage EN = VCC, EN = 0, 0V < ROUT < VCC -0.5±10 µA
RECEIVER INPUTS
RS-232 Input Voltage Range, VIN -30 - +30 V
Receiver Input Impedance, RIN TA = 25°C, VIN = ±3V 3.0 5.0 7.0 k
Receiver Input Low Threshold, VIN (H-L) VCC = 5V,
TA = 25°C Active Mode - 1.2 - V
Shutdown Mode HIN213E R4 and R5 - 1.5 - V
Receiver Input High Threshold, VIN (L-H) VCC = 5V,
TA = 25°C Active Mode - 1.7 2.4 V
Shutdown Mode HIN213E R4 and R5 - 1.5 2.4 V
Receiver Input Hysteresis, VHYST VCC = 5V, No Hysteresis in Shutdown Mode 0.2 0.5 1.0 V
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
9FN4315.16
November 4, 2005
TIMING CHARACTERISTICS
Output Enable Time, tEN HIN206E, HIN211E, HIN213E - 600 - ns
Output Disable Time, tDIS HIN206E, HIN211E, HIN213E - 200 - ns
Transmitter, Receiver Propagation Delay, tPD HIN213E SD = 0V, R4, R5 - 4.0 40 µs
HIN213E SD = VCC, R1 - R5 - 0.5 10 µs
All except HIN213E - 0.5 10 µs
Transition Region Slew Rate, SRTRL = 3k, CL = 1000pF Measured from +3V to -3V
or -3V to +3V, 1 Transmitter Switching (No te 2) 32045V/µs
TRANSMITTER OUTPUTS
Output Voltage Swing, TOUT Transmitter Outputs, 3k to Ground ±5±9±10 V
Output Resistance, TOUT VCC = V+ = V- = 0V, VOUT = ±2V 300 - -
RS-232 Output Short Circuit Current, ISC TOUT Shorted to GND - ±10 - mA
ESD PERFORMANCE
RS-232 Pins
(TOUT, RIN)Human Body Model - ±15 - kV
IEC61000-4-2 Contact Discharge - ±8-kV
IEC61000-4-2 Air Gap (Note 3) - ±15 - kV
All Other Pins Human Body Model - ±2-kV
NOTES:
2. Guaranteed by design.
3. Meets Level 4.
Test Circuits (HIN232E)
FIGURE 1. GENERAL TEST CIRCUIT FIGURE 2. POWER-OFF SOURCE RESISTANCE
CONFIGURATION
Electrical Specifications Test Conditions: VCC = +5V ±10%, (VCC = +5V ±5% HIN207E); C1-C4 = 0.1µF; TA = Operating Temperature
Range (Continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1-
C2+
C2-
V-
R2IN
T2OUT
VCC
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
GND
+4.5V TO
+5.5V INPUT
3k
T1 OUTPUT
RS-232 ±30V INPUT
TTL/CMOS OUTPUT
TTL/CMOS INPUT
TTL/CMOS INPUT
TTL/CMOS OUTPUT
+
-
0.1µF
C3
+
-
0.1µF
C1
+
-
0.1µF
C2
+
-
0.1µF C4
3k
OUTPUT
RS-232
±30V INPUT
T2
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1-
C2+
C2-
V-
R2IN
T2OUT
VCC
T1OUT
R1IN
R1OUT
T1IN
T2IN
R2OUT
GND
T2OUT
T1OUT
VIN = ±2V A
ROUT = VIN/I
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
10 FN4315.16
November 4, 2005
Detailed Description
The HIN2XXE family of high-speed RS-232
transmitters/receivers are powered by a single +5V power
supply, feature low power consumption, and meet all ElA
RS232C and V.28 specifications. The circuit is divided into
three sections: the charge pump, transmitter, and receiver.
Charge Pump
An equivalent circuit of the charge pump is illustrate d in
Figure 3. The charge pump contains two sections: the
voltage doubler and the voltage inverter. Each section is
driven by a two phase, internally generated clock to
generate +10V and -10V. The nominal clock frequency is
125kHz. During phase one of the clock, capacitor C1 is
charged to VCC. During phase two, the voltage on C1 is
added to VCC, producing a signal across C3 equal to twice
VCC. During phase two, C2 is also charged to 2VCC, and
then during phase one, it is inverted with respect to ground
to produce a signal across C4 equal to -2VCC. The charge
pump accepts input voltages up to 5.5V. The output
impedance of the voltage doubler section (V+) is
approximately 200, and the output impedance of the
voltage inverter section (V-) is approximately 450. A typical
application uses 0.1µF capacitors for C1-C4, however, the
value is not critical. Increasing the values of C1 and C2 will
lower the output impedance of the voltage doubler and
inverter, increasing the values of the reservoir capacitors, C3
and C4, lowers the ripple on the V+ and V- supplies.
During shutdown mode (HIN206E, HIN211E and HIN2 13E)
the charge pump is turned off, V+ is pulled down to VCC, V-
is pulled up to GND, and the supply current is reduced to
less than 10µA. The transmitter outputs are disabled and the
receiver outputs (except for HIN213E, R4 and R5) are
placed in the high impedance state.
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic
threshold is about 26% of VCC, or 1.3V for VCC = 5V. A logic
1 at the input results in a voltage of between -5V and V- at
the output, and a logic 0 results in a voltage between +5V
and (V+ -0.6V). Each transmitter input has an internal 400k
pullup resistor so any unused input can be left unconnecte d
and its output remains in its low state. The output voltage
swing meets the RS-232C specifications of ±5V minimum
with the worst case conditions of: all transmitters driving 3k
minimum load impedance, VCC = 4.5V, and maximum
allowable operating temperature. Th e transmitters have an
internally limited output slew rate which is less than 30V/µs.
The outputs are short circuit protected and can be shorted to
ground indefinitely. The powered down output impedance is
a minimum of 300 with ±2V applied to the outputs and
VCC = 0V.
Receivers
The receiver inputs accept up to ±30V while presentin g th e
required 3k to 7k input impedance even if the power is off
(VCC = 0V). The receivers have a typical input threshold of
1.3V which is within the ±3V limits, known as the transition
region, of the RS-232 specifications. The re ceiver output is
0V to VCC. The output will be low whenever the input is
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis (except during shutdown) to improve noise
rejection. The receiver Enable line EN, (EN on HIN213E)
when unasserted, disables the recei ver outputs, placing
them in the high impedance mode. The receiver outputs are
also placed in the high impedance state when in shutdown
mode (except HIN213E R4 and R5).
+
-C1 +
-C3 +
-C2 +
-C4
S1 S2 S5 S6
S3 S4 S7 S8
VCC GND
RC
OSCILLATOR
VCC
GND
V+ = 2VCC GND
V- = - (V+)
C1+
C1-C2-
C2+
VOLTAGE INVERTER
VOLTAGE DOUBLER
FIGURE 3. CHARGE PUMP
TOUT
V- < VTOUT < V+
300
400k
TXIN
GND < TXIN < VCC
V-
V+
VCC
FIGURE 4. TRANSMITTER
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
11 FN4315.16
November 4, 2005
HIN213E Operation in Shutdown
The HIN213E features two receivers, R4 and R5, which
remain active in shutdown mode. During normal operation
the receivers propagation delay is typically 0.5µs. This
propagation delay may increase slightly during shutdown.
When entering shut down mode, receivers R4 and R5 are
not valid for 80µs after SD = VIL. When exiting shutdown
mode, all receiver outputs will be invalid until the charge
pump circuitry reaches normal operating voltage. This is
typically less than 2ms when using 0.1µF capacitors.
Application Information
The HIN2XXE may be used for all RS-232 data terminal and
communication links. It is partic ularly useful in applications
where ±12V power supplies are not availa ble for
conventional RS-232 interface circuits. The applica ti ons
presented represent typical interface configurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 7. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling ra te select)
is generated by driving them through a 5k resistor
connected to V+.
In applications requiring four RS-232 inputs and outputs
(Figure 8), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common
reservoir capacitors is the elimination of two capacitors and
the reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
ROUT
GND < VROUT < VCC
5k
RXIN
-30V < RXIN < +30V
GND
VCC
FIGURE 5. RECEIVER
TIN
VOL
VOL
tPLH
tPHL
AVERAGE PROPAGATION DELAY =tPHL + tPLH
2
OR
RIN
TOUT
OR
ROUT
FIGURE 6. PROPAGATION DELAY DEFINITION
-
+
-
+
-
+
CTR (20) DATA
TERMINAL READY
DSRS (24) DATA
SIGNALING RATE
RS-232
INPUTS AND OUTPUTS
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
CTS (5) CLEAR TO SEND
SIGNAL GROUND (7)15
8
13
7
14
16 -
+
6
R2 R1
T2
T1
9
12
10
11
4
5
3
1
HIN232E
C1
0.1µF
C2
0.1µF
TD
RTS
RD
CTS
SELECT
+5V
INPUTS
OUTPUTS
TTL/CMOS
FIGURE 7. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS
HANDSHAKING
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
12 FN4315.16
November 4, 2005
Typical Performance Curves
FIGURE 9. V- SUPPLY VOLTAGE vs VCC FIGURE 10. V+, V- OUTPUT VOLTAGE vs LOAD
-
+
RS-232
INPUTS AND OUTPUTS
DTR (20) DATA TERMINAL READY
DSRS (24) DATA SIGNALING RATE SELECT
DCD (8) DATA CARRIER DETECT
R1 (22) RING INDICATOR
SIGNAL GROUND (7)15
8
13
7
14
2
-
+
4
R2 R1
T2
T1
9
12
10
11
3
1HIN232E
C1
0.1µF
DTR
DSRS
DCD
R1
+5V
INPUTS
OUTPUTS
TTL/CMOS
-
+-
+
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
CTS (5) CLEAR TO SEND
8
13
7
14
15
R2 R1
T2
T1
9
12
10
11
4
5
3
1
HIN232E
C1
0.1µFC2
0.1µF
TD
RTS
RD
CTS
INPUTS
OUTPUTS
TTL/CMOS
-
+
5C2
0.1µF
16
C3
0.2µF
6
26
V- V+
-
+
C4
0.2µF
16 VCC
VCC
FIGURE 8. COMBINING TWO HIN232Es FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
12
10
8
6
4
2
03.5 4.0 4.5 6.0
VCC
V- SUPPLY VOLTAGE (V)
5.0 5.53.0
0.1µF
35
|ILOAD| (mA)
V+ (VCC = 4V)
V+ (VCC = 5V)
V- (VCC = 5V)
V- (VCC = 4V)
TA = 25°C
TRANSMITTER OUTPUTS
OPEN CIRCUIT
302520151050
SUPPLY VOLTAGE (|V|)
0
12
10
8
6
4
2
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
13 FN4315.16
November 4, 2005
Die Characteristics
METALLIZATION:
Type: Al
Thickness: 10kÅ ±1kÅ
SUBSTRATE POTENTIAL
GND
PASSIVATION:
Type: Nitride over Silox
Nitride Thickness: 8kÅ
Silox Thickness: 7kÅ
TRANSISTOR COUNT:
185
PROCESS:
CMOS Metal Gate
Metallization Mask Layout HIN232E
PIN 1 C1+
PIN 2 V+
C1-
PIN 7
PIN 17 VCC
PIN 3
C2+
PIN 4
C2-
PIN 5
V-
PIN 6
T2IN
PIN 11 T1IN
PIN 12 R1OUT
PIN 13 R1IN
PIN 14 T1OUT
PIN 15 GND
PIN 16
T2OUT
PIN 8R2IN
PIN 9T3OUT
PIN 10R2OUT
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
14 FN4315.16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Dual-In-Line Plastic Packages (PDIP)
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in JE-
DEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and are measured with the leads constrained to be perpendic-
ular to datum .
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
eA-C-
C
L
E
eA
C
eB
eC
-B-
E1
INDEX 12 3 N/2
N
AREA
SEATING
BASE
PLANE
PLANE
-C-
D1
B1 Be
D
D1
A
A2
L
A1
-A-
0.010 (0.25) C AMBS
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A - 0.210 - 5.33 4
A1 0.015 - 0.39 - 4
A2 0.115 0.195 2.93 4.95 -
B 0.014 0.022 0.356 0.558 -
B1 0.045 0.070 1.15 1.77 8, 10
C 0.008 0.014 0.204 0.355 -
D 0.735 0.775 18.66 19.68 5
D1 0.005 - 0.13 - 5
E 0.300 0.325 7.62 8.25 6
E1 0.240 0.280 6.10 7.11 5
e 0.100 BSC 2.54 BSC -
eA0.300 BSC 7.62 BSC 6
eB- 0.430 - 10.92 7
L 0.115 0.150 2.93 3.81 4
N16 169
Rev. 0 12/93
15 FN4315.16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45°
C
H0.25(0.010) BM M
α
M16.15 (JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9
C 0.0075 0.0098 0.19 0.25 -
D 0.3859 0.3937 9.80 10.00 3
E 0.1497 0.1574 3.80 4.00 4
e 0.050 BSC 1.27 BSC -
H 0.2284 0.2440 5.80 6.20 -
h 0.0099 0.0196 0.25 0.50 5
L 0.016 0.050 0.40 1.27 6
N16 167
α -
Rev. 1 6/05
16 FN4315.16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Thin Shrink Small Outline Plastic Packages (TSSOP)
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. L” is the length of terminal for soldering to a substrate.
7. N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08 mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact. (Angles in degrees)
α
INDEX
AREA E1
D
N
123
-B-
0.10(0.004) C AMBS
e
-A-
b
M
-C-
A1
A
SEATING PLANE
0.10(0.004) c
E0.25(0.010) BM M
L
0.25
0.010
GAUGE
PLANE
A2
0.05(0.002)
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A - 0.043 - 1.10 -
A1 0.002 0.006 0.05 0.15 -
A2 0.033 0.037 0.85 0.95 -
b 0.0075 0.012 0.19 0.30 9
c 0.0035 0.008 0.09 0.20 -
D 0.193 0.201 4.90 5.10 3
E1 0.169 0.177 4.30 4.50 4
e 0.026 BSC 0.65 BSC -
E 0.246 0.256 6.25 6.50 -
L 0.020 0.028 0.50 0.70 6
N16 167
α0o8o0o8o-
Rev. 1 2/02
17 FN4315.16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen-
sion at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
C
H0.25(0.010) BM M
α
0.25
0.010
GAUGE
PLANE
A2
M16.209 (JEDEC MO-150-AC ISSUE B)
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A - 0.078 - 2.00 -
A1 0.002 - 0.05 - -
A2 0.065 0.072 1.65 1.85 -
B 0.009 0.014 0.22 0.38 9
C 0.004 0.009 0.09 0.25 -
D 0.233 0.255 5.90 6.50 3
E 0.197 0.220 5.00 5.60 4
e 0.026 BSC 0.65 BSC -
H 0.292 0.322 7.40 8.20 -
L 0.022 0.037 0.55 0.95 6
N16 167
α -
Rev. 3 6/05
18 FN4315.16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45°
C
H0.25(0.010) BM M
α
M16.3 (JEDEC MS-013-AA ISSUE C)
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0926 0.1043 2.35 2.65 -
A1 0.0040 0.0118 0.10 0.30 -
B 0.013 0.0200 0.33 0.51 9
C 0.0091 0.0125 0.23 0.32 -
D 0.3977 0.4133 10.10 10.50 3
E 0.2914 0.2992 7.40 7.60 4
e 0.050 BSC 1.27 BSC -
H 0.394 0.419 10.00 10.65 -
h 0.010 0.029 0.25 0.75 5
L 0.016 0.050 0.40 1.27 6
N16 167
α -
Rev. 1 6/05
19 FN4315.16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Shrink Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm
(0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen-
sion at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
INDEX
AREA E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004) C
H
µ
0.25(0.010) BM M
α
0.25
0.010
GAUGE
PLANE
A2
M24.209 (JEDEC MO-150-AG ISSUE B)
24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A - 0.078 - 2.00 -
A1 0.002 - 0.05 - -
A2 0.065 0.072 1.65 1.85 -
B 0.009 0.014 0.22 0.38 9
C 0.004 0.009 0.09 0.25 -
D 0.312 0.334 7.90 8.50 3
E 0.197 0.220 5.00 5.60 4
e 0.026 BSC 0.65 BSC -
H 0.292 0.322 7.40 8.20 -
L 0.022 0.037 0.55 0.95 6
N24 247
α0o8o0o8o-
Rev. 1 3/95
20 FN4315.16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
INDEX
AREA E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45o
C
H
µ
0.25(0.010) BM M
α
M24.3 (JEDEC MS-013-AD ISSUE C)
24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0926 0.1043 2.35 2.65 -
A1 0.0040 0.0118 0.10 0.30 -
B 0.013 0.020 0.33 0.51 9
C 0.0091 0.0125 0.23 0.32 -
D 0.5985 0.6141 15.20 15.60 3
E 0.2914 0.2992 7.40 7.60 4
e 0.05 BSC 1.27 BSC -
H 0.394 0.419 10.00 10.65 -
h 0.010 0.029 0.25 0.75 5
L 0.016 0.050 0.40 1.27 6
N24 247
α0o8o0o8o-
Rev. 0 12/93
21 FN4315.16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Shrink Small Outline Plastic Packages (SSOP)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
C
H0.25(0.010) BM M
α
0.25
0.010
GAUGE
PLANE
A2
M28.209 (JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A - 0.078 - 2.00 -
A1 0.002 - 0.05 - -
A2 0.065 0.072 1.65 1.85 -
B 0.009 0.014 0.22 0.38 9
C 0.004 0.009 0.09 0.25 -
D 0.390 0.413 9.90 10.50 3
E 0.197 0.220 5.00 5.60 4
e 0.026 BSC 0.65 BSC -
H 0.292 0.322 7.40 8.20 -
L 0.022 0.037 0.55 0.95 6
N28 287
α -
Rev. 2 6/05
22
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN4315.16
November 4, 2005
HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
INDEX
AREA E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45o
C
H
µ
0.25(0.010) BM M
α
M28.3 (JEDEC MS-013-AE ISSUE C)
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0926 0.1043 2.35 2.65 -
A1 0.0040 0.0118 0.10 0.30 -
B 0.013 0.0200 0.33 0.51 9
C 0.0091 0.0125 0.23 0.32 -
D 0.6969 0.7125 17.70 18.10 3
E 0.2914 0.2992 7.40 7.60 4
e 0.05 BSC 1.27 BSC -
H 0.394 0.419 10.00 10.65 -
h 0.01 0.029 0.25 0.75 5
L 0.016 0.050 0.40 1.27 6
N28 287
α0o8o0o8o-
Rev. 0 12/93