ANALOG DEVICES AN-398 APPLICATION NOTE ONE TECHNOLOGY WAY e P.O. BOX 9106 e NORWOOD, MASSACHUSETTS 02062-9106 e 617/329-4700 Evaluation Boards for Single, Dual, and Quad Operational Amplifiers by Adolfo A. Garcia, Manager ADSC Applications Engineering INTRODUCTION This application note describes evaluation boards for single, dual, and quad operational amplifiers whose pin- outs follow industry standard amplifier sockets. These printed circuit boards were designed to provide quick and easy evaluation of precision and medium-speed (gain-bandwidth products < 10 MHz) operational ampli- fiers in inverting and noninverting applications. Further- more, provisions have been made on the boards to evaluate operational amplifier capacitive loading effects using inside-the-loop or outside-the-loop capacitive load compensation techniques. Figure 1 illustrates the basic circuit configuration for each of the evaluation boards. Provisions have been made to the board for optional components in addition to the required feedback resistors and power supply by- pass capacitors. For example, if the application requires evaluating amplifier inside-the-loop capacitive load compensation, then Rx and Cy can be used. If an exter- nal outside-the-loop compensation technique is used, a jumper is substituted for Rx, Cy is removed completely, c2 poe SEL R2 Iw a Cy ; 3 FT te iH! a | ola J3 x V 200% 5 Your iN Cc. == RL R3 L Figure 1. Complete Circuit Schematic and Connections for the Operational Amplifier Evaluation Board and R4 is inserted in series with the amplifier output. Jumpers and open circuits are used throughout the evaluation board as necessary to provide most any circuit configuration. For example, if the application requires an ac-coupled output voltage, then C3 can be substituted for J4. Power Supply Connections Power supply connections for the evaluation boards are shown in Figure 2. For optimal low frequency power supply filtering, Cp; and Cp2 should be 10 uF (or larger) electrolytic capacitors. These capacitors should be of the tantalum type with working voltages greater than 25 V in +15 V applications. Cp3 and Cp, are 0.1 LF ceramic capacitors and are located in close proximity to the amplifiers supply pins for optimal high frequency filtering. They, too, should exhibit working voltages greater than or equal to 25 V. For additional filtering, provisions have been made for the use of resistors in series with the amplifier power supply leads (Rs, and Rs_). To avoid input/output voltage headroom issues, voltage drops due to these resistors should be limited to less than 0.1V. If these resistors are not needed, then 0.4 wire jumpers should be used. Rs, PIN 7 (SINGLE) V+ PIN 8 (DUAL) Coa Cpg i PIN 4 (QUAD) JOE 0.1pF GND Cpath Cp4 10pF 7D 0.1uF y-0 MAO | I o PIN 4 (SINGLE, DUAL) PIN 11 (QUAD) Rs Figure 2. Power Supply Connections and Bypassing Com- ponents for the Operational Amplifier Evaluation BoardNoninverting and Inverting Amplifier Configurations Configuring the evaluation board for noninverting amplifier applications is straightforward and is shown in Figure 3. In this configuration, jumper J1 connects R1 to GND, jumper J2 couples the input signal to the noninverting terminal of the amplifier, Cy, is removed al- together, and jumper J3 is substituted for Rx. R3 can be used as a termination/input bias current compensation resistor, if required. The circuit's signal transfer equa- tion, including the effects of finite amplifier open-loop gain, is given by Equation 1: Vout _4, R2 1 Vin R1 14 1 14-82) Eq. 1 Ao. R1 where Ao, = Amplifier open-loop gain, in Volts per Volt (V/V); and R2, R1 = Amplifier feedback network resistors, in ohms Vout R. . t Figure 3. Circuit Configurations for Noninverting Ampli- fier Applications For inverting amplifier applications, the circuit configura- tion is shown in Figure 4. The input signal is applied to R1 through J1; thus, the circuits transfer equation is given by Equation 2: ii / R2 Ri 14 qi (1+ #4) where Ag, R2, and R1 have been previously defined. Eq. 2 c2 er OO o J2 J3 R R3 % t Figure 4, Circuit Connections for Inverting Amplifier Applications Filter capacitors C2 and C1 can be used to tailor the re- sponse of the amplifier circuit. For either noninverting or inverting applications, capacitor C2 works with R2 to bandlimit the amplifiers high frequency response and places a pole in the response at: 1 fp =_\___ Eq.3 POR xR2xC2 q On the other hand, capacitor C1 works with R11 to intro- duce a zero in the amplifier response. The location of this low frequency corner is given by Equation 4: 1 fz =_____ Eq. 4 2 2nxR1xC1 4 Note, capacitor C1 should be used only in noninverting amplifier configurations, for, if it were used in inverting amplifier applications, it would appear in parallel with the input capacitance of the operational amplifier and could cause instability. In many applications, it is often necessary to evaluate the total output voltage error of an amplifier configura- tion due to amplifier input offset voltage, common- mode rejection, input bias and offset currents, and open-loop gain. Using either the noninverting or the in- verting amplifier configuration, the total output voltage error of an amplifier due to these parameters is given by Equation 5: Vout = 7 1 x 14+ Al (1+ #4) Vom CMRR where Ao, = Amplifier open-loop gain, in V/V; Vos = Amplifier input offset voltage, in volts; Vow = Applied input common-mode voltage, in volts; CMRR = Amplifier common-mode rejection ratio, in V/V; lg = Amplifier input bias current, in amperes; los = Amplifier input offset current, in amperes; and R2, R17 = Amplifier feedback network resistors, in ohms. Eq. 5 [[vos + | +2), (1 _ fos) x R2| R1 In applications where large source/feedback resistors or amplifiers with large input bias currents are used, then R3 should be set to the parallel combination of R1 and R2.Amplifier Capacitive Load Compensation As with any operationa! amplifier, care must be taken when driving capacitive loads. Many operational ampli- fier data sheets now provide information with regard to amplifier output voltage overshoot versus capacitive load. In those cases where little or no information is provided by the manufacturer on this issue, the circuit configuration shown in Figure 5 can be used to evaluate an amplifiers capacitive load driving capability using an inside-the-loop compensation technique. This technique works equally well for inverting or noninverting applica- tions where the closed-loop circuit gain is greater than unity. Unity-gain circuit configurations for inside-the- loop capacitive load compensation are a special case and will be mentioned shortly. R2 ; Gc ot J oo Rt & R J4 y J 3 K 2 a Vout Vin c L . L % Figure 5. Amplifier Circuit Connections for an Inside-the- Loop Capacitive Load Compensation Technique Load capacitance reacts with an amplifiers open-loop output resistance (Ro) to produce an additional pole in the feedback path. If the additional pole falls within the loop-gain response of the amplifier, then the added phase shift produced by this pole will introduce response ringing and can even cause oscillation. As shown in the figure, Rx is used to isolate the amplifiers output stage from the capacitive load, and Cy is used to provide a secondary bypass feedback loop which controls of the amplifiers loop-gain response at high frequencies. Although the selection for Rx and Cx is empirical in the final analysis, Equations 6 and 7 can be used to select initial values for Ry and Cy: Ro xR Ry =O" Eq. 6 x R2 1 R2+R1 Cy =| 14+ |x| |x C, x RP Eq. 7 * f al) [ R2 ne 4 where Ao= Amplifier high-frequency, open-loop out- put resistance, in ohms; Ac: = Amplifier closed-loop gain, in V/V; C, = Load capacitance, in farads; and R1, R2= Amplifier feedback network resistances, in ohms. These equations are valid for either inverting or non- inverting applications. Note, that Ro (amplifier open- loop output resistance) can be determined empirically or from amplifier data sheets. If graphs for amplifier output impedance versus frequency are provided, then Rog is equal to the value of the amplifiers closed-loop output impedance at the open-loop, unity-gain cross- over frequency. Note, Cy is a product of the circuit's closed-loop gain, the amplifiers high frequency output impedance, and the load capacitance. Two important points with regard to this technique require mention: First, Ry cannot be made arbitrarily large because the voltage drop across Rx detracts from the amplifiers output voltage range. Second, this tech- nique reduces the bandwidth of the circuit and is deter- mined by Equation 8: i ~ OnxR2xCy Eq. 8 f3 0B Unity-gain noninverting amplifier applications are a special case. Since R1, shown in Figure 5, is not used in voltage buffer applications, Equation 7 cannot be used to determine an initial value for Cy. In these cases, an approximation can be made for Cy and is given by Equa- tion 9: _ 2x RyxC, Eq. 9 R2 a Cx where Ry = Ro, C,, and R2 have been previously defined. In applications where an inside-the-loop compensation technique cannot be used, as in the case for current- feedback operational amplifiers, outside-the-feedback loop compensation techniques substitute R4 for the jumper wire at the output of the amplifier, as shown in Figure 6. Note, capacitor Cy is removed completely and a jumper wire is used in place of Rx. The value for R4 is empirical, as it depends on the choice of amplifier, capacitive load, and the closed-loop circuit gain. Some amplifier data sheets (References [1] and [2]) provide information regarding outside-the-loop capacitive load compensation for those specific devices. However, in general, drawbacks to this approach are: limited avail- able slew rate (amplifier short-circuit current determines output voltage slew rate), output voltage swing limita- tions (R4 forms a signal attenuator with R_), and signal bandwidth limitations (R4 and R, form a low-pass filter with C,).Figure 6. Amplifier Circuit Connections for an Outside- the-Loop Capacitive Load Compensation Technique Evaluation Board Application Caveats These evaluation boards were designed for engineering evaluations of single, dual, and quad operational amplifiers. As such, these boards were intended for engineering laboratory environments where ambient temperatures range from +20C to +50C. They are not designed for heavy-duty production or incoming device qualification where these boards could be exposed to wide operating temperatures. In fact, since the layouts of the circuits are not isothermal, their use in evaluating operational amplifier input offset voltage drift perfor- mance over temperature should be carefully considered. As previously mentioned, the evaluation board layouts have not been optimized for high speed voltage- or cur- rent-feedback amplifiers that exhibit gain-bandwidth products (GBWP) > 10 MHz. On the other hand, these boards can be used in applications where signal rates of change are less than 50 V/us. Lastly, these boards should also not be used to evaluate very low input bias current (Ig < 50 pA) and electrometer- grade operational amplifiers that require very clean printed circuit boards, Teflon component standoffs, and conformal coatings to minimize parasitic leakage currents. Circuit Board Layout and Construction Considerations Figures 7, 8, and 9 illustrate the layouts of the single, dual, and quad operational amplifier evaluation boards. Although not shown to scale, the finished dimensions of the boards are 3.15 inches by 3.15 inches for the single op amp evaluation board, 3.4 inches by 3.5 inches for the dual op amp evaluation board, and 3.8 inches by 4.65 inches for the quad op amp evaluation board. In Figure 1, jumper wires J1, J2, and J3 are mounted into the board on a 0.3 center-to-center spacing (centers), and jumper wire J4 is mounted on 0.4 centers. Resis- tors used in the evaluation board should be of the metal- film type and are mounted into the board on 0.4 centers. Signal filter capacitors, C1 and C2, and supply bypass capacitors, Cp3 and Cp,, are mounted into the evaluation board on 0.2 centers. Low frequency by- pass capacitors, Cp; and Cp2, are mounted into the boards on 0.1 center-to-center spacing. Pin sockets are flush-mounted into the board, for ease of component interchangeability. They are, however, optional in those applications where higher speed performance is necessary. To avoid unintentional resonant-tuned circuits, components used in the evalua- tion board should have short leads, no longer than that required for insertion directly into the board or into the pin sockets. Lead forming tools are useful to help keep resistor component lead lengths short: a lead 0.1 long can exhibit a self-inductance of 2 nH. GND OV- V+ 1 ORS F RS- CR VIN B fy your ( rq EXO+~ op Om (2 CP, sO 2 ve NF SINGLE OPAMP EVAL. BD. ANALOG REY. 2.0 18/05 MMBDEVICES oN Figure 7a. Single Op Amp Evaluation Board Topside Silkscreen (Not to Scale) Figure 7b. Single Op Amp Evaluation Board Topside Metalization (Not to Scale) Figure 7c. Single Op Amp Evaluation Board Backside Metalization (Not to Scale)VOUTs, VOUT 9 QNO VE Ve GND v~ V+ VOUTA VOUT B (< ) a ? 3" mp CI) & a VINA 8 =a 7! > B.) VIN > _) 2 9 SB ne . ~Jd4 we ao % ) (sg Bz wo [| VIN A ( Ne 3 VIN B VINg | 3 = VINc Oy ae B=) (@ abe Bblg) , Fe s) (s che [jj (E) s (s e <a a] 2"chy _ VOUTg (s ED aw ) vouT DUAL OPAMP EVAL. BD. rv. 28 1898 Caeviers QUAD OPAMP EVAL. BD. DEVICES 20 88 FE ANALOG SANTA CLARA MMBDEVICES Figure 8a. Dual Op Amp Evaluation Board Topside Figure 9a. Quad Op Amp Evaluation Board Topside Silkscreen (Not to Scale) Silkscreen (Not to Scale) Figure 8b. Dual Op Amp Evaluation Board Topside Figure 9b. Quad Op Amp Evaluation Board Topside Metalization (Not to Scale) Metalization (Not to Scale) oe e@ @ @ e =i . 8 PF e" a a e 3 e ow Soe e @ @ wre ey e f= =) _e oe] ik. ee 2 ee a a 2 @ @ eo" e @ @ Figure 8c. Dual Op Amp Evaluation Board Backside Figure 9c. Quad Op Amp Evaluation Board Backside Metalization (Not to Scale) Metalization (Not to Scale)An example of a complete evaluation board is illustrated in Figure 10. The circuit is constructed around the OP279, a single-supply, rail-to-rail input/output opera- tional amplifier with high output current drive. Each of the amplifiers in the circuit was configured for a gain of -10 using 909 Q for R2 and 100 Q for R1. Figure 10. Dual Op Amp Evaluation Board Configured for the OP279 in a Gain-of-10 Inverting Application Acknowledgments The author wishes to acknowledge the efforts of Louis Agot, PRA engineering technician, who designed the board layouts, routed, built, and tested the prototypes. Operational Amplifier Evaluation Board Materials List For the single operational amplifier evaluation board: Description Quantity Evaluation Board 1 Pin Sockets! 36 BNC Connectors, Female? 2 Double Turret Terminals 3 For the dual operational amplifier evaluation board: Description Quantity Evaluation Board 1 Pin Sockets 60 BNC Connectors, Female 4 Double Turret Terminals 3 For the quad operational amplifier evaluation board: Description Quantity Evaluation Board 1 Pin Sockets 114 BNC Connectors, Female 8 Double Turret Terminals 3 NOTES TAIL pin socket quantities include those required for the power supply bypass components. Pin sockets are available fram MIL-MAX (Part No. 140 1-0-15-01-30-02-10-0). MIL-MAX can be contacted at (516) 922-6000. ? Right angle BNC connectors are available from A/D Electronics (Part No: 560-401-00). A/D Electronics can be contacted at (206) 851-8005. 3 Double turret terminals are available from Concord Electronics (Part No. 10-204-2-01). Concord Electronics can be contacted at (212) 777-6571. REFERENCES 1. "AD9617 Low Distortion, Precision Wideband Opera- tional Amplifier Data Sheet. Order number: C1353- 10-10/89. 2. AD811 High Performance Video Operational Ampli- fier Data Sheet. Order number: C159224-11/91. These data sheets can be requested directly from the Analog Devices Literature Center at (800) 262-5643, Option 2, or at (617) 461-3392. E2233a-12-1/96 PRINTED IN U.S.A.