AAT2820
Triple-Output Charge Pump Regulator
2820.2006.04.1.4 1
ChargePump
General Description
The AAT2820 is a member of AnalogicTech's Total
Power Management IC™ (TPMIC™) product fam-
ily. It is a triple output charge pump targeted for
active matrix thin-film transistor (TFT), liquid crys-
tal displays (LCDs), and CCD camera bias for sys-
tems operating with lithium-ion/polymer batteries.
The device generates three regulated output volt-
ages for turn-on gate drive bias (VPOS), turn-off
gate voltage bias (VNEG), and logic voltage.
The VPOS and VNEG output voltages are independ-
ently regulated. Both outputs use external diode
and capacitor multiplier stages (as many stages as
required) to regulate output voltages up to +25V
and -25V. An additional regulated output voltage is
provided for biasing the display module. Built-in
soft-start circuitry prevents excessive inrush current
during start-up. A high switching frequency enables
the use of very small external capacitors. A low
shutdown feature disconnects the load from VIN and
reduces quiescent current to less than 0.1µA.
The AAT2820 is available in a Pb-free TDFN44-16
package and is specified over the -40°C to +85°C
operating temperature range.
Features
• VIN Range: 2.7V to 5.5V
5V Regulated Output Voltage
Two Adjustable Regulated Output Voltages:
VPOS and VNEG
Positive Charge Pump Up to +25V
Negative Charge Pump Down to -25V
Optional Power-Up Sequence with
AAT2820-1
Internal Power MOSFETs
<1µA of Shutdown Current
Internally Controlled Soft Start
• Fast Transient Response
Ultra-Thin Solution (No Inductors)
• 16-Pin TDFN44 Package
Temperature Range: -40°C to +85°C
Applications
• CCD Cameras
• Hand-Held Instruments
• Passive-Matrix Displays
Personal Digital Assistants (PDAs)
• TFT Active-Matrix LCDs
Typical Application
V
POS
C
IN
V
IN
C
FLY
IN
C+ C-
DRVP
FBP
GND
FBN
REF
DRVN
C
OUT
AAT2820
V
NEG
V
OUT
OUT
EN
EN/PN
Enable (Positive and
Negative Output)
Enable
Pin Description
Pin Configuration
TDFN44-16
(Top View)
GND
GND
OUT
DRVP
DRVN
3
IN
EN
GND
EN/PN
FBP
GND
FBN
REF
C+
C-
GND
4
5
1
2
6
7
8
14
13
12
16
15
11
10
9
Pin # Symbol Function
1 DVRP Positive charge pump driver output. Output high level is VSUPP and low level is PGND.
2 DRVN Negative charge pump driver output. Output high level is VSUPN and low level is PGND.
3, 4, 8, 9, 12 GND Ground connection.
5 OUT Regulated 5V output. Requires a 4.7µF bypass capacitor to ground.
6 IN Input power supply. A 1µA capacitor should be connected between this pin and ground.
7 EN Enable input control pin. When low, the device is powered down and consumes less than
0.1µA. This pin should not be left floating.
10 C- Flying capacitor negative terminal.
11 C+ Flying capacitor positive terminal. Connect a 1µF capacitor between C+ and C-.
13 FBP Positive charge pump feedback input. Regulates to 1.2V nominal. Connect feedback
resistive divider to analog ground (GND).
14 EN/PN Enable input. When EN/PN is pulled low, VPOS and VNEG are turned off.
15 REF Internal reference bypass terminal. Connect a 0.1µF capacitor from this terminal to ana-
log ground (GND). External load capability to 50uA. REF is disabled in shutdown.
16 FBN Negative charge pump regulator feedback input. Regulates to 0V nominal. Connect feed-
back resistive divider to the reference (REF).
EP Exposed paddle (bottom); connect to GND directly beneath package.
AAT2820
Triple-Output Charge Pump Regulator
22820.2006.04.1.4
Absolute Maximum Ratings1
Thermal Information2
Symbol Description Value Units
θJA Maximum Thermal Resistance 50 °C/W
PDPower Dissipation32.0 W
Symbol Description Value Units
VIN Input Voltage -0.3 to 6.0 V
VOUT Charge Pump Output -0.3 to 6.0 V
VEN EN or EN/PN to GND -0.3 to 6.0 V
VN_CH DRVN to GND -0.3V to (VIN + 0.3V) V
VP_CH DRVP to GND -0.3V to (VIN + 0.3V) V
Other Inputs REF, FBN, FBP to GND -0.3V to (VIN + 0.3V) V
IMAX
Continuous Current into DRVN, DRVP, OUT ±200 mA
All Other Pins ±10
TLEAD Maximum Soldering Temperature (at leads, 10 sec) 300 °C
AAT2820
Triple-Output Charge Pump Regulator
2820.2006.04.1.4 3
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at condi-
tions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Mounted on an FR4 board.
3. Derate 6.25mW/°C above 25°C.
Electrical Characteristics1
VIN = 3.3V; CIN = COUT = CFLY = 1.0µF, TA= 0°C to +85°C, unless otherwise noted.
Typical values are TA= 25°C.
Symbol Description Conditions Min Typ Max Units
VIN Input Supply Range 2.7 5.5 V
UVLO Input Under-Voltage Lockout VIN Rising 1.8
Threshold VIN Falling 1.6 V
VFBP = 1.5V, VFBN = -0.2V, No Load on
ICC Operating Current DRVN and DRVP; EN = EN/PN = VIN 5.0 mA
ISD Shutdown Supply Current VEN = VEN/PN = 0V 0.1 1.0 µA
TSS Soft-Start Time 200 µs
FOSC Operating Frequency 1.0 MHz
Negative Low-Power Charge Pump
VFBN FBN Regulation Voltage -100 0 +100 mV
IFBN FBN Input Bias Current VFBN = -50mV -100 +100 nA
INEG Maximum Negative Output Current23.3 VIN 5.5; No Load at VPOS and VOUT 25 mA
RDS_NCH DRVN NCH On-Resistance 1.5 5.0 Ω
RDS_PCH
MIN DRVN PCH On-Resistance VFBN = 100mV, VIN = 4V 1.0 5.0 Ω
MAX DRVN PCH On-Resistance VFBN = -100mV, VIN = 4V 20 kΩ
Positive Low-Power Charge Pump
VFBP FBP Regulation Voltage 1.15 1.2 1.25 V
IFBP FBP Input Bias Current VFBP = 1.5V -60 +100 nA
IPOS Maximum Positive Output Current23.3 VIN 5.5; No Load at VNEG and VOUT 25 mA
RDS_PCH DRVP PCH On-Resistance 1.0 5.0 Ω
RDS_NCH
MIN DRVP NCH On-Resistance VFBP = 1.15V, VIN = 4V 3 15 Ω
MAX DRVP NCH On-Resistance VFBP = 1.25V, VIN = 4V 20 kΩ
Reference
Reference Voltage -2.0µA < IREF < 50µA 1.18 1.2 1.22
VREF Reference Under-Voltage Lockout VREF Rising 0.8
V
Threshold
VEN(L) EN and EN/PN Threshold Low 0.5 V
VEN(H) EN and EN/PN Threshold High 1.5 V
IIEnable Input Current -1.0 1.0 µA
TSD Over-Temperature Shutdown 140 °C
Threshold
THYS Over-Temperature Shutdown 15 °C
Hysteresis
Regulated 5V Charge Pump
VOUT
Output Voltage Tolerance 2.7V < VIN < 5V, IOUT = 50mA ±4.0 %
Output Voltage 3.0V < VIN < 5V, IOUT = 100mA 4.8 5.0 5.2 V
IOUT Maximum Output Current23.3 VIN 5.5; No Load at VPOS and VNEG 150 mA
AAT2820
Triple-Output Charge Pump Regulator
42820.2006.04.1.4
1. The AAT2820 is guaranteed to meet performance specifications from 0°C to 70°C. Specification over the -40°C to +85°C operating
temperature range is assured by design, characterization, and correlation with statistical process controls.
2. Loads greater than those listed in maximum output load conditions may cause permanent damage to the device.
Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1µF, COUT = 4.7µF; TA= 25°C, unless otherwise noted.
Operating Current vs. Temperature
Temperature (°
°
C)
Operating Current (mA)
-40 -20 0 20 40 60 80 100
4.9
5.0
5.1
5.2
5.3
5.4
5.5
5.6
5.7
Switching Frequency vs. Temperature
Temperature (°
°
C)
Switching Frequency (kHz)
840
850
860
870
880
890
900
910
920
930
-40 -20 0 20 40 60 80 100
5V Output Efficiency vs. Output Current
(V
OUT
= 5V; V
POS
= 12.5V @ 10mA; V
NEG
= -7.8V @ 5mA)
Output Current (mA)
Efficiency (%)
0
10
20
30
40
50
60
70
0 20 40 60 80 100 120 140 160
V
IN
= 2.7V
V
IN
= 3.3V
V
IN
= 4.2V
5V Output Voltage vs. Temperature
(No-Load at V
POS
and V
NEG
)
Temperature (°
°
C)
5V Output Voltage (V)
4.90
4.92
4.94
4.96
4.98
5.00
5.02
-40 -20 0 20 40 60 80 100
V
IN
= 2.7V V
IN
= 3.3V
V
IN
= 4.2V
5V Output Efficiency vs. Output Current
(No-Load at V
POS
and V
NEG
)
Output Current (mA)
Efficiency (%)
0
10
20
30
40
50
60
70
80
90
100
0.1 1.0 10 100 100
0
V
IN
= 4.2V
V
IN
= 3.3V
V
IN
= 2.7V
V
IN
= 3.0V
5V Output vs. Output Current
Output Current (mA)
Output Voltage (V)
4.2
4.4
4.6
4.8
5.0
5.2
0 50 100 150 200 250 300
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.3V
V
IN
= 3.0V
AAT2820
Triple-Output Charge Pump Regulator
2820.2006.04.1.4 5
Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1µF, COUT = 4.7µF; TA= 25°C, unless otherwise noted.
Negative Charge Pump Output
vs. Output Current
(No Load at V
POS
and V
OUT
)
Output Current (mA)
Output Voltage (V)
-7.1
-7.4
-7.3
-7.4
-7.5
-7.6
0 5 10 15 20 25 30
V
IN
= 2.7V
V
IN
= 3.3V
V
IN
= 4.2V
Negative Charge Pump Output
Voltage vs. Temperature
(No Load at V
POS
and V
OUT
)
Temperature (°
C)
Negative Output Voltage (V)
-8.15
-8.10
-8.05
-8.00
-7.95
-7.90
-7.85
-7.80
-7.75
-7.70
-7.65
-40 -20 0 20 40 60 80 100
V
NEG
= -7.8V
I
NEG
= 15mA
I
NEG
= 5mA
Positive Charge Pump Efficiency
vs. Output Current
(No Load at V
NEG
and V
OUT
)
Output Current (mA)
Efficiency (%)
20
30
40
50
60
70
80
0 5 10 15 20 25 30
V
IN
= 2.7V V
IN
= 3.0V
V
IN
= 4.2V
V
IN
= 3.3V
Positive Charge Pump Output
Voltage vs. Output Current
(No Load at V
NEG
and V
OUT
)
Output Current (mA)
Positive Output Voltage (V)
12
12.1
12.2
12.3
12.4
12.5
0 5 10 15 20 25 30
V
IN
= 4.2V
V
IN
= 3.3V
V
IN
= 2.7V
Positive Charge Pump Output
Voltage vs. Temperature
(No Load at V
NEG
and V
OUT
)
Temperature (°
°
C)
Positive Output Voltage (V)
12.30
12.35
12.40
12.45
12.50
12.55
12.60
12.65
12.70
-40 -20 0 20 40 60 80 10
0
V
POS
= 12.5V
I
POS
= 5mA
I
POS
= 15mA
Reference Voltage vs. Temperature
Temperature (°
°
C)
Reference Voltage (V)
1.17
1.18
1.19
1.20
1.21
1.22
-40 -20 0 20 40 60 80 10
0
AAT2820
Triple-Output Charge Pump Regulator
62820.2006.04.1.4
Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1µF, COUT = 4.7µF; TA= 25°C, unless otherwise noted.
AAT2820-1 Power-Up Sequence
(V
IN
= 4.2V)
Time (250μ
μ
s/div)
Enable
(2V/div)
V
OUT
(5V/div)
V
NEG
(10V/div)
V
POS
(10V/div)
5V
4V
0V
-10
V
0V
0V
10V
0V
AAT2820 Power-Up Sequence
Time (250μ
μ
s/div)
Enable
(2V/div)
V
OUT
(5V/div)
V
NEG
(10V/div)
V
POS
(10V/div)
5V
4V
0V
-10
V
0V
0V
10V
0V
5V Output Startup Time
with 100mA Load
Time (100μ
μ
s/div)
Enable
(1V/div)
VOUT
(1V/div)
+5V
3V
0V
0V
Output Ripple Waveform
(V
OUT
= 5V @ 100mA; V
POS
= 12.5V @ 10mA;
V
NEG
= -7.8V @ 10mA)
Time (250ns/div)
V
NEG
(10mV/div)
V
OUT
(20mV/div)
V
POS
(10mV/div)
Load Transient Response
(10mA - 100mA; V
IN
= 3.3V)
Output Voltage
(50mV/div) (top)
Output Current
(50mA/div) (bottom)
Time (50μ
μ
s/div)
4.85
4.90
4.95
5.00
5.05
-0.05
0.00
0.05
0.10
0.15
100mA
10mA
ROUT = 500Ω to 55Ω
Negative Charge Pump Efficiency
vs. Output Current
(No Load at V
POS
and V
OUT
)
Output Current (mA)
Efficiency (%)
20
25
30
35
40
45
50
55
60
65
70
0 5 10 15 20 25 30
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.3V V
IN
= 3.0V
AAT2820
Triple-Output Charge Pump Regulator
2820.2006.04.1.4 7
Typical Characteristics
VIN = 3.3V, VOUT = 5V, VPOS = 12.5V, VNEG = -7.8V, CIN = CFLY = 1µF, COUT = 4.7µF; TA= 25°C, unless otherwise noted.
Maximum Line Load
(Negative Charge Pump)
I
NEG
(mA)
V
NEG
(V)
-27
-24
-21
-18
-15
-12
-9
-6
-3
0 5 10 15 20 25 30
2 Stages
4 Stages
5 Stages
6 Stages
3 Stages
Maximum Line Load
(Positive Charge Pump)
I
POS
(mA)
V
POS
(V)
6
9
12
15
18
21
24
27
0 5 10 15 20 25 30
2 Stages 3 Stages 4 Stages
5 Stages
6 Stages
AAT2820
Triple-Output Charge Pump Regulator
82820.2006.04.1.482820.2006.04.1.4
AAT2820
Triple-Output Charge Pump Regulator
2820.2006.04.1.4 9
Functional Block Diagram
Soft Start
2X Charge
Pump
Charge
Pump
V
REF
V
REF
1MHz
Oscillator
Reference
Oscillator
Over-
Temperature
Protection
Control
Logic
EN
IN
EN/PN
OUT
DVRP
DVRN
FBP
REF
FBN
GND
C+ C-
Functional Description
5V Regulated Output
The main power supply is a charge pump doubler
architecture used to support the high-current
demand required by the application. Charge pump
regulation is achieved by sensing the output volt-
age through an internal resistor divider network. A
switch doubling circuit is enabled when the divided
output drops below a preset trip point controlled by
an internal comparator. The free-running charge
pump switching frequency is approximately 1MHz.
The charge pump is designed to deliver 150mA of
continuous current (loads greater than the maxi-
mum load condition may cause permanent dam-
age to the device).
Dual Charge Pump Regulators
The dual charge pump provides low-power regu-
lated output voltages from two individual charge
pumps. Using a single stage, the first charge pump
inverts the supply voltage (VIN) and provides a reg-
ulated negative output voltage. The second charge
pump doubles VIN and provides a regulated posi-
tive output voltage. These outputs use external
Schottky diodes and capacitor multiplier stages (as
many as required) to regulate up to ±25V. A con-
stant switching frequency of 1MHz minimizes the
output ripple and capacitor size.
Negative Charge Pump Regulator
During the first half-cycle, the P-channel MOSFET
turns on and the flying capacitor C11 charges to
VIN minus a diode drop (Figure 1). During the sec-
ond half-cycle, the P-channel MOSFET turns off
and the N-channel MOSFET turns on, level shifting
C11. This connects C11 in parallel with the output
reservoir capacitor C23. If the voltage across C23
minus a diode drop is less than the voltage across
C11, current flows from C11 to C23 until the diode
turns off.
AAT2820
Triple-Output Charge Pump Regulator
10 2820.2006.04.1.4
Positive Charge Pump Regulator
During the first half-cycle, the N-channel MOSFET
turns on and charges the flying capacitor C12
(Figure 2). During the second half-cycle, the N-
channel MOSFET turns off and the P-channel
MOSFET turns on, level shifting C12 the input volt-
age. This connects C12 in parallel with the reser-
voir capacitor C24. If the voltage across C24 plus a
diode drop is less than the level shifted by the fly-
ing capacitor (C12 + VIN), charge is transferred
from C12 to C24 until the diode turns off. If the
positive charge pump output is connected to
ground, output may not recover until power is recy-
cled. Loads greater than the maximum load condi-
tion may cause permanent damage to the device;
please review the Maximum Line Load Curves and
the Electrical Characteristics table.
Voltage Reference
The voltage reference is a simple band gap with an
output voltage equal to VBE + K*VT. The band gap
reference amplifier has an additional compensation
capacitor from the negative input to the output. This
capacitor serves to slow down the circuit during
startup and soft starts the voltage reference and the
regulator output from overshoot. The reference cir-
cuit amplifier also increases the overall PSRR of the
device. An 80kΩresistor serves to isolate and buffer
the amplifier from a small internal filter capacitor and
an optional large external filter capacitor.
Enable
In the normal operating state, the AAT2820 typical-
ly consumes 5mA of quiescent operating current.
By pulling the enable pin (EN) low, the AAT2820
disables all three outputs. Once the device is shut
down, the supply current drops to less than 1µA to
maximize battery life.
The AAT2820 gives the application an option to
independently turn on/off the positive and negative
charge pump outputs. These two outputs can be
disabled by pulling the EN/PN pin low. The thresh-
old levels lie between 0.5V and 1.5V. Depending
on the application, the supplies must be sequenced
properly to avoid damage or latch-up.
Soft-Start and Start-up Sequence
The AAT2820 has an internal soft-start circuit to
guarantee a smooth transition to 5V for the main out-
put when the device is enabled (typical 200µs). This
device has two versions for the start-up sequence.
The AAT2820 ramps up the positive charge pump
after the negative charge pump is present; the
AAT2820-1 ramps up the positive charge pump
before the negative charge pump.
Over-Temperature Protection
To protect the AAT2820, as well as the system appli-
cation, this device has a thermal protection circuit
that will shut down all the charge pumps if the die
temperature rises above the preset internal thermal
limit. This protects the device if the ambient temper-
ature exceeds the operating limit for the device.
Figure 1: Negative Charge Pump Block Diagram. Figure 2: Postive Charge Pump Block Diagram.
R4
R3
V
REF
1.2V
FBP
DRVP
V
IN
GND
1/2 A4
BAT54SDW
C12
C24
OSC CTL
IN
V
OP
V
OP
= 1 + × V
REF
R4
R3
⎛⎞
⎝⎠
R1
R2
V
REF
FBN
DRVN
GND
1/2 A3
BAT54SDW
C11
C23
OSC CTL
IN
V
ON
V
ON
= -(R1/R2) x V
REF
C5
1.2V
AAT2820
Triple-Output Charge Pump Regulator
2820.2006.04.1.4 11
Design Procedure and
Component Selection
Number of Stages for Dual Charge
Pump Regulators
The number of stages required can be determined by:
for the positive output, and
for the negative output.
Where,
VNEG = Negative output voltage
VPOS = Positive output voltage
VFWD = Forward voltage drop of the Schottky diode
(0.31V, based on BAT54SDW diode when
IF= 4mA)
After solving for the number of stages (NPOS and
NNEG), round up the solutions to the next highest
integers for the number of stages required.
Tables 1 and 2 show the number of stages required
for positive and negative charge pumps, respectively.
Table 1: Number of Stages Required for
Positive Charge Pump.
Table 2: Number of Stages Required for
Negative Charge Pump.
VNEG (V) # of Stages (n)
-7 2
-8 2
-9 3
-10 3
-11 3
-12 3
-13 3
-14 4
-15 4
-16 4
-17 4
-18 5
-19 5
-20 5
-21 5
-22 6
-23 6
-24 6
-25 6
VPOS (V) # of Stages (n)
71
81
91
10 2
11 2
12 2
13 2
14 3
15 3
16 3
17 3
18 3
19 4
20 4
21 4
22 4
23 5
24 5
25 5
NNEG = VNEG
2VFWD - 5
NPOS = VPOS - 5
5 - 2VFWD
AAT2820
Triple-Output Charge Pump Regulator
12 2820.2006.04.1.4
VNEG
The negative output voltage is adjusted by a resis-
tive divider from the output (VNEG) to the FBN and
REF pin. The maximum reference voltage current
is 50µA; therefore, the minimum allowable value for
R2 of Figure 1 is 24kΩ. It is best to select the small-
est value possible for R2 as this will keep R1 to a
minimum. This limits errors due to the FBN input
bias current. The FBN input has a maximum input
bias current of 100nA. Using the full 50µA refer-
ence current for programming VNEG:
will limit the error due to the input bias current at
FBN to less than 0.2%.
With R2 selected, R1 can be determined by:
See the example in Table 3.
Table 3: Closest Value for R1 if Using 24.3kΩΩ
as R2.
VPOS
The positive output voltage is set by way of a resis-
tive divider from the output (VPOS) to the FBP and
ground pin. Limiting the size of R3 reduces the
effect of the FBP bias current. For less than 0.1%
error, limit R3 to less than 12kΩ.
Once R3 has been determined, then solve for R4
(see example in Table 4).
⎛⎞
⎝⎠
R4 = R3
·
-1
V
POS
V
REF
= = 0.1%
IFBN
IPGM
0.1μA
100μA
I
PGM
= = = 100μ
A
V
REF
R3
1.2V
12kΩ
VNEG (V) R1, Closest Value (kΩΩ)
-7 143
-8 162
-9 182
-10 205
-11 226
-12 243
-13 267
-14 287
-15 309
-16 324
-17 348
-18 360
-19 390
-20 412
-21 430
-22 453
-23 470
-24 487
-25 510
R1 = V
NEG
· R2
-V
REF
= = 0.2%
IFBN
IPGM
0.1μA
50μA
I
PGM
= = = 50μ
A
V
REF
R2
1.2V
24kΩ
AAT2820
Triple-Output Charge Pump Regulator
2820.2006.04.1.4 13
Table 4: Closest Value for R4 if Using 12.1kΩΩ
as R3.
Capacitor Selection
Careful selection of the three external capacitors
CIN, CFLY, and COUT is important because they will
affect turn-on time, output ripple, efficiency, and
load transient response. Optimum performance will
be obtained when low equivalent series resistance
(ESR) ceramic capacitors are used. In general, low
ESR may be defined as less than 100mΩ. A value
of 1µF for input and flying capacitors is a good
starting point when designing with the AAT2820.
This not only provides for a very small printed cir-
cuit board area, but cost is further reduced by the
minimized bill of materials.
Input Capacitor
A 1µF multilayer ceramic chip capacitor is suggest-
ed for the input. This capacitor should be connect-
ed between the IN pin and ground; 1µF should be
suitable for most applications. Even though the
AAT2820 switching ripple and noise are very low,
back-injected line noise may be further reduced by
increasing the value of CIN. A low equivalent series
inductance (ESL) ceramic capacitor is ideal for this
function. The size required will vary depending on
the load, output voltage, and input voltage charac-
teristics. Other types of capacitors may be used for
CIN at the cost of compromised circuit performance.
Output Capacitor
The output capacitor (COUT) should be connected
between the OUT pin and ground. Switching noise
and ripple seen on the charge pump output
increases with load current. Typically, the output
capacitor should be 5 to 10 times greater than the
flying capacitor. To minimize stray inductance, the
capacitor should be placed as closely as possible
to the IC. This keeps the high frequency content of
the input current localized, minimizing radiated and
conducted EMI.
A 1µF ceramic capacitor is recommended for most
applications for optimum transient response.
However, if the application has a larger load from
the main and multiplier stage charge pump outputs,
a 4.7µF ceramic capacitor is suggested to reduce
the feedback injection noise from the multiplier
stage and lower switching ripple. Capacitor types
other than ceramic capacitors can be used for COUT.
However, capacitors composed of non-ceramic
material will typically have a greater value of ESR,
resulting in increased output switching ripple.
Charge Pump Capacitor (CFLY)
Due to the switching operation of the voltage dou-
bling circuit topology, current flow through the flying
capacitor is bi-directional. The flying capacitor
selected must be a non-polarized type. A 1µF low
ESR ceramic capacitor is ideal for most applications.
Capacitor Characteristics
Ceramic composition capacitors are highly recom-
mended over all other types of capacitors for use
with the AAT2820. Ceramic capacitors offer many
advantages over their tantalum and aluminum elec-
trolytic counterparts. A ceramic capacitor typically
has very low ESR, is lowest cost, has a smaller
VPOS (V) R4, Closest Value (kΩΩ)
7 59.0
8 69.8
9 78.7
10 88.7
11 100.0
12 110.0
13 120.0
14 130.0
15 140.0
16 150.0
17 160.0
18 169.0
19 180.0
20 191.0
21 200.0
22 210.0
23 220.0
24 232.0
25 240.0
AAT2820
Triple-Output Charge Pump Regulator
14 2820.2006.04.1.4
PCB footprint, and is non-polarized. Low ESR
ceramic capacitors help maximize charge pump
transient response. Since ceramic capacitors are
non-polarized, they are not prone to incorrect con-
nection damage.
Rectifier Diodes
For the rectifiers, use Schottky diodes with a volt-
age rating of 1.5X the input voltage. The maximum
steady-state voltage seen by the rectifier diodes for
both the positive and negative charge pumps
(regardless of the number of stages) is:
The BAT54SDW quad Schottky in an SOT363
(2x2mm) package is a good choice for multiple-
stage charge pump configuration (see evaluation
board schematic in Figure 3).
V
RESERVE
= V
IN
- V
F
Figure 3: AAT2820 Evaluation Board Schematic (Shown With Six Stages).
1
5
1
2
A3
A1
A2
4
6
3
2
1
2
3
4
5
6
7
8
AAT2820
DRVP
DRVN
GND
GND
OUT
IN
EN
GND
FBN
REF
EN/PN
FBP
GND
C+
C-
GND
16
15
14
13
12
11
10
9
1
5
4
6
3
2
1
5
4
1
5
4
2
4
5
1
2
4
5
1
2
6
123
Enable
123
Enable/PN
U1
3
3
6
3
6
3
6
2
J5
12
J4
12
12
J3
J2
BAT54SDW
BAT54SDW
BAT54SDW
A4
A6
A5
BAT54SDW
BAT54SDW
BAT54SDW
Stage
2
Stage
3
Stage
4
Stage
5
Stage
6
Stage
2
Stage
3
Stage
4
Stage
5
Stage
612
J1
12
J6
12
J7
12
12
J8
J9
12
J10
C18
1μF
0.1μF
1μF 4.7μF1μF
C6
C4 C3 C1
0.1μF
C7
0.1μF
C8
1μF
C2
0.1μF
C9
0.1μF
C10
0.1μF
C11
0.1μF
C17
0.1μF
C16
0.1μF
C15
0.1μF
C14
C5
0.1μF
0.1μF
C13
0.1μF
C12
SN
SP
R4
R1
R2
24.3K
R3
12.1K
VOUT_5V
VIN
C19
1μF
C20
1μF
C21
1μF
C22
1μF
C23
1μF
C29
1μF
C28
1μF
C27
1μF
C26
1μF
C25
1μF
C24
1μF
VOUT_N
GND
GND
VOUT_P
GND
C1 Taiyo Yuden LMK212 BJ105KD 1μF 10V X7R 0805
C2 Taiyo Yuden LMK107 BJ105KA 1μF 10V X7R 0603
C3 Taiyo Yuden LMK212 BJ475KD 4.7μF 10V X5R 0805
C5, C9-C14 Taiyo Yuden EMK107 BJ104MA 0.1μF 16V X7R 0603
C6-C8, C15-C17 Taiyo Yuden TMK107 BJ104KA 0.1μF 25V X5R 0603
C20-C27 Taiyo Yuden EMK212 BJ105KG 1μF 16V X7R 0805
C18, C19, C28, C29 Taiyo Yuden TMK212 BJ105KG 1μF 25V X5R 0805
[Optional] C4 Taiyo Yuden LMK212 BJ105KD 1μF 10V X7R 0805
AAT2820
Triple-Output Charge Pump Regulator
2820.2006.04.1.4 15
Flying and Output Capacitor Multiplier
Stages
A 0.1µF X7R or X5R ceramic capacitor is typically
used. The voltage rating of the flying and reservoir
output capacitors will vary with the number of
charge pump stages. The reservoir output capaci-
tor should be roughly 10X the flying capacitor. Use
larger capacitors for reduced output ripple. A 1µF
X7R or X5R type ceramic is typically used.
Positive Charge Pump Capacitor
Voltage Ratings
The absolute steady-state maximum output voltage
(neglecting the internal RDS(ON) drop of the internal
MOSFETs) for the nth stage is:
where VFWD is the estimated forward drop of the
Schottky diode. This is also the voltage rating
required for the nth bulk capacitor in the positive
output charge pump.
The voltage rating for the nth flying capacitor in the
positive stage is:
where VBULK(0) is the input voltage (see Table 5).
Table 5: Positive Charge Pump Capacitor
Voltages (VFWD = 0.31V).
Negative Charge Pump Capacitor
Voltage Ratings
The absolute steady-state maximum output voltage
(neglecting the internal RDS(ON) drop of the internal
MOSFETs) for the nth stage is:
This is also the voltage rating required for the nth
bulk capacitor in the negative output charge pump.
The voltage rating for the nth flying capacitor in the
negative stage (see Table 6) is:
Table 6: Negative Charge Pump Capacitor
Voltages (VFWD = 0.31V).
PC Board Layout
The input and reference capacitor should be
placed as closely to the IC as possible. Place the
programming resistors (R1-R4) close to the IC,
minimizing trace length to FBN and FBP. Place the
main charge pump flying capacitor close to the C+
and C- pins, with wide traces and no vias. Place all
multiplier stage (charge pump) circuitry to the IC as
closely as possible using wide traces, and avoid
using vias when possible.
Figures 4 and 5 show the recommended evaluation
board layout with the TDFN44-16 package.
# of Stages (n) VBULK(n) VFLY(n)
1 -4.4V 4.7V
2 -8.8V 9.1V
3 -13.2V 13.5V
4 -17.6V 17.9V
5 -22.0V 22.3V
6 -26.4V 26.7V
V
FLY(n)
= V
FWD
- V
BULK(n)
V
BULK(n)
= -n · V
IN
+ 2 · n · V
FWD
# of Stages (n) VBULK(n) VFLY(n)
1 9.4V 4.7V
2 13.8V 9.1V
3 18.2V 13.5V
4 22.6V 17.9V
5 27.0V 22.3V
6 31.4V 26.7V
V
FLY(n)
= V
BULK(n + 1)
- V
FWD
V
BULK(n)
= (n + 1) · V
IN
- 2 · n · V
FWD
AAT2820
Triple-Output Charge Pump Regulator
16 2820.2006.04.1.4
Figure 4: AAT2820 Evaluation Board Figure 5: AAT2820 Evaluation Board
Top Side Layout. Bottom Side Layout.
AAT2820
Triple-Output Charge Pump Regulator
2820.2006.04.1.4 17
Ordering Information
Package Information
All dimensions in millimeters
Index Area
(D/2 x E/2)
Detail "A"
Detail "B"
Top View Bottom View
Detail "A"
Side View
Option A:
C0.30 (4x) max
Chamfered corner
Option B:
R0.30 (4x) max
Round corner
Detail "B"
0.16
Pin 1 Indicator
(optional)
0.1 REF
4.00
±
0.05 2.60
±
0.05
4.00
±
0.05
3.30
±
0.05
0.8
+
0.05
-0.20
0.05
±
0.05
0.229
±
0.051
7.5°
±
7.5°
0.375
±
0.125
0.3
±
0.10
0.45
±
0.05
0.23
±
0.05
0.075
±
0.075
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means
semiconductor products that are in compliance with current RoHS standards, including
the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more
information, please visit our website at http://www.analogictech.com/pbfree.
Package Power-Up Sequence Marking1Part Number (Tape and Reel)2
TDFN44-16 -, + OCXYY AAT2820IXN-5.0-T1
TDFN44-16 +, - ODXYY AAT2820IXN-5.0-1-T1
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
AAT2820
Triple-Output Charge Pump Regulator
18 2820.2006.04.1.4
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
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