BQ4847Y-MT - Texas Instruments High-Performance Analog

Features

➤Real-Time Clock counts seconds

through years in BCD format

➤Integrated battery and crystal

➤On-chip battery-backup switch-

over circuit with nonvolatile con-

trol for an external SRAM

➤130mAh battery capacity

➤±1 minute per month clock accu-

racy

➤Less than 500nA of clock opera-

tion current in backup mode

➤Microprocessor reset valid to

VCC =V

➤Independent watchdog timer

with a programmable time-out

period

➤Power-fail interrupt warning

➤Programmable clock alarm inter-

rupt active in battery-backup

mode

➤Programmable periodic interrupt

➤Battery-low warning

General Description

The bq4847 Real-Time Clock Mod-

ule is a low-power microprocessor

peripheral that integrates a time-

of-day clock, a 100-year calendar, a

CPU supervisor, a battery, and a crys-

tal in a 28-pin DIP module. The part

is ideal for fax machines, copiers, in-

dustrial control systems, point-of-sale

terminals, data loggers, and comput-

ers.

The bq4847 contains an internal

battery and crystal. Through the use

of the conditional chip enable output

(CEOUT) and battery voltage output

(VOUT) pins, the bq4847 can write-

protect and make nonvolatile an

external SRAM. The backup cell

powers the real-time clock and

maintains SRAM information in

the absence of system voltage.

The bq4847 contains a

temperature-compensated refer-

ence and comparator circuit that

monitors the status of its voltage

supply. When an out-of-tolerance

condition is detected, the bq4847

generates an interrupt warning

and subsequently a microproces-

sor reset. The reset stays active

for 200ms after VCC rises within

tolerance to allow for power supply

and processor stabilization.

The bq4847 also has a built-in

watchdog timer to monitor processor

operation. If the microprocessor does

not toggle the watchdog input (WDI)

within the programmed time-out,

the bq4847 asserts WDO and RST.

WDI unconnected disables the

watchdog timer.

The bq4847 can generate other in-

terrupts based on a clock alarm con-

dition or a periodic setting. The

alarm interrupt can be set to occur

from once per second to once per

month. The alarm can be made ac-

tive in the battery-backup mode to

serve as a system wake-up call. For

interrupts at a rate beyond once per

second, the periodic interrupt can be

programmed with periods of 30.5µs

to 500ms.

bq4847/bq4847Y

PN484701.eps

28-Pin DIP Module

10 20

12 18

14 16

VCC

CEIN

CEOUT

WDI

DQ7

DQ6

DQ5

DQ4

DQ3

VOUT

WDO

INT

RST

DQ0

DQ1

DQ2

VSS

Pin Connections

A0–A3Clock/Control address

inputs

DQ0–DQ7Data inputs/outputs

WE Write enable

OE Output enable

CS Chip select input

CEIN External RAM chip

enable

CEOUT Conditional RAM chip

enable

Pin Names

NC No connect

VOUT Back-up battery output

INT Interrupt output

RST Microprocessor reset

WDI Watchdog input

WDO Watchdog output

VCC +5V supply

VSS Ground

RTC Module With CPU Supervisor

Caution:

Take care to avoid inadvertent dis-

charge through VOUT and CEOUT

after battery isolation has been

broken.

Sept. 1996

Functional Description

Figure 1 is a block diagram of the bq4847. The bq4847 is

functionally equivalent to the bq4845 except that the bat-

tery (20, 24) and crystal (2, 3) pins are not accessible. The

pins are connected internally to a coin cell and quartz

crystal. The coin cell provides 130mAh of capacity. It is in-

ternally isolated from VOUT and CEOUT until the initial

application of VCC. Once VCC rises above VPFD, this isola-

tion is broken, and the backup cell provides power to

VOUT and CEOUT for the external SRAM. The real-time

clock keeps time to within one minute per month at

room temperature. For a complete description of fea-

tures, operating conditions, electrical characteristics,

bus timing, and pin descriptions, see the bq4845 data

sheet. Valid part types for ordering are bq4847MT (5%)

and bq4847YMT (10%).

Figure 2 illustrates the address map for the bq4847. Ta-

ble 1 is a map of the bq4847 registers, and Table 2 de-

scribes the register bits.

Figure 1. Block Diagram

VCC CS OE WE CEOUT VOUT Mode DQ Power

CC (max.) VIH XXCE

IN VOUT1 Deselect High Z Standby

VIL XV

IL CEIN VOUT1 Write DIN Active

CC (min.) VIL VIL VIH CEIN VOUT1 Read DOUT Active

VIL VIH VIH CEIN VOUT1 Read High Z Active

PFD (min.) > VSO XXXV

OH VOUT1 Deselect High Z CMOS standby

≤VSO XXXV

OHB VOUT2 Deselect High Z Battery-backup mode

Truth Table

bq4847/bq4847Y

Sept. 1996

Ordering Information

Sept. 1996

MT: 28-Pin T-Type Module

28-Pin MT (T-Type Module)

Dimension Inches Millimeters

Min. Max. Min. Max.

A 0.360 0.390 9.14 9.91

A1 0.015 - 0.38 -

B 0.015 0.022 0.38 0.56

C 0.008 0.013 0.20 0.33

D 1.520 1.535 38.61 38.99

E 0.710 0.740 18.03 18.80

e 0.590 0.620 14.99 15.75

G 0.090 0.110 2.29 2.79

L 0.110 0.130 2.79 3.30

S 0.100 0.120 2.54 3.05

bq4847 -MT

Package Option:

MT = 28-pin T-type Module

Voltage Tolerance:

Blank = 5%

Y = 10%

Device:

bq4847 Real-Time Clock Module With CPU Supervisor

bq4847/bq4847Y

PACKAGING INFORMATION

Orderable Device Status (1) Package

Type Package

Drawing Pins Package

Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)

BQ4847MT ACTIVE DIP MOD

ULE MT 28 13 Pb-Free

(RoHS) Call TI N / A for Pkg Type

BQ4847YMT ACTIVE DIP MOD

ULE MT 28 13 Pb-Free

(RoHS) Call TI N / A for Pkg Type

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

PACKAGE OPTION ADDENDUM

www.ti.com 14-Oct-2009

Addendum-Page 1

MECHANICAL DATA

MPDI064 – MAY 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443

MT (R-PDIP-T**) PLASTIC DUAL-IN-LINE

28 PINS SHOWN

0.110

0.130

0.022

0.013

0.390

0.630

1.335

0.740

1.535

Max.

D/28 PIN

D/24 PIN

0.710

0.090

0.110

0.590

1.520

1.320

0.015 –

Dimension

A0.015

Min.

Inches

2.79

3.30

16.00

0.56

18.80

33.91

0.33

38.99

18.03

2.29

2.79

14.99

–

0.38

33.53

38.61

Millimeters

Max.

9.91

Min.

0.38

4201978/A 03/01

0.100

S0.120 2.54 3.05

0.360 9.14

0.008 0.20

NOTES: A. All linear dimensions are in inches (mm).

B. This drawing is subject to change without notice.

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