PCA9554/54A/55 Philips Configuration System Management ICs 8- and 16-bit I2C and SMBus I/O Port with Interrupt Part Type Description The PCA9554 and PCA9554A are 16-pin CMOS devices that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C/SMBus applications. These I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, pushbuttons, LEDs, fans, etc. The parts consist of an 8-bit Configuration register (Input or Output selection); 8-bit Input register, 8-bit Output register and an 8-bit Polarity inversion register (Active high or Active low operation). The PCA9555 is a 24-pin CMOS device, which provides 16 bits of GPIO and consists of two 8-bit Configuration, Input, Output and Polarity inversion registers. The PCA9554/54A/55 were developed to enhance the Philips family of I2C I/O expanders. The improvements include higher drive capability, 5V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. Pin Configurations 16 VDD A1 2 15 SDA A2 3 I/O0 4 I/O1 5 I/O2 6 I/O3 7 VSS 8 14 SCL 13 INT 12 I/O7 11 I/O6 10 I/O5 I/O4 9 1 0 FIXED 0 A2 1 24 VDD A1 2 23 SDA A2 3 22 SCL I/O0.0 4 21 A0 I/O0.1 5 I/O0.2 6 I/O0.3 7 I/O0.4 8 I/O0.5 9 I/O0.6 I/O0.7 20 I/O1.7 19 I/O1.6 18 I/O1.5 17 I/O1.4 16 I/O1.3 10 15 I/O1.2 11 14 I/O1.1 VSS 12 13 I/O1.0 I2C Address SLAVE ADDRESS 0 INT PCA9555 1 PCA9554 PCA9554A A0 A1 A0 R/W PROGRAMMABLE 0 Three hardware pins (A0, A1, A2) vary the fixed I2C address and allow up to eight devices to share the same I2C/SMBus. The PCA9554A is identical to the PCA9554 except that the fixed I2C address is different allowing up to sixteen of these devices (eight of each) on the same I2C/SMBus. The fixed I2C address of the PCA9555 is the same as the PCA9554 allowing up to eight of these devices in any combination to share the same I2C/SMBus. PCA9554/54A/55 Features SLAVE ADDRESS 1 1 1 FIXED PCA9554/55 A2 A1 A0 R/W PROGRAMMABLE PCA9554A Order Information Package Container Tube SO T&R Tube SSOP T&R Tube TSSOP T&R PCA9554 PCA9554D PCA9554D-T PCA9554DB PCA9554DB-T PCA9554PW PCA9554PW-T PCA9554A PCA9554AD PCA9554AD-T PCA9554ADB PCA9554ADB-T PCA9554APW PCA9554APW-T The system master can enable the PCA9554/54A/55 I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion Register. All registers can be read by the system master. Although pin to pin and I2C address compatible with the PCF857X series, software changes are required due to the enhancements and are discussed in Application Note AN469. The PCA9554/54A/55 opendrain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. If an external hardware reset is needed, the PCA9556/57 should be used. PCA9555 PCA9555D PCA9555D-T PCA9555DB PCA9555DB-T PCA9555PW PCA9555PW-T * I2C and SMBus compatible * 8 or 16 programmable I/Os compatible with most processors -- Input or output -- Push-Pull or open-drain outputs -- True vs. quasi bi-directional style I/O * Outputs can directly drive LEDs -- 25 mA max sink and 10 mA max source per bit -- Capacity of 100 mA max per 8-bit register * Open-drain interrupt output activated when input changes state * Low IDDH standby current of 1.5 A max * 5 V tolerant I/Os * Offered in SO Wide (D), SSOP (DB) and TSSOP (PW) * Manufactured in high-volume CMOS process PCA9554/54A/55 Operating Characteristics * 2.3 V to 5.5 V operating voltage * -40 to 85 C operating temperature range * 0 to 400 kHz clock frequency PCA9554/ 54A/55 8- and 16-bit I2C and SMBus I/O Port with Interrupt PCA9554/54A/55 Block Diagram The PCA9554/54A and PCA9555 functional diagram and I/O schematic are identical except that the PCA9555 has two 8-bit blocks of I/O. A0 I/O0 A1 I/O1 A2 I/O2 8-BIT SCL SDA I2C/SMBus CONTROL INPUT FILTER I/O3 WRITE pulse READ pulse INPUT/ OUTPUT PORTS I/O4 I/O5 I/O6 I/O7 VDD VCC POWER/ON RESET VSS LP FILTER INT NOTE: ALL I/Os ARE SET TO INPUTS AT RESET Simplified Schematic of I/O0 to I/O7 OUTPUT PORT REGISTER DATA DATA FROM SHIFT REGISTER The PCA9554/54A/55 feature outputs that sink 25 mA and source 10 mA while quasi bidirectional outputs sink 25 mA but limit the source current to only 100 A. CONFIGURATION REGISTER DATA FROM SHIFT REGISTER D Q VDD FF Q1 WRITE CONFIGURATION PULSE CK Q D 100k Q FF I/O0 TO I/O7 CK WRITE PULSE Q Q2 OUTPUT PORT REGISTER VSS INPUT PORT REGISTER D Q INPUT PORT REGISTER DATA CK Q TO INT D Q POLARITY REGISTER DATA FF READ PULSE DATA FROM SHIFT REGISTER NOTE: AT POWER-ON RESET, ALL REGISTERS RETURN TO DEFAULT VALUES FF WRITE POLARITY PULSE CK Q POLARITY INVERSION REGISTER Philips Semiconductors Philips Semiconductors is a worldwide company with over 100 sales offices in more than 50 countries. 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Box 68115 Kowloon East Post Office Hong Kong Japan Philips Semiconductors Philips Building 13-37 Kohnan 2-chome Minato-ku, Tokyo 108-8507 Fax: +852 2756 8271 Tel: +81 3 3740 5130 Fax: +81 3 3740 5057 (c) Koninklijke Philips Electronics N.V. 2001 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent - or other industrial or intellectual property rights. Printed in the USA Date of release: October 2001 Print code: 301673/FP/2pp/1001 Document ordering number: 9397 750 08924