1
Features
Atmel’s System Designer Contains the Following Items:
•CD-ROM Containing all Necessary Software and Online Documents
– Atmel’s AVR Studio®
– Atmel’s Configurator Programming System (CPS)
– Co-verification, Powered by Mentor Graphics
– Exemplar’s LeonardoSpectrum™
– Model Technology™’s ModelSim®
– Several C Compiler Evaluation Copies
– Atmel’s Integrated Development System (IDS) – FPGA Place & Route Tool
•Security Dongle (If Purchased ATDH94DNG)
The materials delivered may vary based on the products ordered.
Description
Atmel’s System Designer lets designers create fast and predictable designs with
AT94K Field Programmable System Level Integrated Circuit (FPSLIC) and AT94S
Secure FPSLIC devices.
Available for use with Windows® 95/98/2000/Me and WindowsNT®-based computers.
System Designer combines industry-standard software for design entry, synthesis and
simulation with Atmel’s proprietary software for component generation, automatic and
interactive placement and routing, timing analysis and bitstream generation.
System
Designer™
Programmable
SLI
AT94K/AT94S
Series
Rev. 2307B–11/01
2System Designer
2307B–11/01
The System Designer desktop is shown in Figure 1. The Design Flow chart on the right
provides push-button access to all the stages in a typical design flow. This includes
code entry, software debugging (Figure 2), simulation (Figure 3), synthesis (Figure 4)
and generating files for simulations automatically. The FPGA Place and Route is
described in Figure 5, Figure 6 and Figure 7 and the AVR®-FPGA Interface is described
in Figure 8.
Figure 1. System Designer Desktop
Log
Window
Design File
Manager
Status
Bar
FPGA Design
Flow
Co-verification
Design Window
AVR Design
Flow
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System Designer
2307B–11/01
Figure 2 shows the AVR Studio software debugger tool, which provides a stand-alone
debugging environment for the software-based design.
Figure 2. AVR Studio Debugger
S
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C
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Win
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I/O Periphera
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Win
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Scratch Re
g
ister
Win
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Memor
y
Win
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Pro
cess
or
Win
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4System Designer
2307B–11/01
Model Technology’s ModelSim is shown in Figure 3. ModelSim is the hardware simula-
tor included with System Designer and is used for stand-alone and co-verification
debugging of the HDL portion of the design.
Figure 3. Model Technology’s ModelSim
Transcript
Window
Wave Form
Viewer
Source Code
Window
5
System Designer
2307B–11/01
LeonardoSpectrum is the synthesis tool included with System Designer and is shown in
Figure 4. The synthesis tool is responsible for taking the HDL design and mapping it to
the FPSLIC device.
System Designer also supports synthesis tools from vendors other than Mentor Graph-
ics, such as Synplicity’s Synplify® and Synopsys’ FPGA Express™. Synplicity is fully
integrated with System Designer; FPGA Express is not; therefore, the set-up of the
design files and the project is not done automatically.
Figure 4. LeonardoSpectrum
Project Options
Manager
Transcript
Window
6System Designer
2307B–11/01
The FPSLIC/FPGA Integrated Development System (IDS) desktop is shown in Figure 5.
The Design Flow Bar provides push-button access to all the steps in the design flow.
This includes opening schematic entry and synthesis tools, and generating files for sim-
ulations automatically. The main responsibility of IDS in System Designer is for Placing
and Routing the FPGA Logic.
Figure 5. Integrated Development System (IDS) Desktop
Transcript
Window
Status
Bar
Interactive
Layout Editor
Design
Flow Bar
Parts/Pinouts
Editor
Hierarchy
Browser
7
System Designer
2307B–11/01
Figure 6 and Figure 7 show components included with IDS. Figure 6 shows the HDL
Planner tool, which is used for VHDL and Verilog design entry.
Figure 6. HDL Planner Tool
Macro Generator
Categories
Macro
Components
VHDL/Verilog
Editor
8System Designer
2307B–11/01
Figure 7 shows the Macro Generator used to generate standard components with opti-
mal layout and performance.
Figure 7. Macro Generator Window
Component
Options
Macro Generator
Categories
Batch
Capability
Macro Generator
Components
Batch Size
Indicator
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System Designer
2307B–11/01
The AVR ⇔ FPGA Interface dialog is shown in Figure 8. This is where the internal con-
nections between the AVR Core and the FPGA Core are specified.
Figure 8. AVR ⇔ FPGA Interface
FPGA Design
Signals Automatically
Extracted from HDL Code
Interface
Signals for Connecting
AVR to HDL Code
10 System Designer
2307B–11/01
System
Requirements
PC-based Systems For a single-user system, System Designer requires a personal computer with a 80,486
or greater microprocessor equipped as follows:
•3.5" 1.44-Mbyte capacity high-density disk drive (recommended)
•CD-ROM drive
•250-Mbyte minimum hard drive (System Designer, ModelSim, LeonardoSpectrum,
and IDS)
•28 MB extended memory minimum
•Serial interface port
•Parallel interface port
•Windows 95/98/2000/Me, or WindowsNT 4.0
•VGA graphics card and display monitor
•Windows compatible mouse
•A permanent swap space of 64 Mbytes – Refer to the Windows documentation for
details on its setup
•Sufficient disk space for file archival and management
•Network Interface card or security dongle
Security Dongle The software security dongle is used to generate a unique HOSTID for systems without
a network interface card. The security dongle is connected to the PC through the
parallel port interface. It is possible to configure a floating network license through the
security dongle. The security dongle allows users to use the software dongle on different
machines by removing and placing the dongle on other machines.
Ordering Information Table 1. Ordering Codes
Code Description
ATDS94KSW1 1 Year License
ATDS94KSW2 Perpetual License
ATDM94KSW2 Maintenance for Perpetual License
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System Designer
2307B–11/01
Design Hardware Table 2. Hardware Ordering Codes
Code Description
ATDH40M AT94K Series FPSLIC Prototyping Kit (One Daughter Board
Included – Specify)
ATDH40D84 Daughter Board Attachment – 84PLCC
ATDH40D100 Daughter Board Attachment – 100VQFP
ATDH40D144 Daughter Board Attachment – 144PQFP
ATDH40D208 Daughter Board Attachment – 208PQFP
ATDH2200E AT17 Series Configurator Programming Kit (Enhanced)
ATDH2221 20-pin SOIC Adapter for ATDH2200
ATDH2222 20-pin PLCC Adapter for ATDH2200
ATDH2223 8-pin SOIC Adapter for ATDH2200
ATDH2224 44-pin TQFP Adapter for ATDH2200
ATDH2225 In-System Programming (ISP) Cable
ATDH2226 32-pin TQFP Adapter for ATDH2200
ATDH2227 44-pin PLCC Adapter for ATDH2200
ATDH2228 8-pin LAP Adapter for ATDH2200
ATDH94AADP256 256-pin CABGA Adapter for ATDH2200
ATSTK94 AT94K FPSLIC Starter Kit with System Designer
ATDH94DNG System Designer Software Security Dongle
© Atmel Corporation 2001.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty
which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors
which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does
not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted
by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical
components in life support devices or systems.
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FAQ
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Printed on recycled paper.
2307B–11/01/xM
Atmel®, AVR® and AVR Studio® are the registered trademarks of Atmel; FPSLIC™ and System Designer™
are the trademarks of Atmel.
Windows® and WindowsNT® are the registered trademarks of Microsoft Corporation; ModelSim® is the regis-
tered trademark of Mentor Graphics Corporation; LeonardoSpectrum™ and Model Technology™ are the
trademarks of Mentor Graphics Corporation; Synplify® is the registered trademark of Synplicity; FPGA Express™
is the trademark of Synopsys. Other terms and product names may be the trademarks of others.