Ultra Series™ Crystal Oscillator
Si546 Data Sheet
Ultra Low Jitter Dual Any-Frequency XO (80 fs), 0.2 to
1500 MHz
The Si546 Ultra Series™ oscillator utilizes Silicon Laboratories’ advanced 4th
generation DSPLL® technology to provide an ultra-low jitter, low phase noise clock
at two selectable frequencies. The device is factory-programmed to provide any
two selectable frequencies from 0.2 to 1500 MHz with <1 ppb resolution and
maintains exceptionally low jitter for both integer and fractional frequencies across
its operating range. The Si546 offers excellent reliability and frequency stability as
well as guaranteed aging performance. On-chip power supply filtering provides
industry-leading power supply noise rejection, simplifying the task of generating
low jitter clocks in noisy systems that use switched-mode power supplies. Offered
in a small, industry-standard 3.2×5 mm footprint, the Si546 has a dramatically
simplified supply chain that enables Silicon Labs to ship custom frequency
samples 1-2 weeks after receipt of order. Unlike a traditional XO, where a different
crystal is required for each output frequency, the Si546 uses one simple crystal
and a DSPLL IC-based approach to provide the desired output frequencies. This
process also guarantees 100% electrical testing of every device. The Si546 is
factory-configurable for a wide variety of user specifications, including frequency,
output format, and OE pin location/polarity. Specific configurations are factory-
programmed at time of shipment, eliminating the long lead times associated with
custom oscillators.
KEY FEATURES
• Available with any two selectable frequencies
from 200 kHz to 1500 MHz
•Ultra low jitter: 80 fs Typ RMS
(12 kHz – 20 MHz)
•Excellent PSRR and supply noise immunity:
–80 dBc Typ
• 3x tighter stability than SAW oscillators
• 3.3 V, 2.5 V and 1.8 V VDD supply operation
from the same part number
• LVPECL, LVDS, CML, HCSL, CMOS, and
Dual CMOS output options
• 3.2×5 mm package footprint
• Samples available with 1-2 week lead times
APPLICATIONS
• 100G/200G/400G OTN, coherent optics
• 10G/25G/40G/100G Ethernet
•3G-SDI/12G-SDI/24G-SDI broadcast video
• Servers, switches, storage, NICs, search
acceleration
• Test and measurement
• Clock and data recovery
• FPGA/ASIC clocking
Pin Assignments
1
2
3
6
5
4
GND
FS/OE
VDD
CLK+
CLK-
OE/FS
(Top View)
Pin # Descriptions
1, 2 Selectable via ordering option
OE = Output enable; FS = Frequency Select
3 GND = Ground
4 CLK+ = Clock output
5 CLK- = Complementary clock output. Not used for CMOS.
6 VDD = Power supply
Phase Error
Cancellation
Fixed
Frequency
Crystal
Frequency
Flexible
DSPLL Low
Noise
Driver
Digital
Loop
Filter
DCO
Digital
Phase
Detector
Fractional
Divider
Phase Error
OSC
Power Supply Regulation
NVM
Built-in Power Supply
Noise Rejection
Control
OE, Frequency Select
(Pin Control)
Flexible
Formats,
1.8V – 3.3V
Operation
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