For further information contact your local STMicroelectronics sales office.
November 2013 DocID025388 Rev 1 1/7
STEVAL-CCM006V1
STM32-based NAND Flash driver
evaluation board (without TFT)
Data brief
Features
•Designed for 512 byte and 2 kilobyte page size
NAND Flash interfacing using the FSMC
interface of the STM32
•Supports both FAT (ELM_FS) file system and
USB mass storage device mode
•Supports garbage collection, wear leveling,
bad block management & ECC check
•RoHS compliant
Description
The STEVAL-CCM006V1 is a product evaluation
board for a NAND Flash driver based on the
STM32F103ZET6 microcontroller.
It supports 512 byte and 2 kilobyte page SLC
NAND Flash, and dynamic detection of NAND
Flash based on “Devi ce ID”.
The firmware automatically detects which NAND
Flash is mounted on the PCB, and functions
accordingly.
www.st.com
Schematic di agra m STEVAL-CCM 006 V1
2/7 DocID025388 Rev 1
1 Schematic diagram
Figure 1. Microc o ntr oller sec tion circ uit schema ti c
Figure 2. NAND Flash circuit schematic
VCAP
PH0_OSC_IN
PH1_OSC_OUT
3V3
NRST
3V3
VCAP
VCAP
GND
3V3
GND
3V3
GND
3V3
3V3
GND
GND
GND
3V3
PE3
PB8
PE2
PB9
GND
3V3
PB5_OTG_HS_ULPI_D7
GND
3V3
3V3
PA3_OTG_HS_ULPI_D0
PH0_OSC_IN
PB0_OTG_HS_ULPI_D1
PH1_OSC_OUT
GND
PA10_OTG_FS_ID_USB
PE2
PB1_OTG_HS_ULPI_D2
PC0_OTG_HS_ULPI_STP
PA13_JTAG_JTMS
PA11_OTG_FS_DM_USB
PG8_USB_PU
GND
3V3
PB8
3V3
PA15_JTAG_JTDI
PB9
PA12_OTG_FS_DP_USB
PA14_JTAG_JTCK
3V3
PB13_OTG_HS_ULPI_D6
3V3
PD0_FSMC_D2
PE3
PD1_FSMC_D3
PB12_OTG_HS_ULPI_D5
PF0_FSMC_ADDR_A0
PB7_I2C1_SDA
PD14_FSMC_D0
PD15_FSMC_D1
PB6_I2C1_SCL
PE7_FSMC_D4
PE10_FSMC_D7
PE9_FSMC_D6
PE8_FSMC_D5
PD5_FSMC_NWE
PD11_FSMC_ADDR_A16
PE11_FSMC_D8
PD12_FSMC_ADDR_A17
PE14_FSMC_D11
PE13_FSMC_D10
PE12_FSMC_D9
PD8_FSMC_D13
PE15_FSMC_D12
PD10_FSMC_D15
PD9_FSMC_D14
PD4_FSMC_NOE
NRST
PB10_OTG_HS_ULPI_D3
GND
GND
PC3_OTG_HS_ULPI_NXT
GND
3V3
GND
GND
PC2_OTG_HS_ULPI_DIR
PB3_JTAG_JTDO
3V3
PB4_JTAG_JNTRST
3V3
PA9_OTG_FS_VBUS_USB
PB11_OTG_HS_ULPI_D4
GND
PA5_OTG_HS_ULPI_CK
3V3
GND
PG10_FSMC_NE3
GND
PG7_FSMC_INT3
PG14_TSCREEN_INT
PG6_FSMC_INT2
PD6_FSMC_NWAIT
PD7_FSMC_NCE2
PG9_FSMC_NCE3
GND
For STM32F10xx
Mount --- R1,R8,R11
DNM --- R3,R9
For STM32F2xxx & STM32F4xxx
Mount --- R3,R9
DNM --- R1,R8,R11
For STM32F10xx
Y1----- 8MHz
For STM32F2xxx & STM32F4xxx
Y1------ 25MHz
STM32F103ZET6/
STM32F205ZET6/
STM32F405ZGT6
11YY
zzHHM
M
5522
66CC
FFnn000011
KK11
6611CC
FFnn000011
33CC
FFpp0022
99CC
FFnn000011
0011RR
KK0011
11DD
11DDEELL__TTSSEETT
44CC
FFuu22..22
11JJ
1
2
3
33 KKLLBB
RRTT NNNNOOCC
11PPTT
1
TTNNIIOOPP TTSSEETT
1111CC
FFnn000011
KK11
3311RR
22CC
FFpp0022
99RR
mmhhOO 00
7711CC
FFnn000011
66RR
KK11
22DD
22DDEELL__TTSSEETT
77CC
FFnn000011
11RR
mmhhOO 00 22RR
KK0011
11WWSS
NNOOTTTTUUBB HHSSUUPP
88RR
mmhhOO 00
5511CC
FFnn000011
55CC
FFuu22..22
3311CC
FFnn000011
11UU
PB14 7
7
5
4
PB12
PB13 73
VDD_1
72 VCAP_1
71 PB11
70 PB10
69 PE15
68 PE14
67 PE13
66 PE12
65 PE11
64 PE10
63 VDD_7
62 VSS_7
61 PE9
60 PE8
59 PE7
58 PG1
9PC14-OSC32_IN
4
5
6
7
8
P
P
P
V
P
B
E
E
E
C
4
5
6
A
1
T
3-TAMPER-RTC
PF0
10 PC15-OSC32_OUT
PF1
11
PF2
12
PF3
13
16 PF5
1
1
5
4PF4
3
1
2P
P
E
E
2
3
17 VSS_5
2
2
8
9PC2
18 VDD_5
19 PF6
OSC_OUT
NRST
25
PC0
2
2
2
2
2
0
1
2
3
4
P
P
P
P
O
F
F
F
F
S
7
8
9
1
C
0
_IN
26
PC1
27
3
3
0
1
P
VD
C3
D_12
36 P
P
A
A
1
2
3
3
3
3
2
3
4
5
V
V
V
P
S
R
D
A0
S
E
D
_
A
F
A
W
+
KUP
VDD_4
3
3
3
7
8
9
P
V
A
S
3
S_4
PA4
40
PA5
41
PA6
42
PA7
43
57 PG0
56 PF15
55 PF14
54 PF13
53 VDD_6
52 VSS_6
50 PF11
49 PB2-BOOT1
51 PF12
48 PB1
47 PB0
46 PC5
4
4
5
4PC4
PB15 76
PD8 77
PD9 78
79
PD10
PD11 80
81
PD12
PD13 82
83
VSS_8
84
VDD_8
PD14 85
PD15 86
PG2 87
PG3 88
PG4 89
PG5 90
PG6 91
PG7 92
PG8 93
94
VSS_9
95
VDD_9
PC6 96
PC7 97
PC8 98
PC9 99
PA8 100
PA9 101
PA10 102
PA11 103
PA12 104
PA13 105
VCAP_2 106
VSS_2 107
VDD_2 108
PA14 109
PA15 110
PC10 111
PC11 112
PC12 113
PD0 114
PD1 115
PD2 116
PD3 117
PD4 118
PD5 119
VSS_10
VD
P
P
P
P
P
D
P
P
P
G
G
G
G
G
_
G
D
D
1
1
1
1
1
1
0
6
7
9
0
1
2
3
4
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
1
0
5
6
7
8
4
2
3
VSS_11 129
P
P
B
B
8
9
1
1
3
3
8
9
V
B
D
O
P
D
P
P
P
P
P
O
G
_
B
B
B
B
B
T
1
1
1
3
4
5
6
7
5
0
1
1
1
1
1
1
1
1
3
3
3
3
3
3
3
3
1
0
2
3
4
5
6
7
VD
P
P
D
E
E
_3
0
1
1
1
1
4
4
4
0
1
2
VDD_SA 1
1
4
4
3
4
88CC
FFnn000011
33RR
mmhhOO 00
55RR
KK11
44RR
KK0011
2211CC
FFnn000011
4411CC
FFnn000
011
22JJ
1
2
3
33 KKLLBBRRTT NNNNOOCC
11CC
FFnn000011
1111RR
mmhhOO 00
77RR
009933
0011CC
FFnn000011
GSPG15102013DI1510
3V3 3V3_NAND1
3V3 3V3_NAND2
PD14_FSMC_D0
PD15_FSMC_D1
PD0_FSMC_D2
PD1_FSMC_D3
PE7_FSMC_D4
PE8_FSMC_D5
PE9_FSMC_D6
PE10_FSMC_D7
PD11_FSMC_ADDR_A16
PD12_FSMC_ADDR_A17
PD5_FSMC_NWE
PD4_FSMC_NOE
3V3_NAND1
GND
GND
3V3_NAND13V3_NAND1
3V3_NAND1
GND
GND
3V3_NAND1
PD6_FSMC_NWAIT
PG6_FSMC_INT2
3V3_NAND1
PE10_FSMC_D7
PD5_FSMC_NWE
3V3_NAND2 3V3_NAND2
GND
GND
PD4_FSMC_NOE
GND
3V3_NAND2
GND
PD14_FSMC_D0
PD15_FSMC_D1
3V3_NAND2
3V3_NAND2
PD0_FSMC_D2
PD11_FSMC_ADDR_A16
PD1_FSMC_D3
PD12_FSMC_ADDR_A17
3V3_NAND2
PD6_FSMC_NWAIT
PE7_FSMC_D4
PE8_FSMC_D5
PE9_FSMC_D6
PG7_FSMC_INT3
PD7_FSMC_NCE2 PG9_FSMC_NCE3
Mount One at a time Mount One at a time
DNM: R25, R27
5533RR
KK0011
1144RR
KK0011
mmhhOO 005522RR
1122CC
FFnn000011
mmhhOO 007722RR
1122RR
KK0011
mmhhOO 006622RR
4422CC
FFnn000011
5522CC
FFnn000011
5555RR
mmhhOO 00
6655RR
mmhhOO 00
9911CC
FFnn000011
33UU
1NC
2NC
BB221155DDNNAANN
3NC
NC
4
NC
5
NC
6
RB
7
R
8
E
9
NC
10
NC
11
VDD
12
VSS
13
NC
14
NC
15
CL
16
AL
17
W
18
WP
19
NC
20
NC
21
NC
22
NC
23
NC
24 NC 25
NC 26
NC 27
NC 28
I/O 0
I/O 1 29
I/O 2 30
I/O 5 41
V
I
I
V
/
/
D
N
N
N
N
N
N
S
O
O
D
C
C
C
C
C
C
S
3
4
3
3
3
3
3
3
3
3
4
3
1
2
7
3
4
5
8
9
0
6
I/O 6 42
I/
N
N
N
N
O
C
C
C
C
74
4
4
4
4
4
3
4
5
6
7
8
2222RR
KK0011
22UU
1NC
NC
2
BB221155DDNNAANN
NC
3
4NC
5NC
NC
6
RB
7
R
8
E
9
NC
10
NC
11
VDD
12
VSS
13
NC
14
NC
15
CL
16
AL
17
W
18
WP
19
NC
20
NC
21
NC
22
NC
23
NC
24 NC 25
NC 26
NC 27
NC 28
I/O 0
I/O 1 29
I/O 2 30
I/O 5 41
V
I
I
V
/
/
D
N
N
N
N
N
N
S
O
O
D
C
C
C
C
C
C
S
3
4
3
3
3
3
3
3
3
3
4
3
1
2
7
3
4
5
8
9
0
6
I/O 6 42
I/
N
N
N
N
O
C
C
C
C
74
4
4
4
4
4
3
4
5
6
7
8
2244RR
KK0011
8811CC
FFnn0000110022RR
KK0011
9911RR
KK0011
0022CC
FFnn000011
3333RR
KK0011
8822RR
mmhhOO 2222
mmhhOO 000033RR
9922RR
mmhhOO 2222
GSPG15102013DI1515
DocID025388 Rev 1 3/7
STEVAL-CCM 006 V1 Schemat ic di agram
7
Figure 3. USB full speed circuit schematic
Figure 4. JTAG connector circuit schematic
USB5V_FS
PA11_OTG_FS_DM_USB
PA12_OTG_FS_DP_USB
PA12_OTG_FS_DP_USB
PA9_OTG_FS_VBUS_USB
PA10_OTG_FS_ID_USB
PG8_USB_PU
kk11
0044RR
2233RR
2222
44UU
VB
I/
U
O
S
24
66PP22--
66
CCLLBBSSUU
I/O1 5
6
1
2I/O1
3I/
G
O
N
2
D
44
11
RR
kk55..11
00
6633RR
44JJ
1
2USB_VCC
3
4
U
U
S
S
B
B
D
DP
M
EEPP
YY
TT BB//AAIINNIIMM
__
BBSS
UU
USB_GND
SHELL 6
7
SHELL 8
5ID SHELL
SHELL 9
3322CC
FFnn77..
44
44
33RR
22
22
2222CC
FFuu0011
1133RR
MM11
33DD
NNEEEERR
G
G
__DD
EELL
GSPG15102013DI1520
3V3
PB3_JTAG_JTDO
PA13_JTAG_JTMS
PB3_JTAG_JTDO
PA14_JTAG_JTCK
PB4_JTAG_JNTRST
NRST
PA15_JTAG_JTDI
DBGRQ
RTCK
DBGACK
PA13_JTAG_JTMS
PA15_JTAG_JTDI
3V3
PB4_JTAG_JNTRST
NRST
PA14_JTAG_JTCK
PB3_JTAG_JTDO
PA14_JTAG_JTCK
PB4_JTAG_JNTRST
NRST
PA13_JTAG_JTMS
NRST
PA15_JTAG_JTDI
6611RR
kk0011
55JJ
NN
NN
OOCC__GGAA
TT
JJ
10
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
20
99
33
RR
kk0011
77
33RR
kk00
11
00
3322RR
7711
RR
kk00
11
5511RR
kk
001
1
4422RR
kk0011
8811RR
kk0011
8833RR
kk0011
GSPG15102013DI1525
Schematic di agra m STEVAL-CCM 006 V1
4/7 DocID025388 Rev 1
Figure 5. USB high speed circuit schematic
Figure 6. Touch screen controller circuit schematic
3V3_HS
XTAL1
XTAL2
USB5V_HS
XTAL1
PB12_OTG_HS_ULPI_D5
PA3_OTG_HS_ULPI_D0
XTAL2
PB0_OTG_HS_ULPI_D1
PC2_OTG_HS_ULPI_DIR
PC0_OTG_HS_ULPI_STP
PB1_OTG_HS_ULPI_D2
PA5_OTG_HS_ULPI_CK
PC3_OTG_HS_ULPI_NXT
PB13_OTG_HS_ULPI_D6
PB5_OTG_HS_ULPI_D7
PB10_OTG_HS_ULPI_D3
3V3
PB11_OTG_HS_ULPI_D4
3V3_HS
6644CC
FFuu
77..44
33
44
CC
FFuu11..00
0033
CC
FFuu11..00
9922CC
FFuu11..00
KK114444RR
77JJ
1
2USB_VCC
3
4
U
U
S
S
B
B
D
DP
M
USB_GND
SHELL 6
SHELL 7
5ID
5544
CC
FFpp3333
1144CC
FFpp3333
0022
88
7744RR
2244
CC
FF
uu11..
00
KK22116644RR
66DD
NNEE
EE
RR
GG
__DDEELL
00
2255
RR
00
55
RR
MM
11
66UU
0000
3333
BBSS
UU
EXTVBUS 32
REG_EN 1
3
6
1
VDD3.3 30
2
2
9
6VDDA1.8 X
X
O
I28
VDD3.3 27
VDD1.8
VDD3.3 25
GND 2
GND 3
RBIAS 4
D
ID
P5
VDD3.3 6
DM 7
STP
13
14 CLKOUT
15 VDD1.8
GNDPAD 3
1
3
1
9
1RESET
DATA7
17 DATA6
18 DATA5
19 DATA4
20 DATA3
21 DATA2
22 DATA1
2
2
3
4DATA0
DIR
12 NXT
CPEN 10
VBUS 8
++
6633CC
F
F
uu77
..
44
4444CC
FFuu77..44
77
22
C
C
FFuu11..00
22YY
zz
HH
MM4422
33
44
RR
KK0011
8822
CC
FFuu11..00
11LL
BBEEAADD
GSPG15102013DI1530
SDAT
PB6_I2C1_SCL
3V3
3V3
PB7_I2C1_SDA
AGND
AGND
AGND
3V3
TSC_YD
SDAT
TSC_YU
TSC_XR
TSC_YD
TSC_XL
AGND
AGND
AGND
TSC_XR
SCLK
TSC_YU
TSC_XL
PG14_TSCREEN_INT
AGND
3V3
AGND
SCLK
GNDAGND
11
33
CC
FFpp22
88
44RR
KK77
..44
2233
CC
FFpp22
2222
1155RR
7733
CC
FFuu11
22
LL
BBEEAADD
33
33CC
FFpp22
00
7755
RR
4455RR
kk
00
11
77UU
1Y-
2INT
111188EEPPMMTTSS
3A0
4SCLK
SDAT 5
VCC 6
DATA_IN 7
IN0 8
IN1 9
GND 10
IN2 11
IN3 12
13 X+
14 VIO
15 Y+
16 X-
44
33
CC
FFpp22
3355RR
2222
7744CC
FFnn
0000
11
9944RR
KK
77
..44
0044CC
FFuu0011
9933CC
FFnn000011
8833
CC
FFnn000011
GSPG15102013DI1535
DocID025388 Rev 1 5/7
STEVAL-CCM 006 V1 Schemat ic di agram
7
Figure 7. Power section circuit schematic
Figure 8. TFT connector circuit schematic
Figure 9. NAND signals circuit schematic
USB5V_FS 3V3
GND
5V0
GND 3V3
USB5V_HS
44DD
UU0033LL11SSPPTTSS 55UU
4VIN
VO
N
U
C
T5
RRTT3333DD77111111DDLL
1GND
2VOUT
3VOUT
VO
N
U
C
T
8
6
7
77DD
NNEEEERRGG__DDEELL
55DD
UU0033LL11SSPPTTSS
5544RR
kk11
8844CC
FF
uu0011
6622CC
FFuu0011
5533CC
FFnn
000011
GSPG15102013DI1540
PD4_FSMC_NOE
GND
PE7_FSMC_D4
PD9_FSMC_D14
PE14_FSMC_D11
TSC_XR
PF0_FSMC_ADDR_A0
PE11_FSMC_D8
PE8_FSMC_D5
GND
PD10_FSMC_D15
PE12_FSMC_D9
TSC_YU
PD0_FSMC_D2
TSC_YD
3V3
PE15_FSMC_D12
PD5_FSMC_NWE
PE9_FSMC_D6
3V3
PD1_FSMC_D3
GND
5V0
PD8_FSMC_D13
PD14_FSMC_D0NRST
PG10_FSMC_NE3
PE13_FSMC_D10
PE10_FSMC_D7
TSC_XL
5V0
PD15_FSMC_D1
66JJ
1
3
5
7
9
11
13
22
xx
0022
RR
OO
TT
CCEENNNNOO
CC
15
17
19
21
23
25
27
29
31
33
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
35 36
37 38
39 40
GSPG15102013DI1545
PD15_FSMC_D1
PD0_FSMC_D2
PD1_FSMC_D3
PD5_FSMC_NWE
PD12_FSMC_ADDR_A17
PD11_FSMC_ADDR_A16
PD4_FSMC_NOE
PE10_FSMC_D7
PE7_FSMC_D4
PE8_FSMC_D5
PE9_FSMC_D6
PD14_FSMC_D0
PD7_FSMC_NCE2
PD6_FSMC_NWAIT
PG6_FSMC_INT2
PG9_FSMC_NCE3
GND
PG7_FSMC_INT3
3V3
GND
33JJ
0022NNOOCC
10
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
20
GSPG15102013DI1550
Revision history STEVAL-CCM006V1
6/7 DocID025388 Rev 1
2 Revision history
Table 1. Document revision history
Date Revision Changes
11-Nov-2013 1 Initial release.
DocID025388 Rev 1 7/7
STEVAL-CCM006V1
7
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