UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com HIGH-SPEED VOLTAGE MODE PULSE WIDTH MODULATOR Check for Samples: UCC25705-Q1, UCC25706-Q1 FEATURES 1 * * * * * * * * * * Qualified for Automotive Applications Greater Than 4-MHz Operation Integrated Oscillator / Voltage Feed Forward Compensation >4:1 Input Voltage Range 25-ns Current Limit Delay Programmable Maximum Duty Cycle Clamp Optocoupler Interface 50-A Start-Up Current 4.2-mA Operating Current at 1 MHz Latch-Up Exceeds 100mA per JESD78 Class I * Smallest Footprint of the 8-pin MSOP Package Minimizes Board Area and Height D PACKAGE (TOP VIEW) ILIM FB VFF DISCH 1 8 2 7 3 6 4 5 VDD OUT GND RC DESCRIPTION The UCC25705-Q1 and UCC25706-Q1 devices are 8-pin voltage mode primary side controllers with fast over-current protection. These devices are used as core high-speed building blocks in high performance isolated and non-isolated power converters. UCC25705-Q1/UCC25706-Q1 devices feature a high speed oscillator with integrated feed-forward compensation for improved converter performance. A typical current sense to output delay time of 25 ns provides fast response to overload conditions. The IC also provides an accurate programmable maximum duty cycle clamp for increased protection which can also be disabled for the oscillator to run at maximum possible duty cycle. Two UVLO options are offered. The UCC25705-Q1 with lower turn-on voltage is intended for dc-to-dc converters while the higher turn-on voltage and the wider UVLO range of the UCC25706-Q1 is better suited for offline applications. The UCC2570x-Q1 family is offered in an 8-pin SOIC (D) package. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2011, Texas Instruments Incorporated UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com Figure 1. TYPICAL APPLICATION SCHEMATIC + VOUT -- + VIN -- 4 VDD 8 FB 2 DISCH TPS2829 5 RC 3 VFF 6 GND OUT 7 FET DRIVER ILIM SOFT START CIRCUIT 1 UCC2570x-Q1 MODE =1 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature (unless otherwise noted) (1) (2) VALUE UNIT Supply voltage 15 V Input voltage (VFF,RC,ILIM) 7 V Input voltage (FB) 15 V Input current (DISCH) 1 mA Output current (OUT) dc 20 mA Storage temperature, Tstg -65 to 150 C Junction temperature, TJ -55 to 150 C 300 C Lead temperature (soldering, 10 sec) (1) (2) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. Consult ti.com/packaging for more information. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) TA Operating ambient temperature VALUE UNIT -40 to 105 C ORDERING INFORMATION TABLE TA 2 PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING --40C to 125C SOIC-8 - D Reel of 2500 UCC25706QDRQ1 25706Q --40C to 125C SOIC-8 - D Reel of 2500 UCC25705QDRQ1 Preview Copyright (c) 2011, Texas Instruments Incorporated UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com ESD RATINGS TABLE PARAMETER ESD VALUE UNIT Human Body Model (HBM) 1000 V Charged- Device Model (CDM) 1000 V Machine Model ( MM) 200 V Copyright (c) 2011, Texas Instruments Incorporated 3 UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com ELECTRICAL CHARACTERISTICS VDD = 11 V, VIN = 30 V, RT = 47 k, RDISCH = 400 k, RFF = 14 k, CT = 220 pF, CVDD = 0.1 F, and no load on the outputs, TA = --40 to 125C, (unless otherwise specified) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Start threshold 8.0 8.8 9.6 V Stop threshold 7.4 8.2 9.0 V Hysteresis 0.3 0.6 1.0 V Start threshold 11.2 12.0 12.8 V Stop threshold 7.2 8.0 8.8 V Hysteresis 3.2 4.0 4.5 V UVLO section (UCCx5705) UVLO section (UCCx5706) Supply Current Section Start-up current VDD = UVLO start - 1 V, VDD comparator off 30 90 A IDD active VDD comparator on, oscillator running at 1 MHz 4.2 5.0 mA 1.00 1.15 V 100 nA 1.1 MHz Line Sense Section Low line comparator threshold 0.95 Input bias current (VFF) -100 Oscillator Section Frequency CT peak voltage CT valley voltage VFF = 1.2 V to 4.8 V 0.9 1.0 VFF = 1.2 V, See (1) 1.2 V VFF = 4.8 V, See (1) 4.8 V 0 V See (1) Current Limit Section Input bias current Current limit threshold Propagation delay, ILIM to OUT 0.2 -0.2 -1 A 180 200 220 mV 25 35 ns 30 50 90 k 0 % 70 75 80 % 50 mV overdrive Pulse Width Modulator Section FB input impedance VFB = 3 V Minimum duty cycle VFB < 2 V Maximum duty cycle PWM gain VFB = VDD, FOSC = 1 MHz VDISCH = 0 V, FOSC = 1 MHz 93 VFF = 2.5 V, MODE = 1 12 Propagation delay, PWM to OUT % %/V 65 130 ns V Output Section VOH IOUT = -5 mA, VOL IOUT = 5 mA Rise time Fall time (1) 4 VDD - output 0.3 0.6 0.15 0.4 V CLOAD = 50 pF 10 25 ns CLOAD = 50 pF 10 25 ns Specified by design. Copyright (c) 2011, Texas Instruments Incorporated UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com PIN DESCRIPTIONS DISCH: A resistor to VIN sets the oscillator discharge current programming a maximum duty cycle. When grounded, an internal comparator switches the oscillator to a quick discharge mode. A small 100-pF capacitor between DISCH and GND may reduce oscillator jitter without impacting feed-forward performance. IDISCH must be between 25 A and 250 A over the entire VIN range. FB: Input to the PWM comparator. This pin is intended to interface with an optocoupler. Input impedance is 50-k typical. GND: Ground return pin. ILIM: Provides a pulse-by-pulse current limit by terminating the PWM pulse when the input is above 200 mV. This provides a high speed (25 ns typical) path to reset the PWM latch, allowing for a pulse-by-pulse current limit. OUT: The output is intended to drive an external FET driver or other high impedance circuits, but is not intended to directly drive a power MOSFET. This improves the controller's noise immunity. The output resistance of the PWM controller, typically 60 pull-up and 30 pull-down, will result in excessive rise and fall times if a power MOSFET is directly driven at the speeds for which the UCC2570x-Q1 is optimized. RC: The oscillator can be configured to provide a maximum duty cycle clamp. In this mode the on-time is set by RT and CT, while the off-time is set by RDISCH and CT.Since the voltage ramp on CTis proportional to VIN, feed-forward action is obtained. Since the peak oscillator voltage is also proportional to VIN, constant frequency operation is maintained over the full power supply input range. When theDISCH pin is grounded, the duty cycle clamp is disabled. The RC pin then provides a low impedance path to ground CT during the off time. VDD: Power supply pin. This pin should be bypassed with a 0.1-F capacitor for proper operation. The undervoltage lockout function of the UCC2570x-Q1 allows for a low current startupmode and ensures that all circuits become active in a known state. The UVLO thresholds on the UCC25705-Q1 are appropriate for a dc-to-dc converter application. The wider UVLO hysteresis of the UCC25706-Q1 (typically 4 V) is optimized for a bootstrap startup mode from a high impedance source. VFF: The feed-forward pin provides the controllerwith a voltage proportional to the power supply input voltage. When the oscillator is providing a duty cycle clamp, a current of 2 x IDISCH is sourced from the VFF pin. A single resistor RFF between VFF and GND then set VFF to: ae o 2 RFF VFF VIN c / e 2 RFF + RDISCH o When the DISCH pin is grounded and the duty cycle clamp is not used, the internal current source is disabled and a resistor divider from VIN is used to set VFF. In either case, when the voltage on VFF is less than 1.0 V, both the output and oscillator are disabled. Copyright (c) 2011, Texas Instruments Incorporated 5 UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 50 mV DISCH 4 www.ti.com -+ MODE 1.0 V VDD I LOW LINE 2 * I (MODE = 1) 0 (MODE = 0) CLK 3 RC 5 Q RD RD RD Q -+ VFF S PWM LATCH 7 OUT 8 VDD 6 GND 1 ILIM -- 30 *I(MODE=1) 80 (MODE =0) Q + S + RD Q UVLO UCC25705-Q1 (8.8V/8V) UCC25706-Q1 (12V/8V) -- 100 mV + 0.7 V FB 2 PWM -+ 30 k 20 k 200 mV CURRENT LIMIT + 1 pF -- Figure 2. Block Diagram FUNCTIONAL DESCRIPTION Oscillator and PWM The oscillator can be programmed to provide a duty cycle clamp or be configured to run at the maximum possible duty cycle. The PWM latch is set during the oscillator discharge and is reset by the PWM comparator when the CT waveform is greater than the feedback voltage. The voltage at the FB pin is attenuated before it is applied to the PWM comparator. The oscillator ramp is shifted by approximately 0.65-V at room temperature at the PWM comparator. The offset has a temperature coefficient of approximately --2 mV/C. The ILIM comparator adds a pulse by pulse current limit by resetting the PWM latch when VILIM > 200 mV. The PWM latch is also reset by a low line condition (VFF <1.0 V). All reset conditions are dominant; asserting any output will force a zero duty cycle output. Oscillator With Duty Cycle Clamp (MODE = 1) The timing capacitor CT is charged from ground to VFF through RT. The discharge path is through an on-chip current sink that has a value of 30 x IDISCH, where IDISCH is the current through the external resistor RDISCH. Since the charge and discharge currents are both proportional to VIN, their ratio, and the maximum duty cycle remains constant as VIN varies. 6 Copyright (c) 2011, Texas Instruments Incorporated UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com V IN RT R DISCH RC 5 DI SCH 4 VDD CT I DISCH 30 *I DISCH 2 * I DISCH VFF 3 R FF Figure 3. Duty Cycle Clamp (MODE = 1) The on-time is approximately: TON = a RT CT where a = VFF 2 RFF VIN RDISCH The off-time is: TOFF = a CT (RTxRDISCH ) 30 RT -RDISCH The frequency is: 1 f= a RT CT 1 + 1 RDISCH 30 RT -RDISCH The maximum duty cycle is: TON R ae o = c 1- DISCH / Duty Cycle = TON + TOFF e 30 RT o Copyright (c) 2011, Texas Instruments Incorporated 7 UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com Component Selection for Oscillator With Duty Cycle Clamp (MODE = 1) For a power converter with the following specifications: * VIN(min) = 18 V * VIN(max) = 75 V * VIN(shutdown) = 15 V * FOSC = 1 MHz * MAX = 0.78 at VIN(min) In this mode, the on-time is approximately: * TON(max) = 780 ns * TOFF(min) = 220 ns 18 VFF(min) = =1.20 V 15 * 1. Pick CT = 220 pF. 2. Calculate RT. RT = VIN(min) TON(max) VFF(min) CT RT = 51.1 k 3. RDISCH RDISCH = 30 RT ae ae VFF(min) o o / RT CT / cc V / 1+ c e IN(min) o TOFF(min) c / c / e o RDISCH = 383 k. IDISCH must be between 25 A and 250 A over the entire VIN range. With the calculated values, IDISCH ranges from 44 A to 193 A, within the allowable range. If IDISCH is too high, CT must be decreased. 4. RFF V R RFF = FF(min) DISCH 2 (VIN(min) - 1) The nearest 1% standard value to the calculated value is 13.7 k. 8 Copyright (c) 2011, Texas Instruments Incorporated UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com Oscillator Without Duty Cyle Clamp (MODE = 0) In this mode, the timing capacitor is discharged through a low impedance directly to ground. The DISCH pin is externally grounded. A comparator connected to DISCH senses the ground connection and disables both the discharge current source and VFF current source. A resistor divider is now required to set VFF. V IN RT RC 5 DISCH 4 CT VFF 3 Figure 4. Ocsillator Without Clamp (MODE = 0) TON = a RT CT where a = In this mode, the on-time is approximately: VFF VIN The off-time is: TOFF 75 ns The frequency is: f= 1 a RT CT + 75ns Copyright (c) 2011, Texas Instruments Incorporated 9 UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com Component Selection for Oscillator Without Duty Cycle Clamp (MODE = 0) For a power converter with the following specifications: * VIN(min) = 18 V * VIN(max) = 75 V * VIN(shutdown) = 15 V * FOSC = 1 MHz With these specifications, 18 = 1.2V 15 1. Pick CT = 220 pF 2. Calculate RT. VFF(min) = VIN(min) ae 1 o c - 75ns / V F o RT = FF(min) e OSC CT 10 Copyright (c) 2011, Texas Instruments Incorporated UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com TYPICAL CHARACTERISTICS UCC25705-Q1 UVLO THRESHOLDS vs TEMPERATURE UCC25706-Q1 UVLO THRESHOLDS vs TEMPERATURE 13 8.9 8.8 12 UVLO -- Thresholds -- V UVLO -- Thresholds -- V 8.7 8.6 8.5 8.4 8.3 11 10 9 8.2 8 8.1 7 8.0 - 50 - 25 0 25 50 75 100 125 0 25 50 75 Temperature - C Figure 5. Figure 6. OPERATING CURRENT (AT 1MHz) vs TEMPERATURE LOW-LINE THRESHOLD vs TEMPERATURE 1.05 4.7 1.04 4.6 1.03 Low-Line Threshold -- V 4.8 4.4 4.3 4.2 3.9 0.96 3.8 0.65 50 Temperature - C Figure 7. Copyright (c) 2011, Texas Instruments Incorporated 75 100 125 125 0.99 0.97 25 100 1.00 4.0 0 125 1.01 0.98 -25 100 1.02 4.1 - 50 -25 Temperature - C 4.5 IDD -- mA -50 -50 -25 0 25 50 75 Temperature - C Figure 8. 11 UCC25705-Q1, UCC25706-Q1 SLUSAI1 - MAY 2011 www.ti.com TYPICAL CHARACTERISTICS PROGRAMMABLE MAXIMUM DUTY CYCLE vs TEMPERATURE OSCILLATOR FREQUENCY vs TEMPERATURE 82 Programmable Maximum Duty Cycle -- % Oscillator Frequency -- MHz 1.10 1.05 1.00 0.95 0.90 80 78 76 74 72 70 68 -50 -25 0 25 50 75 100 - 50 125 -25 Temperature - C 0 25 50 75 100 125 100 125 Temperature C Figure 9. Figure 10. CURRENT-LIMIT THRESHOLD vs TEMPERATURE CURRENT-LIMIT PROP DELAY vs TEMPERATURE 35 220 33 215 Current-Limit PropDelay -- ns Current-Limit Threshold -- mV 31 210 205 200 195 190 27 25 23 21 19 185 17 180 15 -50 -25 0 25 50 Temperature - C Figure 11. 12 29 75 100 125 - 50 -25 0 25 50 75 Temperature - C Figure 12. Copyright (c) 2011, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 7-Apr-2011 PACKAGING INFORMATION Orderable Device UCC25706QDRQ1 Status (1) Package Type Package Drawing ACTIVE SOIC D Pins Package Qty 8 2500 Eco Plan (2) Green (RoHS & no Sb/Br) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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OTHER QUALIFIED VERSIONS OF UCC25706-Q1 : * Catalog: UCC25706 NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device UCC25706QDRQ1 Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UCC25706QDRQ1 SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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