Rev 1
November 2005 1/13
13
VN540-E / VN540SP-E
VN540-12-E
SINGLE HIGH SIDE SMART
POWER SOLID STATE RELAY
General Features
OUTPUT CURRENT (CONTINUOUS) : 2.8A
DIGITAL INPUT CLAMPED AT 32V
PROTECTION AGA IN ST:
LOSS OF GROUND
SHORTED LOAD AN D OVER-
TEMPERATURE
BUILT-IN CURRENT LIMITER
UNDERVOLTAGE SHUT-DOWN
OPEN DR AIN DIAGNOSTIC OUT PUT
FAST DEMAGNETIZATION OF INDUCTIVE
LOADS
Description
The VN540-E, VN540SP-E, VN540-12-E are
monolithic devices designed in
STMicroelectronics VIPower technology, intended
for driving resistive or inductive loads with one
side connected to ground. Active current limitat ion
avoids the system power supply dropping in case
of shorted load. Built-in thermal shut-down
protects the chip from ov ertemperature. The open
drain diagnostic output indicates over-
temperature conditions.
Type Vdemag RDSon Iout VCC
VN540-E
VN540SP-E
VN540-12-E VCC-55V 50m2.8A 36V PENTAWATT(012Y)PENTAWATT
PowerSO-10TM
www.st.com
Block Diagram
VN 540-E / VN 540SP- E / VN 54 0-12- E
2/13
Table 1. Absolute Maximum Rating
Figur e 1. Connectio n Diagram (Top View )
Figure 2. Current and Voltage Conventions
Symbol Parameter Value Unit
VCC Power supply voltage 45 V
-VCC Reverse supply voltage -4.0 V
IOUT Maximum DC load current Internally limited A
IRReverse output current -10 A
IIN Input cur rent ± 1 0 mA
ISTAT Status pin current ± 10 mA
VESD Electrostatic discharge (R = 1.5KW; C = 100pF) 2000 V
PTOT Power dissipation at Tc = 25° C Internally limited w
TJJuncti on operating temper ature Inter nally lim it ed °C
TSTG St orage Temperature -55 to 150 °C
EAS Single pulse avalanche energy 500
VN 540-E / VN 540S P-E / VN 540-12-E
3/13
Table 2. Th ermal data
El ectrical C h ra cteri sti cs (10V < VCC < 36V; -2 C < TJ < 85°C; un les s ot herw is e spec if ied)
Table 3. Power Section
Table 4. Switch ing
Symbol Parameter Value Unit
PowerSO-10 Pentawatt
RthJC Thermal resistance j unction-c ase Max 1.5 2.0 °C/W
RthJA Thermal resistance j unction-ambient Max 50 60 °C/W
Symbol Parameter Test Condit ions Min. Typ. Max. Unit
VCC Supply vol tage 10 36 V
RON On state resistance IOUT = 2.8A; TJ = 25°C
IOUT = 2.8A; 50
90 m
m
ISSupply curre nt OFF state
ON state; TJ = 125°C
IOUT = 0A
1
3mA
mA
ILS Output leakage curr ent Channel OFF
VCC = 45V 100 µΑ
ILGND Output current at turn-off VCC = VIN = VGND = VSTAT = 24V
TJ= - 25°C < T J < 100°C 2mA
VOL Low state output vol tage VIN = VIL; RLOAD >= 10M1.5 V
Vdemag Output vol tage at turn-off IOUT = 2.8A; LLOAD >= 1mH VCC-65 VCC-55 VCC-45 V
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(ON) Turn-on delay on output
current IOUT = 2.8A, Resistive Load Input rise
time < 0.1µs, VCC = 24V; TJ = 25°C 40 µs
trRise time of output
current IOUT = 2.8A, Resistive Load Input rise
time < 0.1µs, VCC = 24V; TJ = 25°C 60 µs
td(OFF) Tu rn -o ff delay time of
output current IOUT = 2.8A, Resist ive Load In put rise
time < 0.1µs, VCC = 24V; TJ = 25°C 60 µs
tfFall time of Output
current IOUT = 2.8A, Resistive Load Input rise
time < 0.1µs, VCC = 24V; TJ = 25°C 25 µs
dI/dt(on) Turn-on current average
slope IOUT = 2.8 A,
IOUT = ILIM; 25°C < TJ < 140°C 0.5
2Α/µs
dI/dt(off) Turn-off current av erage
slope IOUT = 2.8 A,
IOUT = ILIM; 25°C < TJ < 140°C 2
4Α/µs
VN 540-E / VN 540SP- E / VN 54 0-12- E
4/13
Table 5. Logi cal Input
Note: 1 The input voltage is internally clamped at 32V minimum, it is possible to connect the input pins
to an highe r voltage via an exte rnal resistor calculate to not exeed 10mA
Table 6. Protection and Diagnostic
(* )Status determination > 1 00ms aft er the sw itching edge.
Figure 3. Switching Characteristics
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VIL Input low level voltage 2.0 V
VIH Input high lev el vol tage 3.5 V
VI(HYST) Input hysteresi s voltage 0.5 V
IIN Input current VIN = 30V
VIN = 2.0V 25 300 µΑ
µΑ
VICL I/O I nput clamp vol tage
Note 1 IIN = 1mA
IIN = -1mA 32 36
-0.7 V
V
Symbol P aram e ter Te st Co nd it ion s Min. Ty p. Max. Un it
VSTAT Status out put voltage ISTAT = 5m A ( Faul t condition ) 1V
VSCL(*) Status clamp voltage ISTAT = 1 mA
ISTAT = -1mA 32 36
-0.7 V
V
ISTAT Leakage on diagnostic
pin in high state VSTAT = 5V 10 µΑ
VUSD Under voltage shut down 5.0 8.0 V
ILIM DC Short cir cuit curre nt VCC = 24V; RLOAD < 1 0m2.8 5.0 8.0 A
IOVPK Peak short cir cuit curre nt VCC = 24V; VIN = 30; RLOAD < 10m4A
tSC Delay time of current
limiter 100 µs
TTSD Thermal shut down
temperature 150 170 °C
TRThermal reset
temperature 135 155 °C
VN 540-E / VN 540S P-E / VN 540-12-E
5/13
Table 7. Truth Table
Figure 4. Peak Short Test Circuit
INPUT OUTPUT STATUS
Normal operation L
HL
HH
H
Overtemperature L
HL
LH
L
Undervoltage L
HL
LH
H
Shorted load
( Cu rr en t lim ita tion ) L
HL
HH
H
VN 540-E / VN 540SP- E / VN 54 0-12- E
6/13
Figure 5. Switching Waveforms
Fi gure 6. I LGND Tes t Co nf ig uratio n
IN
VN 540-E / VN 540S P-E / VN 540-12-E
7/13
Package Mechanical Data
In order to meet environmen tal requirements, ST offers these devic es in ECOPACK®
packages. These packages have a Lead-free second level interconn ect. The catego ry of
second Level Interconnect is marked on the package and on the inner box label, in compliance
w ith JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also
marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are
available at: www.st.com.
VN 540-E / VN 540SP- E / VN 54 0-12- E
8/13
VN 540-E / VN 540S P-E / VN 540-12-E
9/13
VN 540-E / VN 540SP- E / VN 54 0-12- E
10/13
VN 540-E / VN 540S P-E / VN 540-12-E
11/13
Table 8. Ord er Cod es
Package Tube Tape and Reel
PowerSO-10TM VN540SP-E VN540SPTR-E
PENTAW ATT vertical VN540-E
PENTAW ATT straight VN540-12-E
VN 540-E / VN 540SP- E / VN 54 0-12- E
12/13
Table 9. Revision History
Date Revision Changes
2-Nov-2005 1 Init ial release
VN 540-E / VN 540S P-E / VN 540-12-E
13/13
I
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