Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B Product information presented is current as of publication date. Details are subject to change without notice. TRIPLE-CHANNEL TFT LCD POWER SOLUTION WITH OPERATIONAL AMPLIFIERS FEATURES GENERAL DESCRIPTION Built in 3A, 0.2 Switching NMOS The AAT1168/AAT1168A/AAT1168B is a triple-channel Positive LDO Driver Up to 28V/5mA TFT LCD power solution that provides a step-up PWM Negative LDO Driver Down to -14V/5mA controller, two LDO drivers (one for positive high voltage 1 VCOM and 4 VGAMMA Operational Amplifiers 28V High Voltage Switch for VGH and one for negative voltage), five operational amplifiers, and one high voltage switch up to 28V for TFT LCD display. Internal Soft-Start Function The PWM controller consists of an on-chip voltage 1.2MHz Fixed Switching Frequency reference, oscillator, error amplifier, current sense circuit, 3 Channels Fault and Thermal Protection comparator, Low Dissipation Current under-voltage lockout protection and internal soft-start circuit. The thermal and power fault QFN-32 Package Available protection prevents internal circuit being damaged by excessive power. PIN CONFIGURATION The LDO drivers generate two regulated output voltage set by external resistor dividers. VGH voltage does not activate until DLY voltage exceeds 1.25V. The AAT1168/AAT1168A/AAT1168B contains 4+1 operational amplifiers. VO1, VO2, VO4, and VO5 are for VOUT3 1 VREF 2 GND 3 GND1 4 VO1 5 AAT1168/ AAT1168A/ AAT1168B 24 EO gamma corrections and VO3 is for VCOM . In the short 23 IN1 circuit condition, operational amplifiers are capable of 22 VDD sourcing 100mA current for VGAMMA , and 200mA current for VCOM . 21 SW 20 VO5 With the minimal external components, the AAT1168/A/B offers a simple and economical solution VI1- 6 VI1+ 7 18 VO2 8 17 VO4 19 VI5- - - for TFT LCD power. VI5+ - Advanced Analog Technology, Inc. - Version 1.00 Page 1 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B ORDERING INFORMATION DEVICE TYPE PART NUMBER PACKAGE PACKING TEMP. RANGE MARKING AAT1168 AAT1168 -Q5-T Q5:VQFN325*5 T: Tape and Reel 40 C to + 85 C AAT1168 XXXXX XXXX AAT1168A AAT1168A -Q5-T Q5:VQFN325*5 T: Tape and Reel 40 C to + 85 C AAT1168A XXXXX XXXX AAT1168B AAT1168B -Q5-T Q5:VQFN325*5 T: Tape and Reel 40 C to + 85 C AAT1168B XXXXX XXXX NOTE: The product is lead free and halogen free. TYPICAL APPLICATION - - - Advanced Analog Technology, Inc. - Version 1.00 Page 2 of 22 MARKING DESCRIPTION Device Type Lot no.(6~9digits) Date Code (4digits) Device Type Lot no.(6~9digits) Date Code (4Digits) Device Type Lot no.(6~9digits) Date Code (4Digits) Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL VALUE UNIT VDD to GND VDD 7 V VDD1, SW to GND (for AAT1168/AAT1168B) VH1 14.5 V VDD1, SW to GND (for AAT1168A) VH1 25 V VOUT3, OUT3, VGH to GND (for AAT1168/AAT1168B) VH2 28 V VOUT3, OUT3, VGH to GND (for AAT1168A) VH2 40 V OUT2 to GND VH3 -14 V Input Voltage 1 (IN1, IN2, IN3, DLY, CTL) VI1 VDD +0.3 V Input Voltage 2 (VI1+, VI1 - , VI2+, VI2 - , VI3+, VI3 - , VI4+, VI4 - , VI5+, VI5 - ) VI2 VH1 +0.3 V Output Voltage 1 (EO, VREF ) VO1 VDD +0.3 V Output Voltage 2 (ADJ, VO1, VO2, VO3, VO4, VO5) VO2 VH1 +0.3 V Operating Free-Air Temperature Range TC -40 C to +85 C C TSTORAGE -45 C to +125 C C Maximum Junction Temperature TJ +125 C Package Thermal Resistance JA 34 C /W Package Thermal Resistance JC 1.1 C /W Power Dissipation Pd 1,618 Storage Temperature Range mW NOTE: Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the devices. Exposure to ABSOLUTE MAXIMUM RATINGS conditions for extended periods may affect device reliability. - - - Advanced Analog Technology, Inc. - Version 1.00 Page 3 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B ELECTRICAL CHARACTERISTICS ( VDD = 2.6V to 5.5V, TC = -40 C to 85 C , unless otherwise specified. Typical values are tested at 25 C ambient temperature, VDD = 5V, VDD1 = 10V.) PARAMETER SYMBOL VDD Input Voltage Range VDD VDD1 Input Voltage Range VDD1 VDD Under Voltage Lockout VUVLO VDD Operating Current IVDD VDD1 Operating Current IVDD1 Thermal Shutdown TSHDN TEST CONDITION MIN TYP MAX UNIT 2.6 5.5 V AAT1168/AAT1168B 8 14 V AAT1168A 8 23 V Falling 2.1 2.2 2.3 V Rising 2.3 2.4 2.5 V VIN1 = 1.5V, Not Switching 0.56 0.80 mA VIN1 = 1.0V, Switching 5.60 10.0 mA 7 10 mA VVI1+ ~ VVI5+ = 4V 160 C Reference Voltage PARAMETER Reference Voltage SYMBOL VREF TEST CONDITION IVREF = 100A MIN TYP MAX UNIT 1.231 1.250 1.269 V Line Regulation VRI IVREF = 100A, VDD = 2.6V~5.5V - 2 5 mV Load Regulation VRO IVREF = 0~100 A - 1 5 mV MIN TYP MAX UNIT Oscillator PARAMETER SYMBOL TEST CONDITION Oscillation Frequency fOSC 1.05 1.20 1.35 MHz Maximum Duty Cycle DMAX 84 87 90 % - - - Advanced Analog Technology, Inc. - Version 1.00 Page 4 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B ELECTRICAL CHARACTERISTICS ( VDD = 2.6V to 5.5V, TC = -40 C to 85 C , unless otherwise specified. Typical values are tested at 25 C ambient temperature, VDD = 5V, VDD1 = 10V.) Soft Start & Fault Detect PARAMETER SYMBOL TEST CONDITION MIN TYP MAX UNIT Channel 1 Soft Start Time t SS1 14 ms Channel 2 Soft Start Time t SS2 14 ms Channel 3 Soft Start Time t SS3 14 ms Channel 1 to Channel 2 Delay t D12 AAT1168A Only 7 ms Channel 2 to Channel 3 Delay t D23 AAT1168A Only 7 ms AAT1168/AAT1168B 55 ms During Fault Protect Trigger Time t FP AAT1168A 165 ms IN1 Fault Protection Voltage VF1 IN2 Fault Protection Voltage IN3 Fault Protection Voltage AAT1168/AAT1168B 1.00 1.05 1.10 V AAT1168A 1.13 1.17 1.20 V VF2 0.40 0.45 0.50 V VF3 1.00 1.05 1.10 V MIN TYP MAX UNIT 1.221 1.233 1.245 V -40 0 40 nA 0.15 %/V Error Amplifier (Channel 1) PARAMETER SYMBOL TEST CONDITION Feedback Voltage VIN1 Input Bias Current IB1 VIN1 = 1V to 1.5V Feedback-Voltage Line Regulation VRI1 Level to Produce VEO = 1.233V 2.6V < VDD < 5.5V 0.05 Transconductance Gm I = 5 A 105 S Voltage Gain AV 1,500 V/V - - - Advanced Analog Technology, Inc. - Version 1.00 Page 5 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B ELECTRICAL CHARACTERISTICS ( VDD = 2.6V to 5.5V, TC = -40 C to 85 C , unless otherwise specified. Typical values are tested at 25 C ambient temperature, VDD = 5V, VDD1 = 10V.) N-MOS Switch (Channel 1) PARAMETER SYMBOL Current Limit ILIM On-Resistance R ON ISWOFF Leakage Current TEST CONDITION MIN TYP MAX UNIT 3.0 A ISW = 1.0A 0.2 VSW = 12V 0.01 20.00 A MIN TYP MAX UNIT Negative Charge Pump (Channel 2) PARAMETER SYMBOL TEST CONDITIONS IN2 Threshold Voltage VIN2 IOUT2 = -100 A 235 250 265 mV IN2 Input Bias Current IB2 VIN2 = -0.25V to 0.25V -40 0 40 nA OUT2 Leakage Current IOFF2 VIN2 = 0V, OUT2 = -12V -20 -50 A OUT2 Source Current IOUT2 VIN2 = 0.35V, OUT2 = -10V 1 4 mA MIN TYP MAX UNIT Positive Charge Pump (Channel 3) PARAMETER SYMBOL TEST CONDITIONS IN3 Threshold Voltage VIN3 IOUT3 = 100 A 1.22 1.25 1.28 V IN3 Input Bias Current IB3 VIN3 = 1V to1.5V -40 0 40 nA OUT3 Leakage Current IOFF3 VIN3 = 1.4V, OUT3 = 28V 40 80 A OUT3 Sink Current IOUT3 VIN3 = 1.1V, OUT3 = 25V - - - Advanced Analog Technology, Inc. - Version 1.00 Page 6 of 22 1 4 mA Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B ELECTRICAL CHARACTERISTICS ( VDD = 2.6V to 5.5V, TC = -40 C to 85 C , unless otherwise specified. Typical values are tested at 25 C ambient temperature, VDD = 5V, VDD1 = 10V.) High Voltage Switch Controller PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT DLY Source Current IDLY -4 -5 -6 A DLY Threshold Voltage VDLY 1.22 1.25 1.28 V DLY Discharge RON RDLY 8 CTL Input Low Voltage VIL CTL Input High Voltage VIH CTL Input Bias Current IB4 VCTL = 0 to VDD Propagation Delay CTL to VGH t PP OUT3 = 25V 100 0.5 2 -40 V V 0 40 nA ns VOUT3 to VGH Switch R-on R ONSC VDLY = 1.5V, VCTL = VDD 15 30 ADJ to VGH Switch R-on R ONDC VDLY = 1.5V, VCTL = GND 30 60 - - - Advanced Analog Technology, Inc. - Version 1.00 Page 7 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B ELECTRICAL CHARACTERISTICS ( VDD = 2.6V to 5.5V, TC = -40 C to 85 C , unless otherwise specified. Typical values are tested at 25 C ambient temperature, VDD = 5V, VDD1 = 10V.) VCOM and VGAMMA Buffer PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Input Offset Voltage VOS VVI1+ ~ VVI5+ = 4V - 2 12 mV Input Bias Current IB5 VVI1+ ~ VVI5+ = 4V -40 0 40 nA VOL IVO1 , IVO2 , IVO4 , IVO5 = 10mA, VVI1 , VVI2 , VVI4 , VVI5 = 4V - 4.02 4.05 IVO3 = 50mA, VVI3 = 4V - 4.03 4.06 Output Swing (for AAT1168) V VOH Short Circuit Current ISHORT IVO1 , IVO2 , IVO4 , IVO5 = -10mA VVI1 , VVI2 , VVI4 , VVI5 = 4V 3.95 3.98 - IVO3 = -50mA , VVI3 = 4V 3.94 3.97 - IVO1 , IVO2 , IVO4 , IVO5 - 100 - mA IVO3 - 200 - mA - 12 - V/ s - 5 - s VVI1+ , VVI3+ = 2V to 8V, Slew Rate SR Settling Time tS VVI1+ ~ VVI5+ = 3.5V to 4.5V, 90% - - VVI3+ ~ VVI5+ = 8V to 2V, 20% to 80% - Advanced Analog Technology, Inc. - Version 1.00 Page 8 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B PIN DESCRIPTION PIN NO. QFN-32 NAME I/O 1 VOUT3 - Channel 3 Output Voltage (gate high voltage input) 2 VREF O Internal Reference Voltage Output 3 GND - Ground 4 GND1 - SW MOS Ground 5 VO1 O Operational Amplifier 1 Output 6 VI1- I Operational Amplifier 1 Negative Input 7 VI1+ I Operational Amplifier 1 Positive Input 8 VO2 O Operational Amplifier 2 Output 9 VI2- I Operational Amplifier 2 Negative Input 10 VI2+ I Operational Amplifier 2 Positive Input 11 GND2 - Ground for Operational Amplifiers 12 VI3+ I VCOM Operational Amplifier Positive Input 13 VO3 I VCOM Operational Amplifier Output 14 VDD1 - High Voltage Power Supply Input 15 VI4+ I Operational Amplifier 4 Positive Input 16 VI4- I Operational Amplifier 4 Negative Input 17 VO4 O Operational Amplifier 4 Output 18 VI5+ I Operational Amplifier 5 Positive Input 19 VI5- I Operational Amplifier 5 Negative Input 20 VO5 O Operational Amplifier 5 Output 21 SW - Main PWM Switching Pin 22 VDD - Power Supply Input 23 IN1 I Main PWM Feedback Pin 24 EO O Main PWM Error Amplifier Output 25 IN3 I Positive Charge Pump Feedback Pin 26 OUT3 O Positive Charge Pump Output 27 IN2 I Negative Charge Pump Feedback Pin DESCRIPTION - - - Advanced Analog Technology, Inc. - Version 1.00 Page 9 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B PIN NO. QFN-32 NAME I/O 28 OUT2 O Negative Charge Pump Output 29 DLY I High Voltage Switch Delay Control 30 CTL I High Voltage Switch Control Pin 31 ADJ O Gate High Voltage Fall Time Setting Pin 32 VGH O Switching Gate High Voltage for TFT DESCRIPTION FUNCTION BLOCK DIAGRAM AAT1168 2 22 VREF VDD Reference Voltage 23 IN1 Fail / Thermal Control Fail 1.233V 1.25V 0.25V Error Amplifier SW 21 1. 233V Digital Control Block GND1 4 EO 24 Comparator Current Sense and Limit Oscillator 0. 25V 1. 25V OUT3 26 27 IN2 25 IN3 6 VI1-- VO1 5 7 VI1+ 9 VI2-10 GND 3 GND2 11 OUT2 28 VO2 8 VI2+ 12 VI3+ VO3 16 VI415 VI4+ VO4 19 VI518 17 VO5 20 VI5+ 29 DLY 30 13 VDD1 CTL 14 High Voltage Control 2.5k 31 VOUT3 ADJ 32 - - VGH - Advanced Analog Technology, Inc. - Version 1.00 Page 10 of 22 1 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B TYPICAL APPLICATION CIRCUIT Vin 3.3V To 5V R1 10 C1 10F C2 0.1F L 6.8H 22 VDD VADD SW 21 D DFLS220L R10 7 VI1+ VOUT1 13.3V/300mA AAT1168/A/B R11 C3 47F 10 VI2+ R12 R2 97.6k GND1 4 12 VI3+ IN1 23 R13 R3 10k 15 VI4+ R14 18 VI5+ VDD1 14 R15 C4 0.1F SW C5 1F GND2 11 C13 1F VGAMMA 6 VI1R16 10 R17 10 C15 1F R18 10 OUT3 26 Q1 MMBT4403 8 VO2 C7 1F 16 VI4- SW 17 VO4 19 VI5- IN3 25 R19 10 20 VO5 U2 BAT54S R5 200k VOUT3 13 VO3 VOUT3 25V/30mA C8 1F R6 10k R20 10 VCOM U1 BAT54S R4 6.8k 9 VI2- C14 1F C16 1F C6 1F 5 VO1 1 C9 0.1F C17 10F C10 0.1F SW U3 BAT54S CTL 30 CTL R7 6.8k 29 DLY C18 OUT2 28 R21 R8 62k 31 ADJ IN2 27 VGH R9 10k 32 VGH R22 57.6k VREF 2 24 EO C19 1.8nF GND C11 1F C12 0.1F 3 Figure 1. Typical Application Circuit - - - Advanced Analog Technology, Inc. - Version 1.00 Page 11 of 22 Q2 MMBT4401 VOUT2 -6V/30mA Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B TYPICAL OPERATING CHARACTERISTICS ( VIN = 5V, VOUT1 = 12V, VOUT2 = -7V, VOUT3 = 27V, TC = +25 C , unless otherwise noted.) - - - Advanced Analog Technology, Inc. - Version 1.00 Page 12 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B TYPICAL OPERATING CHARACTERISTICS ( VIN = 5V, VOUT1 = 12V, VOUT2 = -7V, VOUT3 = 27V, TC = +25 C , unless otherwise noted.) - - - Advanced Analog Technology, Inc. - Version 1.00 Page 13 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B DESIGN PROCEDURE = Boost Converter Design Setting the Output Voltage and Selecting the Lead Compensation Capacitor The output voltage of boost converter is set by the resistor divider from the output (VOUT1) to GND with the center tap connected to the IN1. Where VIN1 , the boost converter feedback regulation voltage is 1.233V. Choose R2 (Figure 2) between 5.1k to 51k and calculate R1 to satisfy the following equation. ILpeak IIN : Boost converter efficiency : The ratio of the inductor peak to peak ripple current to the input DC current VIN : Input voltage VO : Output voltage IO : Output load current fS : Switching frequency D : Duty cycle ILPEAK : Inductor peak to peak ripple current IIN : Input DC current V R1 = R2 OUT1 - 1 VIN1 VOUT1 VREF EO gm 24 R1 IN1 23 and the inductor's DC current rating should exceed IIN . For the best efficiency, choose an inductor with less DC series resistance ( rL ). VIN1 RC The AAT1168 SW current limit ( ILIM ) and inductor' saturation current rating ( ILSAT ) should exceed IL(peak ) , ILIM and ILSAT > IL ( peak ) R2 CP ILDC > IIN AAT1168/A/B CC IL (peak ) = IIN + IIN = Figure 2. Feedback Circuit VIND , 2Lfs IO , (1 - D) 2 IO PDCR rL (1 - D) Inductor Selection The minimum inductance value is selected to make sure that the system operates in continuous conduction mode (CCM) for high efficiency and to prevent EMI. ILDC : DC current rating of inductor PDCR : Power loss of inductor series resistance The equation of inductor used a parameter , which is Table 1.Inductor Data List rL DC CURRENT RATING the ratio of the inductor peak to peak ripple current to C6-K1.8L the input DC current. The best trade-off between 3.9 H 41 m 2.5A 6.8 H 68 m 2.2A 10 H 81 m 1.8A voltage ripple of transient output current and permanent output current has a between 0.4 and 0.5. L VO D(1 - D)2 , IOfs D = 1- MITSUMI Product-Max Height: 1.9mm Example 1: In the typical application circuit (Figure 1) VIN , VO the output load current is 300mA with 13.3V output - - - Advanced Analog Technology, Inc. - Version 1.00 Page 14 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B voltage and input voltage of 5V. Choose a of 0.465 Input Capacitor Selection and efficiency of 90%. 0.9 * 13.3 L 0.624(0.376 )2 6.8 H 0.465 * 0.3 * 1.16 The input capacitors have two important functions in IO IIN = = 0.89A (1 - D) for the gate-driving circuit. A 10 F ceramic capacitor PWM controller. First, an input capacitor provides the power for soft start procedure and supply the current is used in typical circuit. Second, an input bypass V D IL (peak ) = IIN + IN = 1.095A 2Lf s capacitor reduces the current peaks, the input voltage drop, and noise injection into the IC. A low ESR PDCR = 0.043W or 1% power loss ceramics capacitor 0.1 F is used in typical circuit. To ensure the low noise supply at VDD , VDD is decoupled Schottky Diode Selection from input capacitor using an RC low pass filter. Schottky has to be able to dissipate power. The dissipated power is the forward voltage and input DC current. To achieve the best efficiency, choose a Schottky diode with less recovery capacitor (CT) for fast recovery time and low forward voltage (VF). For boost converter, the reverse voltage rating (VR) should be higher than the maximum output voltage, and current rating should exceed the input DC current. PDIODE = PDSW + PDCOM PDSW = (1 - D)VFQR fs Figure 3. Input Bypass Capacitor Affects the VDD Drop QR = VR CT PDCOM = VFIO /(1 - D) PDIODE : Total power loss of diode for boost converter Output Capacitor PDSW : Switching loss of diode for boost converter The output capacitor maintains the DC output voltage. PDCOM : Conduction loss of diode for boost converter A Low ESR ( rC ) ceramic capacitor can reduce the output ripple and power loss. There are two parameters which can affect the output voltage ripple: Table 2. Schottky Data List 1. the voltage drops when the inductor current flows SMA VF VR CT through the ESR of output capacitor; 2. charging and B220A 0.24V 14V 150pF discharging of the output capacitor also affect the B240A 0.24V 28V 150pF output voltage ripple. VRIPPLE = VRIPPLE (COUT ) + VRIPPLE (ESR ) DIODES Product, Max-Height: 2.3mm VRIPPLE (COUT ) For example, IOD fS COUT VRIPPLE (ESR) IL(peak) rC PDIODE = PDSW + PDCOM = 0.203W or 5.1% power loss. - - - Advanced Analog Technology, Inc. - Version 1.00 Page 15 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B ( PESR = ILpeak 2 ) .rC + + ESR: Equivalent Series Resistance - - Example 2: COUT = 38F, rC = 20m VRIPPLE (COUT ) = 4mV VRIPPLE (ESR) = 22mV VRIPPLE = 26mV PESR = 0.023W or 0.6% power loss - + Boost Converter Power loss The largest portions of power loss in the boost converter are the internal power MOSFET, the inductor, the Schottky diode, and the output capacitor. If the boost converter has 90% efficiency, there is approximately 3.3% power loss in the internal MOSFET, 1% power loss in the inductor, 5.1% power loss in the Schottky diode, and 0.6% power loss in the output capacitor. Figure 5. Block Diagram of Boost Converter with Peak Current Mode (PCM) Power Stage Transfer Functions The duty to output voltage transfer function Tp is: V (s + w esr )(s - w z2 ) Tp (s) = O = Tp0 d s2 + 2w ns + wn2 Where Tp0 = VO Loop Compensation Design And The voltage-loop gain with current loop closed sets the stability of steady state response and dynamic performance of transient -rC 1 , w esr = 1 - D R + r Cr ( )( L C) C response. The w z2 = loop compensation design is as follows: (1 - D)2 RL + r LC (RL + rC ) RL (1 - D)2 - r , wn = L 2 = C[r (RL + rC ) + RLrc (1 - D ) ] + L 2 , 2 LC (RL + rC ) [r + (1 - D ) RL ] r = rL + DrDS + (1 - D)RF rL is the inductor equivalent series resistance, rC is capacitor ESR, RL is the converter load resistance, C is output filter capacitor, rDS is the transistor turn on resistance, and RF is the diode forward resistance. The duty to inductor current transfer function Tpi is: Tpi (s) = Figure 4. Closed-current Loop for Boost with PCM - - il s + w zi = Tpi0 2 d s + 2w n s + w n 2 Where Tpi0 = VO (RL + 2rC ) 1 , w zi = C (RL / 2 + rC ) L (RL + rC ) - Advanced Analog Technology, Inc. - Version 1.00 Page 16 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B V Where = FB VO Current Sampling Transfer Function Error voltage to duty transfer function Fm is: Fm (s) = ) ( 2fs2 s2 + 2w ns + w n2 d = v ei Tpi0RCSs ( s + w zi ) ( s + w sh ) Where w sh = The compensator transfer function TC (s) = M - Ma 3w s 1 - , = 2 1+ M1 + Ma VC s + wc = gmRC v fb s Where wc = w s = 2fs 1 RCCC Therefore, Fm depends on duty to inductor current transfer function Tpi , and fs is the clock switching frequency; RCS is the current-sense amplifier transresistance. For the boost converter, M1 = VIN / L and M2 = ( VO - VIN )/ L . For AAT1168, RCS = 0.24 V/A, Ma is slope compensation, Ma = 0.8x10 6. The closed-current loop transfer function Ticl is: 2 Ticl (s) = ( 2 + 2w n s + w n2 Figure 6. Voltage Loop Compensator Compensator design guide: ) s 12fs x RCS Tpi0 ( s + w ) s2 + w s +12f 2 zi sh s ( 1. Crossover frequency fci < ) 2. Gain margin>10dB The Voltage-Loop Gain with Current Loop Closed The control to output voltage transfer function Td is: VO (s) Td (s) = = Ticl (s)Tp (s) VC (s) The voltage-loop gain with current loop closed is: 3. Phase margin>45 the compensator resistance, RC is determined by: RC = VO 2fciCRCS (RL + 2rC ) VFB gmk r (1 - D ) RL - 1 - D ) ( 2 s + w c 12fs Tp0 x s R CS Tpi0 (s + w z1 )(s - w z2 ) (s + w zi )(s 2 + sw sh + 12fs 2 ) - - 4. The L vi (s) = 1 at crossover frequency, Therefore, L vi (s) = TC (s)Td (s) = gm R C 1 fs 2 - Advanced Analog Technology, Inc. - Version 1.00 Page 17 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B Table 3 K factor Table Best Corner K factor Frequency C Positive and Negative LDO driver Output Voltage Selection 21.533F 23.740 kHz 4.692 The output voltage of positive LDO driver is set by a 25.079F 21.842 kHz 5.083 resistive divider from the output (Vout3) to GND with 32.587F 20.095 kHz 6.042 the center tap connected to the IN3, where VIN3, the 36.312F 15.649 kHz 5.230 38.469F 13.247 kHz 4.703 positive LDO driver feedback regulation voltage, is 1.25V. Choose R6 (Figure 8) between 10k and 51k . And calculate R5 with the following equation. 5. The output filter capacitor is chosen so C RL pole cancels RC CC zero Vout 3 R5 = R6 - 1 V IN 3 The output voltage of negative LDO driver is set by a R RCCC = C L + rC , and 2 C RL CC = + rC RC 2 resistive divider from the output (VGL) to VREF with the center tap connected to the IN2, where VIN2, the negative LDO driver feedback regulation voltage, is = (1 ~ 3) 0.25V. Choose R9 (Figure 9) between 10k and 51k and calculate R8 with the following equation. Example 3: VIN = 5V, VO = 13.3V, IO = 300mA, fs = 1,190kHz, VFB = 1.233V, L = 6.65H, Gm = 85S, rL = 76.689 m rC = 9.13m , RF = 0.7667 , CC = 1.95nF, RC = 7.6k , C = 38.5F, = 3, RCS = 0.23V/A. V - VGL R 8 = R 9 IN2 VREF - VIN2 Bode Diagram 60 Magnitude (dB) 40 20 0 -20 -40 -90 Phase (deg) -135 -180 Figure 8. The Positive LDO Driver -225 -270 2 10 3 10 4 10 5 6 10 10 Frequency (Hz) Figure 7. Bode Plot of Loop Gain Using Matlab Simulation - - (R) - Advanced Analog Technology, Inc. - Version 1.00 Page 18 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B C9 0.1F Table 4 Pass Transistor Specifications C10 0.1F SW MMBT4401 MMBT4403 VBE(max) 0.65V 0.5V hfe(min) 130 90 U3 BAT 54 S R7 6.8k Q2 MMBT4401 OUT2 28 R8 62k DIODES Product, Case: SOT23 IN 2 27 R9 10k VREF 2 C11 1F VOUT2 -6V/30mA Example 5: C12 0.1F Output current of VOUT3 and VOUT2 are 30mA, the minimum base-emitter resistor can be calculated as Figure 9. The Negative LDO Driver R 4 (min) 0.5 /(( 1mA - 30mA ) / 90) 750 Example 4: For system design R 7(min) 0.65 /(( 1mA - 30mA ) / 130) 845 VOUT3 = 25V, R 5 = 200k , R 6 = 10k , VOUT2 = -6V, R 8 = 62k , R 9 = 10k The minimum value can be used, however, the larger value has the advantage of reducing quiescent current. Flying Capacitors So we choose 6.8k to be R4. Increasing the flying capacitor ( C5 , C7 , C9 ) values can lower output voltage ripples. The 1F ceramic Charge Pump Output Capacitor capacitors works well in positive LDO driver. A 0.1F Using low ESR ceramic capacitor to reduce the output voltage ripple is recommended. With ceramic capacitor, ceramic capacitor works well in negative LDO driver. output voltage ripple is dominated by the capacitance value. The minimum capacitance value can be LDO Driver Diode To achieve high efficiency, a Schottky diode should be calculated by the following equation: used. BAT54S (Figure 8 and 9) has fast recovery time Cout and low forward voltage for best efficiency. Iload 2Vripple fs LDO Driver Base-Emitter Resistors For AAT1168, the minimum drive current for positive and negative LDO driver are 1mA, thus the minimum base-emitter resistance can be calculated by the following equation: R 4 (min) VBE(max) /((IOUT3 (min) - IC ) / hfe( R 7(min) VBE(max) /((IOUT 2(min) - IC ) / hfe( min ) min ) ) ) Example 6: The output voltage ripple of VOUT3 and VGL is under 1%, the minimum capacitance value can be calculated as 30mA 0.1F 2 x 250mV x 1.19MHz 30mA Cout( VGL ) 0.33F 2 x 60mV x 1.19MHz Cout(VOUT3 ) : Efficiency, about 60% at charge pump circuit - - - Advanced Analog Technology, Inc. - Version 1.00 Page 19 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B Operational Amplifier The AAT1168 have five amplifiers independent. The operational amplifiers are usually used to drive VCOM and the gamma correction divider string for TFT-LCD. The output resistors and capacitors of amplifiers are as low pass filter and compensator for unity GAIN stable. Table 5. Recommended Components DESCRIPTION DESIGNATION 6.8 H, 1.8A, L MITSUMI C6-K1.8L 6R8 200mA 30V Schottky barrier U1, U2, U3 diode (SOT-23), DIODES BAT54S 2A 20V rectifier diode D DIODES DFLS220L 10 F, 25V X5R ceramic C3 capacitor C5, C6, C7 1 F, 25V X5R ceramic capacitor 0.1 F, 50V X5R ceramic C2, C4, C9, C10, C12 capacitor Soft Start Waveform - - - Advanced Analog Technology, Inc. - Version 1.00 Page 20 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B LAYOUT CONSIDERATION plane on the PCB. This will reduce noise and ground loop errors as well as absorb more of the EMI radiated Layout Guide The system's performances including switching noise, transient response, and PWM feedback loop stability are greatly affected by the PC board layout and grounding. There are some general guidelines for by the inductor. For boards with more than two layers, a ground plane can be used to separate the power plane and the signal plane for improved performance. PC Board Layout layout: Inductor Always try to use a low EMI inductor with a ferrite core. Filter Capacitors Place low ESR ceramics filter capacitors (between 0.1F and 0.22F) close to VDD and VREF pins. This will eliminate as much trace inductance effects as possible and give the internal IC rail a cleaner voltage supply. The ground connection of the VDD and VREF bypass capacitor should be connected to the analog ground pin (GND) with a wide trace. Output Capacitors Place output capacitors as close as possible to the IC. Minimize the length and maximize the width of traces to get the best transient response and reduce the ripple noise. We choose 10F ceramics capacitor to reduce the ripple voltage, and use 0.1F ceramics capacitor to reduce the ripple noise. Feedback If external compensation components are needed for stability, they should also be placed close to the IC. Take care to avoid the feedback voltage-divider resistors' trace near the SW. Minimize feedback track lengths to avoid the digital signal noise of TFT control board. Ground Plane The grounds of the IC, input capacitors, and output capacitors should be connected close to a ground plane. It would be a good design rule to have a ground - - - Advanced Analog Technology, Inc. - Version 1.00 Page 21 of 22 Advanced Analog Technology, Inc. May 2008 AAT1168/1168A/1168B PACKAGE DIMENSION VQFN32 C PIN 1 INDENT b E2 E e A1 D A D2 L SYMBOL A A1 b C D D2 E E2 e L y DIMENSIONS IN MILLIMETERS MIN TYP MAX 0.8 0.9 1.0 0.00 0.02 0.05 0.18 0.25 0.30 -----0.2 -----4.9 5.0 5.1 3.05 3.10 3.15 4.9 5.0 5.1 3.05 3.10 3.15 -----0.5 -----0.35 0.40 0.45 0.000 -----0.075 - - - Advanced Analog Technology, Inc. - Version 1.00 Page 22 of 22