MM74HC165M_NL - FAIRCHILD SEMICONDUCTOR

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September 1983

Revised May 2005

MM74HC240 Inverting Octal 3-STATE Buffer

MM74HC240

Inverting Octal 3-STATE Buffer

General Descript ion

The MM74HC240 3-STATE buffer utilizes advanced sili-

con-gate CMOS technology. It possesses high drive cur-

rent outputs which enable high speed operation even when

driving large bus capacitances. These circuits achieve

speeds comparable to low power Schottky devices, while

retaining the advantage of CMOS circuitry, i.e., high noise

immunity and low power consumption. It has a fanout of 15

LS-TTL equivalent inputs.

The MM7 4HC2 40 is an inve rting b uffer and has tw o a ctive

LOW enables (1G and 2G). Each enable independently

controls 4 buffers.

All inputs are protected from damage due to static dis-

charge by diodes to VCC and ground.

Features

■Typical propagation delay: 12 ns

■3-STATE outputs for connection to system buses

■Wide power supply range: 2–6V

■Low quiescen t supply cur ren t: 80

A (74 Series)

■Output current: 6 mA

Ordering Code:

Devices also available in Tape and R eel. Sp ec if y by appending the suffix lett er “X” to th e ordering co de.

Connection Diagram

Top View

Truth Table

HIGH Level

LOW Le vel

HIGH Impedance

Order Number Package Number Package Description

MM74HC240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

MM74HC240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

MM74HC240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

MM74HC240N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

1G 1A 1Y 2G 2A 2Y

LLHLLH

LHLLHL

HLZHLZ

HHZHHZ

www.fairchildsemi.com 2

MM74HC240

Logic Diagram

3 www.fairchildsemi.com

MM74HC240

Absolute Maxim um Ratings(Note 1)

(Note 2) Recommended Operating

Conditions

Note 1: Absolute Maximum Ratings are those values beyond which dam-

age to the device may occur.

Note 2: unless othe rw is e specifie d all voltages ar e ref erenced to g round.

Note 3: Po wer D iss ipatio n temp er ature derat ing — plastic “N” package:



12 mW/

C from 65

C to 85

DC Electrical Characteristics (Note 4)

Note 4: For a power supply of 5V

10% the worst case output voltages (VOH, and VOL) occur fo r HC at 4.5V. Thus the 4.5V val ues shou ld be us ed w hen

designi ng with this s upply. Wo rs t c as e VIH and VIL occur at V CC

5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage cur-

rent (IIN, ICC, and I OZ) oc c ur for CMO S at th e higher voltag e and so the 6.0 V v alues should be used .

Supply Voltage (VCC)



0.5 to



7.0V

DC Input Voltage (VIN)



1.5 to VCC



1.5V

DC Output Voltage (VOUT)



0.5 to VCC



0.5V

Clamp Diode Current (IIK, IOK)

20 mA

DC Output Current, per pin (IOUT)

35 mA

DC VCC or GND Current, per pin (ICC)

70 mA

Storage Temperature Range (TSTG)



C to



150

Power Dissipation (PD)

(Note 3) 600 mW

S.O. Package only 500 mW

Lead Temperature (TL)

(Soldering 10 seconds) 260

Min Max Units

Supply Voltage (VCC)26V

DC Input or Output Voltage 0 VCC V

(VIN, VOUT)

Operating Temperature Range (TA)





Input Rise or Fall Times

(tr, tf) VCC

2.0V 1000 ns

VCC

4.5V 500 ns

VCC

6.0V 400 ns

Symbol Parameter Conditions VCC TA



40 to 85



55 to 125

CUnits

Typ Guar ant eed Lim i ts

VIH Minimum HIGH Level 2.0V 1.5 1.5 1.5 V

Input Vo ltage 4.5V 3.15 3.15 3.15 V

6.0V 4.2 4.2 4.2 V

VIL Maximum LOW Level 2.0V 0.5 0.5 0.5 V

Input Voltage 4.5V 1.35 1.35 1.35 V

6.0V 1.8 1.8 1.8 V

VOH Minimum HIGH Level VI N

VIH or VIL

Output Voltage |IOUT|

A 2.0V 2.0 1.9 1.9 1.9 V

4.5V 4.5 4.4 4.4 4.4 V

6.0V 6.0 5.9 5.9 5.9 V

VIN

VIH or VIL

|IOUT|

6.0 mA 4.5V 4.2 3.98 3.84 3.7 V

|IOUT|

7.8 mA 6.0V 5.7 5.48 5.34 5.2 V

VOL Maximum LOW Level VIN

VIH or VIL

Output Voltage |IOUT|

A 2.0V 0 0.1 0.1 0.1 V

4.5V 0 0.1 0.1 0.1 V

6.0V 0 0.1 0.1 0.1 V

VIN

VIH or VIL

|IOUT|

6.0 mA 4.5V 0.2 0.26 0.33 0.4 V

|IOUT|

7.8 mA 6.0V 0.2 0.26 0.33 0.4 V

IIN Maximum Input Current VIN

VCC or GND 6.0V

0.1

1.0

IOZ Maximum 3-STATE VIN

VIH or VIL

Output Leakage VOUT

VCC or GND 6.0V

0.5

Current G

VIH, G

VIL

ICC Maximum Quiescent VIN

VCC or GND 6.0V 8.0 80 160

Supply Curre nt IOUT

www.fairchildsemi.com 4

MM74HC240

AC Electrical Characteristics

VCC

5V, TA

C, tr

6 ns

AC Electrical Characteristics

VCC

2.0V to 6.0V, CL

50 pF, tr

6 ns (unless otherwise specified)

Note 5: CPD determines t he no load dy namic powe r c onsumption, PD

CPD VCC2 f



ICC VCC, and the no load dynamic current consumption,

CPD VCC f



ICC.

Symbol Parameter Conditions Typ Guaranteed Lim it Units

tPHL, tPLH Maximum Propagation Delay CL

45 pF 12 18 ns

tPZH, tPZL Maximum Enable Delay RL

1 k

14 28 ns

to Active Output CL

45 pF

tPHZ, tPLZ Maximum Disable Delay RL

1 k

13 25 ns

from Active Output CL

5 pF

Symbol Parameter Conditions VCC TA



40 to 85



55 to 125

CUnits

Typ Guaranteed Limits

tPHL, tPLH Maximum Propagation CL

50 pF 2.0V 55 100 126 149 ns

Delay CL

150 pF 2.0V 80 150 190 224 ns

50 pF 4.5V 12 20 25 30 ns

150 pF 4.5V 22 30 38 45 ns

50 pF 6.0V 11 17 21 25 ns

150 pF 6.0V 28 26 32 38 ns

tPZH, tPZL Maximum Output Enable RL

1 k

TIme CL

50 pF 2.0V 75 150 189 224 ns

150 pF 2.0V 100 200 252 298 ns

50 pF 4.5V 15 30 38 45 ns

150 pF 4.5V 20 40 50 60 ns

50 pF 6.0V 13 26 32 38 ns

150 pF 6.0V 17 34 43 51 ns

tPHZ, tPLZ Maximum Output Disable RL

1 k

2.0V 75 150 189 224 ns

Time CL

50 pF 4.5V 15 30 38 45 ns

6.0V 13 26 32 38 ns

tTLH, tTHL Maximum Output 2.0V 60 75 90 ns

Rise and Fall Time 4.5V 12 15 18 ns

6.0V 10 13 15 ns

CPD Power Dissipation (per buffer)

Capacitance (Note 5) G

VIH 12 pF

VIL 50 pF

CIN Maximum Input Ca pacitance 5 10 10 10 pF

COUT Maximum Output Capacitance 10 20 20 20 pF

5 www.fairchildsemi.com

MM74HC240

Physical Dim ensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Package Number M20B

www.fairchildsemi.com 6

MM74HC240

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Small Outline Package (SOP ), EIAJ TYPE II, 5.3mm W ide

Package Number M20D

7 www.fairchildsemi.com

MM74HC240

Physical Dim ensions inches (millimeters) unless otherwise noted (Continued)

20-Lea d Th in S hri nk Sm all Ou tlin e Pack age (TSSOP), JED EC MO-1 53, 4.4mm Wide

Package Number MTC20

www.fairchildsemi.com 8

MM74HC240 Inverting Octal 3-STATE Buffer

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Package Number N20A

Fairchild does no t assume any responsibility for use of any circui try described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r systems a re devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent in any componen t of a life support

device or system whose failure to perform can be rea-

sonabl y ex pect ed to cause the fa ilu re of the lif e su pp ort

device or system, or to affect it s safety or effectiveness.

www.fairchildsemi.com

www.onsemi.com

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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