MB88R157PNF-G-JNE1 - Fujitsu Limited

FUJITSU MICROELECTRONICS

DATA SHEET

2009.8

ASSP

Spread Spectrum Clock Generator

MB88R157

■DESCRIPTION

MB88R157 is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary

radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with

the internal modulator.

This product has a built-in non-volatile memory, so its frequency setting can memorize each system or application.

Also the product has a built-in oscillation stabilization circuit, so it is not necessary to use the external oscillation

stabilization capacitance.

■FEATURES

• Input frequency : 10 MHz to 40 MHz

• Output frequency : 1 MHz to 134 MHz

Programmable of the parameter of N divider, M divider, K divider

(N divider : 11-bit, M divider : 12-bit, K divider : 7-bit)

• Modulation rate : no modulation, ±0.25%, ±0.5%, ±0.75%, ±1.0%, ±1.25%, ±1.5%, ±1.75%

• Equipped with a crystal oscillation circuit

• Built-in oscillation stabilization capacitance : 5 pF to 10 pF (0.039 pF step range)

• Clock output Duty : 45% to 55%

• Clock Cycle-Cycle Jitter : Less than 100 ps (Output frequency is over 2 MHz)

• Low power consumption by CMOS process 5.5 mA (24 MHz, Typ-sample, no load)

(Input frequency : 24 MHz, N divider parameter : 1000, M divider para meter : 1000, K divider parameter : 1)

• Power supply voltage : 3.3 V ± 0.3 V

• Operating temperature −20 °C to + 85 °C

• Package : 8-pin plastic SOP

DS04-29132-3E

MB88R157

2DS04-29132-3E

■PIN ASSIGNMENT

■PIN DESCRIPTION

Pin name Pin no. I/O Description

XOUT 1 O Resonator connection pin

OE 2 I/O Clock output enable pin

L : output disable, H : output enable

Serial input/output pin (only program mode)

PEX 3 I Programmable enable setting pin

L : program mode, H : normal operation

VSS 4 ⎯GND pin

OUT 5 O Modulation clock output pin

VDD 6 ⎯Power supply voltage pin

NC 7 ⎯Non-connection pin (do not connect anything)

XIN 8 I Resonator connection pin/clock input pin

XOUT

PEX

VSS

XIN

VDD

OUT

TOP VIEW

(FPT-8P-M02)

MB88R157

DS04-29132-3E 3

■I/O CIRCUIT TYPE

Note : About XIN and XOUT pins, please refer to the chapter of “■ CRYSTAL OSCILLATION CIRCUIT”.

name Circuit type Remarks

PEX • CMOS hysteresis input

• With pull-up resistor (50 kΩ)

OE With pull-up resistor (50 kΩ)

• CMOS hysteresis input (Input)

In serial output mode

• CMOS output

•I

OL = 3 mA

OUT • CMOS output

•I

OL = 3 mA/7 mA selectable

(Selectable b y Output driver setting bit)

• Hi-Z or “L” output at OE = “L”

(Selectable by OUT pin setting bit)

50 kΩ

MB88R157

4DS04-29132-3E

■HANDLING DEVICES

• Preventing Latch-up

A latch-up can occur if, on this device, (a) a voltage higher than power supply voltage or a voltage lower than

GND is applied to an input or output pin or (b) a v oltage higher than the rating is applied between po w er supply

and GND. The latch-up, if it occurs, significantly increases the power supply current and may cause ther mal

destruction of an element. When you use this device, be very careful not to exceed the maximum rating.

• Handling unused pins

Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or pull-

down resistor.

• To use external clock input

To use an external clock signal, input the clock signal to the XIN pin with the XOUT pin connected to nothing.

• Power supply pins

Please design connecting the pow er supply pin of this device b y as lo w impedance as possible from the current

supply source.

We recommend connecting electrolytic capacitor (about 10 μF) and the ceramic capacitor (about 0.01 μF) in

parallel between power supply and GND near the device, as a bypass capacitor.

• Oscillation circuit

Noise near the XIN pin and XOUT pin may cause the device to malfunction. Design printed circuit boards so

that electric wiring of XIN pin or XOUT pin and the resonator do not intersect other wiring.

Design the printed circuit board that surrounds the XIN pin and XOUT pin with ground in order to stabilize

operation.

MB88R157

DS04-29132-3E 5

■BLOCK DIAGRAM

Charge

Pump

Frequency

phase

compare

Loop

Filter VCO

VDD

XIN

XOUT

PEX

VSS

OUT

N div.

M div

div.

PLL block

Non-volatile memory

Serial-I/F Modulation logic

OSC

Output control

Serial data

A glitch-less IDAC (current output D/A converter) provides precise modulation, thereby dramatically reducing

EMI.

MB88R157

6DS04-29132-3E

■MEMORY MAP

Address Function Remarks

bit0-bit11 M divider setting (12-bit) Selectable in the range of 1 to 4096

bit12-bit22 N divider setting (11-bit) Selectable in the range of 1 to 2048

bit23-bit29 K divider setting (7-bit) Selectable in the range of 1 to 128

bit30-bit32 L divider setting (3-bit) Modulation frequency setting

(the value is due to the input frequency)

bit33-bit36 Charge Pump setting (4-bit) Charge pump current setting due to VCO oscillation frequency

bit37-bit41 VCO Gain setting (5-bit) VCO gain setting due to VCO oscillation frequency

bit42-bit44 Modulation rate setting (3-bit) No modulation, ±0.25%, ±0.50%, ±0.75%, ±1.00%, ±1.25%,

±1.50%, ±1.75% are selectable

bit45 OUT pin setting (1bit) Selectable OUT pin situation at OE pin = L

0 : L output 1 : Hi-Z output

bit46 Output drive setting (1bit) OUT pin driving ability setting

0 : Ability small 1 : Ability large

bit47 Source clock dividing mode (1bit) Source clock selectable to K divider

0 : VCO output 1 : Source clock

bit48 PLL mode setting (1bit) 0 : Normal mode 1 : PLL mode

bit49-bit55 XIN oscillation stabilization

capacitance setting (7-bit) Capacitance is selectable from 5 pF to 10 pF by 0.039 pF Step

bit56-bit62 XOUT oscillation stabilization

capacitance setting (7-bit) Capacitance is selectable from 5 pF to 10 pF by 0.039 pF Step

bit63 Reserve ⎯

MB88R157

DS04-29132-3E 7

■OPERATION SETTING

• Frequency setting

Output frequency can be set by writing the internal memory to each divider parameter in the PLL block.

Internal oscillation frequency and output frequency can be calculated following expressions :

Internal oscillation frequency (fvco*) = Input frequency (fin) × (M+1) / (N+1)

* : Please set the fvco range from 20 MHz to 134 MHz.

Output frequency (fOUT*) = Input frequency (fin) × (M+1) / ( (N+1) × K)

* : Please set the fOUT range from 1 MHz to 134 MHz.

(Setting example)

fin = 27 MHz, fOUT = 60 MHz

M divider parameter : 1999 ( = 7CFH) , N divider parameter : 899 ( = 383H) , K divider par ameter : 1 ( = 01H)

27 × (1999+1) / ( (899+1) × 1) = 60 [MHz] (fvco = 27 × (1999+1) / (899+1) = 60 [MHz])

Note: Recommended value of each divider parameter is different at PLL mode and normal mode. Please refer

and confirm the recommended value by our support tool. Contact the sales representatives for details on

the support tools.

• Modulation frequency setting

Modulation frequency can be set by writing the internal memory to L divider parameter.

The average of modulation frequency can be calculated following expressions :

Note: Please ref er and confirm the recommended value b y our support tool. Contact the sales representatives f or

details on the support tools.

• Modulation rate setting

Modulation rate can be selectable from no modulation, ±0.25%, ±0.50%, ±0.75%, ±1.00%, ±1.25%, ±1.50%,

±1.75%.

Input frequency

266 × (L+1) (L = 1, 2, 3, 4, 5, 6, 7)

bit44 bit43 bit42 Modulation rate setting

0 0 0 No modulation

001±0.25%

010±0.50%

011±0.75%

100±1.00%

101±1.25%

110±1.50%

111±1.75%

MB88R157

8DS04-29132-3E

• Charge Pump setting, VCO gain setting

Note: Please ref er and confirm the recommended value b y our support tool. Contact the sales representatives f or

details on the support tools.

• OUT pin setting

OUT pin situation can be selected at OE pin “L” input.

Note : Internal oscillation circuit has been operating when OE pin is input “L”.

• Output drive ability setting

Output drive ability of OUT pin can be selected.

• Source clock dividing setting

Source clock to K divider can be selected.

When “input frequency” is selected, source clock or its divided clock can be output. But modulation setting is

not enable.

Note: When “input frequency ” is selected, internal oscillation circuit has been operating. About M and N divider

parameter setting, please ref er and confirm the recommended value b y our support tool. Contact the sales

representatives for details on the support tools.

• PLL mode setting

It can be selected normal mode and PLL mode by bit48 setting in the memor y map. PLL mode is good jitter

specification at non modulation. When the mode is selected, it becomes non modulation setting, the resistance

and capacitance value of the loop filter is changed, so oscillation specification is change.

Note: When PLL mode is selected, recommended value of M, N, K divider is changed. Please refer and confirm

the recommended value by our support tool. Contact the sales representatives for details on the support tools.

bit45 OUT pin situation

0 “L” output

1 “Hi-Z” output

bit46 OUT pin drive ability

0 Small (IOL = 3 mA)

1 Large (IOL = 7 mA)

bit47 Source clock to K divider

0 VCO output clock

1 Input clock (Source clock)

bit48 Operation mode

0 SSCG mode

1 PLL mode

MB88R157

DS04-29132-3E 9

• Oscillation stabilization capacitance setting

The capacitance connected XIN and XOUT pin can change each from 5 pF to 10 pF b y writing to bit49 to bit55

and bit56 to bit62 in the memory map.

(Setting example)

bit49 to bit55 : “0000000” bit56 to bit62 : “0100001”

XIN pin Oscillation stabilization capacitance : 5.000 pF

XOUT pin Oscillation stabilization capacitance : 7.599 pF

XIN XOUT Capacitance [pF]

bit49 bit56 0.039

bit50 bit57 0.079

bit51 bit58 0.157

bit52 bit59 0.315

bit53 bit60 0.630

bit54 bit61 1.260

bit55 bit62 2.520

XOUTXIN

5pF5pF

bit49

bit50

bit51

bit52

bit53

bit54

bit55 bit62

bit61

bit60

bit59

bit58

bit57

bit56

MB88R157

10 DS04-29132-3E

■MEMORY ACCESS

Read/write to the built-in non-volatile memory is enabled through the serial communication with the OE pin

functioned as the I/O pin.

Set for the communication protocol. Also, set the transfer speed as 1/512 of the source clock.

• Asynchronous transfer mode of UART

• LSB fast

•NRZ format

• Bit length: 8 bits

• No parity

• Stop bit: 1 bit

1. Set the PEX pin to “L” more than 30 ms after this device is turned on, input a command from the OE pin set

MB88R157 into memory access mode.(When a command is input by serial communication, data of “FDH” is

sent.)

Note: When memory access is available, source clock can be output from the OUT pin.

Fix the PEX pin to “H”, or fix the OE pin to “H” or “L” until command input.

2. At writing, “00H” is sent serially, and at reading, “40H” is sent.

Note: This device needs to stop outputting to the OE pin of the transferred device within 15 μs after transferring

“40H” serially at the reading state and place it to a receivable state.

3. At writing : Send 8-byte data blocks from the lower address of the memory map in turn with more than 100 μs

between each data block.

At read : This device outputs 8-byte data blocks from the lower address of the memory map in turn.

4. Repeat the operations of 2. and 3. for re-writing and re-reading.

To operate the device using the written data, turn on the power again.

However, the oscillation stabilization capacitance is set simultaneously with writing to memory. When the

oscillation stabilization capacitance and the crystal oscillation frequency are adjusted, change the oscillation

stabilization capacitance value so that the clock output from the OUT pin is set to the desired frequency.

VDD

30 ms

2.5 V

OUT

PEX

Memory access

mode signal

(internal)

Source clock output

• Transfer sequence

MB88R157

DS04-29132-3E 11

• Interconnection example

* 1 : Set the UO pin to Hi-z to read from memory, as the UO pin serves for serial I/O.

UO : UART serial data output pin

UI : UART serial data input pin

UCK : UART serial synchronous clock I/O pin

*2 : Because the transfer rate is set to 1/512 of source oscillation in MB88R157, the clock generator is used as

shown in above figure, so that the transfer speed is set to 1/512 of source clock in MB88R157. However, the

clock generator is not needed if the transfer speed can be maintained from an internal clock of the baud rate

generator of the UART.

MB88R157

UCK

Clock

Generator

Microcontroller with

built-in UART etc.

MB88R157

12 DS04-29132-3E

■ABSOLUTE MAXIMUM RATINGS

* : This parameter is based on VSS = 0.0 V

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

Parameter Symbol Rating Unit

Min Max

Power supply voltage* VDD − 0.5 + 4.0 V

Input voltage* VIVSS − 0.5 VDD + 0.5 V

Output voltage* VOVSS − 0.5 VDD + 0.5 V

Storage temperature TST − 55 + 125 °C

Operation junction temperature TJ − 40 + 125 °C

Output current IO − 14 + 14 mA

Overshoot VIOVER ⎯VDD + 1.0 (tOVER ≤ 50 ns) V

Undershoot VIUNDER VSS − 1.0 (tUNDER ≤ 50 ns) ⎯V

VDD

VSS

Input pin

Overshoot/Undershoot

tUNDER ≤ 50 ns

VIOVER ≤ VDD + 1.0 V

tOVER ≤ 50 ns VIUNDER ≤ VSS − 1.0 V

MB88R157

DS04-29132-3E 13

■RECOMMENDED OPERATING CONDITONS (VSS = 0.0 V)

WARNING: The recommended operating conditions are required in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device is

operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operation

outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on

the data sheet. Users considering application outside the listed conditions are advised to contact their

representatives beforehand.

Parameter Symbol Pin name Conditions Value Unit

Min Typ Max

Power supply voltage VDD VDD ⎯3.0 3.3 3.6 V

“H” level input voltage VIH OE, PEX,

XIN

Input slew rate for

XIN pin only

3 V/ns

VDD × 0.80 ⎯VDD + 0.3 V

“L” level input voltage VIL VSS ⎯VDD × 0.20 V

Input clock duty cycle tDCI XIN 10 MHz to 50 MHz 40 50 60 %

Operating temperature Ta⎯

Write to the internal

non-volatile memory + 20 ⎯ + 50 °C

Operating test after

the re-flow

Other than those

above −20 ⎯ + 85 °C

XIN

1.5 V

Input clock duty cycle (tDCI = tb / ta)

MB88R157

14 DS04-29132-3E

■ELECTRICAL CHARACTERISTICS

• DC Characteristics (Ta = − 20 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V)

Parameter Symbol Pin name Conditions Value Unit

Min Typ Max

Power supply current

ICC

VDD

24 MHz input (Crystal) ,

24 MHz internal oscillation,

24 MHz output

no load capacitance

⎯5.5 7.0 mA

ICC2

50 MHz input clock,

134 MHz internal oscillation,

134 MHz output

15 pF load capacitance

⎯⎯26 mA

Output voltage

VOH

OUT

“H” level output

Driving voltage (low) IOH = −3 mA,

Driving voltage (high) IOH = −7 mA

VDD −

0.5 ⎯VDD V

VOL “L” level output

Driving voltage (low) IOL = 3 mA,

Driving voltage (high) IOL = 7 mA VSS ⎯0.4 V

Pull-up resistance RPU OE, PEX ⎯25 50 200 kΩ

Load capacitance CIN XIN, OE,

PEX

Ta = + 25 °C,

VDD = VI = 0.0 V,

f = 1 MHz ⎯⎯16 pF

MB88R157

DS04-29132-3E 15

• AC characteristics (1) (Ta = − 20 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V)

* : The duty cycle value (tDCR) of the source clock output depends on the duty cycle of input clock tDCI. Either case

of A or B will be guaranteed.

A. Resonator : Oscillating with the resonator connected with XIN, XOUT

B. External clock input : The input level is Full - swing (VSS - VDD).

Parameter Sym-

bol Pin

name Conditions Value Unit

Min Typ Max

Crystal oscillation

frequency fxXIN,

XOUT Fundamental oscillation 10 ⎯40 MHz

Input frequency fin XIN ⎯10 ⎯40 MHz

Internal oscillation

frequency fVCO ⎯⎯ 20 ⎯134 MHz

Output frequency fOUT

OUT

Operation in PLL mode

and at non modulation 1⎯134 MHz

Operation at modulation 16 ⎯134

Output slewing rate SR

0.4 V to 2.4 V

load capacitance 15 pF

Driving ability small:

at 1 MHz to 60 MHz out-

put

Driving ability large:

at 60 MHz to 134 MHz

output

0.3 ⎯⎯V/ns

Output impedance ZODriving ability small ⎯75 ⎯Ω

Driving ability large ⎯38 ⎯

Output clock duty

cycle

tDCC VCO clock output 45 ⎯55

tDCR At reference clock

output tDCI−10* ⎯tDCI+10*

Modulation

frequency (number

of clocks par one

modulation)

fMOD

(nMOD) ⎯

fin/ (224 ×

(L+1) )

(224 × (L+1) )

fin/ (266 ×

(L+1) )

(266 × (L+1) )

fin/ (308 ×

(L+1) )

(308 × (L+1) )

kHz

(clks)

Power supply time tRVDD 0.2 V to 3.0 V 0.05 ⎯20 ms

Lock-up time tLK

OUT

⎯⎯270/fin+5 270/fin+10 ms

Cycle-cycle jitter tJC

No load

capacitance,

Ta = + 25 °C

VDD = 3.3 V

fOUT ≥

2 MHz ⎯⎯100 ps-

rms

fOUT<

2 MHz ⎯⎯150

Output stop time

from OE exit. tOD ta = 1 / fOUT ⎯⎯2 × tans

Output start time

after OE entry tOE ta = 1 / fOUT ⎯⎯2 × tans

MB88R157

16 DS04-29132-3E

■DEFINITION of MODULATION FREQUENCY and NUMBER of INPUT CLOCKS PER

MODULATION

This product contains the modulation period to realize the efficient EMI reduction.

The modulation period FMOD depends on the input frequency and changes between FMOD (Min) and FMOD (Max).

Furthermore, the typical value of the electrical characteristics is equivalent to the average value of the modulation

period FMOD.

■TURNING ON POWER SUPPLY AND LOCK-UP TIME

FMOD(Min) FMOD(Max)

NMOD(Max) NMOD(Min)

f (Output frequency)

Modulation wave form

Input clock

Clock count Clock count

VDD 3.0 V

0.2 V

XIN

OUT

tLK

clock stabilization

wait time

MB88R157

DS04-29132-3E 17

■OUTPUT CLOCK DUTY CYCLE (tDCC = tb / ta)

■INPUT FREQUENCY (fin = 1 / tin)

■OUTPUT SLEW RATE (SR)

■CYCLE-CYCLE JITTER (tJC = | tn − tn+1 | )

OUT

VDD/2

tin

XIN 0.8 V

2.4 V

0.4 V

OUT

Note: SR = (2.4 − 0.4) /tr, SR = (2.4 − 0.4) /tf

n+1

OUT

MB88R157

18 DS04-29132-3E

■OUTPUT TIMING AT OE CHANGE

tODta

OUT

VDD × 0.2[V]

• Output stop time from OE exit

“Hi-z” or “L”

(depend on setting of bit 45)

tOE

OUT

VDD × 0.8[V]

• Output start time after OE entry

“Hi-z” or “L”

(depend on setting of bit 45)

MB88R157

DS04-29132-3E 19

• AC characteristics (2) (Serial interface timing) (Ta = − 20 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V)

P arameter Symbol Pin name Conditions Value Unit

Min Typ Max

Cycle time of transfer

and receiver tSCYC

⎯ (tin × 512)

× 0.93 tin × 512 (tin × 512)

× 1.025 μs

Read operation

Read command receive →

OE in read data output tRDO ⎯15 ⎯⎯μs

Read operation

Final read data output →

OE pin input mode exchanged tOTI ⎯⎯⎯65 μs

D0 D1 D2 D3D4 D5 D6 D7

tSCYC

VDD*0.2

VDD*0.8

OE D7 Stop bit Hi-z

tRDO

tOTI

Start bit

OE D7 Stop bit Hi-z

• Command / write data transfer

• Read operation Output read data

Read command

received

OE pin output Received data

MB88R157

20 DS04-29132-3E

■INTERCONNECTION CIRCUIT EXAMPLE

■CRYSTAL OSCILLATION CIRCUIT

The figure below sho ws the connection example about general resonator. The oscillation circuit has the built-in

feedback resistor (500 kΩ) and oscillation stabilization capacitance (C1 and C2).

C1 and C2 value can be changeable by setting bit49 to bit55 and bit56 to bit62 in memor y. It is necessar y to

set suitable parameter for each resonator.

To use an external clock signal (without using the resonator), input the clock signal to the XIN pin with the XOUT

pin connected to nothing.

tal

MB88R157

C1 : Capacitor of 10 μF or higher

C2 : Capacitor of about 0.01 μF (connect a capacitor of good high frequency property

(ex. laminated ceramic capacitor) to close to this device)

R1 : Impedance matching resistor for board pattern

Rf (500 kΩ)

C1C2

XIN pin XOUT pin

LSI internal

LSI external

Fundamental resonator

MB88R157

DS04-29132-3E 21

■ORDERING INFORMATION

Part n umber Package

MB88R157PNF-G-JNE1

MB88R157PNF-G-JN-ERE1

MB88R157PNF-G-JN-EFE1

8-pin plastic SOP

(FPT-8P-M02)

MB88R157

22 DS04-29132-3E

■PACKAGE DIMENSION

Please confirm the latest Package dimension by following URL.

http://edevice.fujitsu.com/package/en-search/

8-pin plastic SOP Lead pitch 1.27 mm

Package width

package length

3.9 × 5.05 mm

Lead shape Gullwing

Sealing method Plastic mold

Mounting height 1.75 mm MAX

Weigh t 0.0 6 g

8-pin plastic SOP

(FPT-8P-M02)

2002 FUJITSU LIMITED F08004S-c-4-7

1.27(.050)

3.90±0.30 6.00±0.40

.199 –.008

+.010

–0.20

+0.25

5.05

0.13(.005)

(.154±.012) (.236±.016)

0.10(.004)

0.44±0.08

(.017±.003)

–0.07

+0.03

0.22

.009 +.001

–.003

45˚

0.40(.016) "A" 0~8˚

0.25(.010)

(Mounting height)

Details of "A" part

1.55±0.20

(.061±.008)

0.50±0.20

(.020±.008)

0.60±0.15

(.024±.006)

0.15±0.10

(.006±.004)

(Stand off)

0.10(.004)

Dimensions in mm (inches).

Note: The values in parentheses are reference values.

Note 1) *1 : These dimensions include resin protrusion.

Note 2) *2 : These dimensions do not include resin protrusion.

Note 3) Pins width and pins thickness include plating thickness.

Note 4) Pins width do not include tie bar cutting remainder.

MB88R157

DS04-29132-3E 23

MEMO

MB88R157

FUJITSU MICROELECTRONICS LIMITED

Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,

Shinjuku-ku, Tokyo 163-0722, Japan

Tel: +81-3-5322-3329

http://jp.fujitsu.com/fml/en/

For further information please contact:

North and South America

FUJITSU MICROELECTRONICS AMERICA, INC.

1250 E. Arques Avenue, M/S 333

Sunnyvale, CA 94085-5401, U.S.A.

Tel: +1-408-737-5600 Fax: +1-408-737-5999

http://www.fma.fujitsu.com/

Europe

FUJITSU MICROELECTRONICS EUROPE GmbH

Pittlerstrasse 47, 63225 Langen, Germany

Tel: +49-6103-690-0 Fax: +49-6103-690-122

http://emea.fujitsu.com/microelectronics/

Korea

FUJITSU MICROELECTRONICS KOREA LTD.

206 Kosmo Tower Building, 1002 Daechi-Dong,

Gangnam-Gu, Seoul 135-280, Republic of Korea

Tel: +82-2-3484-7100 Fax: +82-2-3484-7111

http://kr.fujitsu.com/fmk/

Asia Pacific

FUJITSU MICROELECTRONICS ASIA PTE. LTD.

151 Lorong Chuan,

#05-08 New Tech Park 556741 Singapore

Tel : +65-6281-0770 Fax : +65-6281-0220

http://www.fmal.fujitsu.com/

FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.

Rm. 3102, Bund Center, No.222 Yan An Road (E),

Shanghai 200002, China

Tel : +86-21-6146-3688 Fax : +86-21-6335-1605

http://cn.fujitsu.com/fmc/

FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.

10/F., World Commerce Centre, 11 Canton Road,

Tsimshatsui, Kowloon, Hong Kong

Tel : +852-2377-0226 Fax : +852-2376-3269

http://cn.fujitsu.com/fmc/en/

Specifications are subject to change without notice. For further information please contact each office.

The contents of this document are subject to change without notice.

Customers are advised to consult with sales representatives before ordering.

The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose

of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS

does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating

the device based on such information, you must assume any responsibility arising out of such use of the information.

FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.

Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use

or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS

or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or

other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual

property rights or other rights of third parties which would result from the use of information contained herein.

The products described in this document are designed, developed and manufactured as contemplated for general use, including without

limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured

as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to

the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear

facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon

system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).

Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising

in connection with above-mentioned uses of the products.

Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by

incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current

levels and other abnormal operating conditions.

Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of

the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.

The company names and brand names herein are the trademarks or registered trademarks of their respective owners.

Edited: Sales Promotion Department