Not to scale
TO-92
3-Pin
DSBGA
8-Pin
SOIC
8-Pin
1
1
1
2
3
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
Reference
Design
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM78L
SNVS754L –JANUARY 2000–REVISED JUNE 2020
LM78L 100-mA Fixed Output Linear Regulator
1
1 Features
1• For lower cost alternative, see the UA78L
• Input voltage up to 30 V
• Output voltage tolerances of ±5% over the
temperature range
• Available output voltages: 5 V, 6.2 V, 8.2 V, 9 V,
12 V, and 15 V
• Output current of 100 mA
• Output transistor safe area protection
• Internal thermal overload protection
• Internal short-circuit current limit
• No external components
• Available in tiny DSBGA package
• Available in 3-pin TO-92 and 8-pin SOIC low
profile packages
2 Applications
•Battery chargers
•Portable instrumentation
•LED lighting
•Appliances
Package Options
3 Description
The LM78L series (LM78Lxx throughout this
document) of three terminal positive regulators is
available with several fixed output voltages, making
them useful in a wide range of applications. Used as
a Zener-diode and resistor combination replacement,
the LM78Lxx usually provides an effective output
impedance improvement of two orders of magnitude
and lower quiescent current. These regulators can
provide local, on-card regulation, eliminating
distribution problems associated with single-point
regulation. The available voltages allow the LM78Lxx
to be used in logic systems, instrumentation, HiFi,
and other solid-state electronic equipment.
The LM78Lxx is available in the plastic TO-92 (LP)
package, the SOIC (D) package, and a chip-sized
package (8-Bump DSBGA) using TI's DSBGA
package technology. With adequate heat sinking, the
regulator can deliver 100-mA output current. Current
limiting is included to limit the peak output current to
a safe value. Safe area protection for the output
transistors is provided to limit internal power
dissipation. If internal power dissipation is too high for
the heat sinking provided, the thermal shutdown
circuit prevents the IC from overheating.
See the AN-1112 DSBGA Wafer Level Chip Scale
Package application note for DSBGA considerations.
For more information on the TO-92 package, see the
TO-92 Packing Options/Ordering Instructions
application report.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
LM78L DSBGA (8) 1.30 mm × 1.30 mm
SOIC (8) 3.90 mm × 4.90 mm
TO-92 (3) 3.70 mm × 4.70 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Fixed Output Regulator Circuit
2
LM78L
SNVS754L –JANUARY 2000–REVISED JUNE 2020
www.ti.com
Product Folder Links: LM78L
Submit Documentation Feedback Copyright © 2000–2020, Texas Instruments Incorporated
Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description............................................................. 1
4 Revision History..................................................... 2
5 Device Comparison Table..................................... 3
6 Pin Configuration and Functions......................... 4
7 Specifications......................................................... 5
7.1 Absolute Maximum Ratings ...................................... 5
7.2 ESD Ratings.............................................................. 5
7.3 Recommended Operating Conditions....................... 5
7.4 Thermal Information.................................................. 5
7.5 Electrical Characteristics — LM78L05...................... 6
7.6 Electrical Characteristics — LM78L09...................... 6
7.7 Electrical Characteristics — LM78L12...................... 7
7.8 Electrical Characteristics — LM78L15...................... 7
7.9 Electrical Characteristics — LM78L62...................... 8
7.10 Typical Characteristics............................................ 9
8 Detailed Description............................................ 11
8.1 Overview................................................................. 11
8.2 Functional Block Diagram....................................... 11
8.3 Feature Description................................................. 12
8.4 Device Functional Modes........................................ 12
9 Application and Implementation ........................ 13
9.1 Application Information............................................ 13
9.2 Typical Applications ................................................ 13
10 Power Supply Recommendations ..................... 16
11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
11.2 Layout Example .................................................... 17
12 Device and Documentation Support................. 18
12.1 Documentation Support ........................................ 18
12.2 Receiving Notification of Documentation Updates 18
12.3 Support Resources ............................................... 18
12.4 Trademarks........................................................... 18
12.5 Electrostatic Discharge Caution............................ 18
12.6 Glossary................................................................ 18
13 Mechanical, Packaging, and Orderable
Information........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision K (December 2016) to Revision L Page
• Changed product name to LM78L so document matches product folder .............................................................................. 1
• Added first Features bullet ..................................................................................................................................................... 1
• Added Device Comparison Table........................................................................................................................................... 3
Changes from Revision J (December 2013) to Revision K Page
• Added Applications section, Device Information table, Pin Configuration and Functions section, ESD Ratings table,
Recommended Operating Conditions table, Detailed Description section, Application and Implementation section,
Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.................................................................................................. 1
• Deleted LM78L82 from the data sheet................................................................................................................................... 1
• Added Thermal Information table........................................................................................................................................... 1
• Deleted Lead temperature (soldering) information................................................................................................................. 5
• Changed RθJA values for D (SOIC) From: 180 To: 128.8, LP (TO-92) from 230 to 158.7, and YPB (DSBGA) From:
230.9 To 108.4 ....................................................................................................................................................................... 5
• Changed RθJC values for LP (TO-92) From: 60 To 75.2......................................................................................................... 5
Changes from Revision I (April 2013) to Revision J Page
• Added the AI suffix ................................................................................................................................................................. 6
3
LM78L
www.ti.com
SNVS754L –JANUARY 2000–REVISED JUNE 2020
Product Folder Links: LM78L
Submit Documentation FeedbackCopyright © 2000–2020, Texas Instruments Incorporated
5 Device Comparison Table
IOUT PARAMETER LM78xx UA78 LM340 LM340A UNIT
1.5 A
Input voltage range 7 - 35 7 - 38 7 - 35 7 - 35 V
Fixed output voltage option 5, 12, 15 5, 8, 10, 12, 15,
24 5, 12, 15 5, 12, 15 V
Load regulation accuracy 4 4 4 2 %
PSRR (120 Hz) 80 78 80 80 dB
Recommended operating temperature 0 - 125 0 - 125 0 - 125 0 - 125 °C
TO-220 TJA 23.9 19 23.9 23.9 °C/W
SOT-223 TJA 62.1 N/A 62.1 62.1 °C/W
TO-3 TJA 39 N/A 39 39 °C/W
TO-263 TJA 44.8 25.3 44.8 44.8 °C/W
0.5 A
LM78Mxx UA78MxxC UA78MxxI LM341
Input voltage range 7.2 - 35 5.3 - 30 5.3 - 30 7.2 - 35 V
Fixed output voltage option 5 3.3, 5, 6, 8, 9,
10, 12 3.3, 5 5 V
Load regulation accuracy 4 3 3 4 %
PSRR (120 Hz) 78 80 80 78 dB
Recommended operating temperature –40 - 125 0 - 125 –40 - 125 –40 - 125 °C
TO-220 TJA 22.6 19 19 22.6 °C/W
SOT-223 TJA N/A 53 53 N/A °C/W
TO-3 TJA 162.4 N/A N/A N/A °C/W
TO-252 Powerflex TJA N/A 28 28 N/A °C/W
TO-252 TJA 38 30.3 30.3 N/A °C/W
0.1 A
LM78LxxAC LM78LxxAI,
LM78LxxIT UA78LxxC UA78LxxI
Input voltage range 7.0 - 30 7.0 - 30 4.75 - 30 4.75 - 30 V
Fixed output voltage option 5, 6.2, 12, 15 5, 9 2.6, 5, 6.2, 8, 9,
10, 12, 15 5 V
Load regulation accuracy (A/non -A) 4 4 4, 8 4, 8 %
PSRR (120 Hz) 62 62 51 51 dB
Recommended operating temperature 0 - 125 –40 - 125 0 - 125 –40 - 125 °C
SOT-89 TJA N/A N/A 54.7 54.7 °C/W
SO-8 TJA 128.8 128.8 115 115 °C/W
DSBGA TJA N/A 108.4 N/A N/A °C/W
TO-92 TJA 158.7 N/A 143.6 143.6 °C/W
1 VOUT
2 GND
3 VIN
Not to scale
A B C
3
2
1
Not to scale
VOUT NC GND
VOUT GND
VIN VIN NC
1VOUT 8 VIN
2GND 7 GND
3GND 6 GND
4NC 5 NC
Not to scale
4
LM78L
SNVS754L –JANUARY 2000–REVISED JUNE 2020
www.ti.com
Product Folder Links: LM78L
Submit Documentation Feedback Copyright © 2000–2020, Texas Instruments Incorporated
6 Pin Configuration and Functions
YPB Package
8-Pin DSBGA
Top View
D Package
8-Pin SOIC
Top View
LP Package
3-Pin TO-92
Bottom View
Pin Functions
PIN I/O DESCRIPTION
NAME DSBGA SOIC TO-92
GND C2, C3 2, 3, 6, 7 2 — Ground
NC B3, C1 4, 5 — — No connection
VIN A1, B1 8 3 I Input supply voltage pin
VOUT A2, A3 1 1 O Output voltage pin
5
LM78L
www.ti.com
SNVS754L –JANUARY 2000–REVISED JUNE 2020
Product Folder Links: LM78L
Submit Documentation FeedbackCopyright © 2000–2020, Texas Instruments Incorporated
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
Input voltage 35 V
Power dissipation Internally limited
Operating junction temperature, TJ
LM78LxxACZ (TO-92) 0 125
°C
LM78LxxACM (SOIC) 0 125
LM78LxxAIM (SOIC) –40 125
LM78LxxITP (thin DSBGA) –40 85
Storage temperature, Tstg –65 150 °C
(1) Human body model, 1.5 kΩin series with 100 pF.
7.2 ESD Ratings VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM),(1) ±1000 V
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT
Input voltage 30 V
Continuous output current 100 mA
TJJunction temperature
LM78LxxACZ (TO-92) 0 125
°C
LM78LxxACM (SOIC) 0 125
LM78LxxAIM (SOIC) –40 125
LM78LxxITP (DSBGA) –40 85
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.4 Thermal Information
THERMAL METRIC(1) LM78Lxx
UNITD (SOIC) LP (TO-92) YPB (DSBGA)
8 PINS 3 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 128.8 158.7 108.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 76 75.2 1.3 °C/W
RθJB Junction-to-board thermal resistance 69.3 n/a 31.4 °C/W
ψJT Junction-to-top characterization parameter 26.3 30.2 4.5 °C/W
ψJB Junction-to-board characterization parameter 68.8 138.2 31.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — — °C/W
6
LM78L
SNVS754L –JANUARY 2000–REVISED JUNE 2020
www.ti.com
Product Folder Links: LM78L
Submit Documentation Feedback Copyright © 2000–2020, Texas Instruments Incorporated
(1) For the operating ranges of each package, see Absolute Maximum Ratings.
(2) Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
(3) Power dissipation ≤0.75 W.
(4) Recommended minimum load capacitance of 0.01 µF to limit high-frequency noise.
7.5 Electrical Characteristics — LM78L05
Typical values apply for TJ= 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package(1)(2), IO= 40 mA, CI= 0.33 µF, CO= 0.1 µF, VIN = 10 V (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOOutput voltage TJ= 25°C 4.8 5 5.2 VVIN = 7 V to 20 V, IO= 1 mA to 40 mA(3) 4.75 5.25
IO= 1 mA to 70 mA(3) 4.75 5.25
ΔVO
Line regulation VIN = 7 V to 20 V, TJ= 25°C 18 75
mV
VIN = 8 V to 20 V, TJ= 25°C 10 54
Load regulation IO= 1 mA to 100 mA, TJ= 25°C 20 60
IO= 1 mA to 40 mA, TJ= 25°C 5 30
IQQuiescent current TJ= 25°C 3 5 mA
ΔIQQuiescent current change VIN = 8 V to 20 V 1 mA
IO= 1 mA to 40 mA 0.1
VnOutput noise voltage f = 10 Hz to 100 kHz(4) 40 µV
ΔVIN/ΔVORipple rejection f = 120 Hz, VIN = 8 V to 16 V, TJ= 25°C 47 62 dB
IPK Peak output current 140 mA
ΔVO/ΔTAverage output voltage temperature
coefficient IO= 5 mA –0.65 mV/°C
VIN(MIN) Minimum value of input voltage
required to maintain line regulation TJ= 25°C 6.7 7 V
(1) For the operating ranges of each package, see Absolute Maximum Ratings.
(2) Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
(3) Power dissipation ≤0.75 W.
7.6 Electrical Characteristics — LM78L09
Typical values apply for TJ= 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package(1)(2), IO= 40 mA, CI= 0.33 µF, CO= 0.1 µF, VIN = 15 V (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOOutput voltage TJ= 25°C 8.64 9 9.36 VVIN = 11.5 V to 24 V, IO= 1 mA to 40 mA(3) 8.55 9.45
IO= 1 mA to 70 mA(3) 8.55 9.45
ΔVO
Line regulation VIN = 11.5 V to 24 V, TJ= 25°C 100 200
mV
VIN = 13 V to 24 V, TJ= 25°C 90 150
Load regulation IO= 1 mA to 100 mA, TJ= 25°C 20 90
IO= 1 mA to 40 mA, TJ= 25°C 10 45
IQQuiescent current TJ= 25°C 2 5.5 mA
ΔIQQuiescent current change VIN = 11.5 V to 24 V 1.5 mA
IO= 1 mA to 40 mA 0.1
VnOutput noise voltage 70 µV
ΔVIN/ΔVORipple rejection f = 120 Hz, VIN = 15 V to 25 V, TJ= 25°C 38 44 dB
IPK Peak output current 140 mA
ΔVO/ΔTAverage output voltage temperature
coefficient IO= 5 mA –0.9 mV/°C
VIN(MIN) Minimum value of input voltage
required to maintain line regulation 10.7 V
7
LM78L
www.ti.com
SNVS754L –JANUARY 2000–REVISED JUNE 2020
Product Folder Links: LM78L
Submit Documentation FeedbackCopyright © 2000–2020, Texas Instruments Incorporated
(1) For the operating ranges of each package, see Absolute Maximum Ratings.
(2) Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
(3) Power dissipation ≤0.75 W.
7.7 Electrical Characteristics — LM78L12
Typical values apply for TJ= 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package(1)(2), IO= 40 mA, CI= 0.33 µF, CO= 0.1 µF, VIN = 19 V (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOOutput voltage TJ= 25°C 11.5 12 12.5 VVIN = 14.5 V to 27 V, IO= 1 mA to 40 mA(3) 11.4 12.6
IO= 1 mA to 70 mA(3) 11.4 12.6
ΔVO
Line regulation VIN = 14.5 V to 27 V, TJ= 25°C 30 180
mV
VIN = 16 V to 27 V, TJ= 25°C 20 110
Load regulation IO= 1 mA to 100 mA, TJ= 25°C 30 100
IO= 1 mA to 40 mA, TJ= 25°C 10 50
IQQuiescent current TJ= 25°C 3 5 mA
ΔIQQuiescent current change VIN = 16 V to 27 V 1 mA
IO= 1 mA to 40 mA 0.1
VnOutput noise voltage 80 µV
ΔVIN/ΔVORipple rejection f = 120 Hz, VIN = 15 V to 25 V, TJ= 25°C 40 54 dB
IPK Peak output current 140 mA
ΔVO/ΔTAverage output voltage temperature
coefficient IO= 5 mA –1 mV/°C
VIN(MIN) Minimum value of input voltage
required to maintain line regulation TJ= 25°C 13.7 14.5 V
(1) For the operating ranges of each package, see Absolute Maximum Ratings.
(2) Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
(3) Power dissipation ≤0.75 W.
7.8 Electrical Characteristics — LM78L15
Typical values apply for TJ= 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package(1)(2), IO= 40 mA, CI= 0.33 µF, CO= 0.1 µF, VIN = 23 V (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOOutput voltage TJ= 25°C 14.4 15 15.6 VVIN = 17.5 V to 30 V, IO= 1 mA to 40 mA(3) 14.25 15.75
IO= 1 mA to 70 mA(3) 14.25 15.75
ΔVO
Line regulation VIN = 17.5 V to 30 V, TJ= 25°C 37 250
mV
VIN = 20 V to 30 V, TJ= 25°C 25 140
Load regulation IO= 1 mA to 100 mA, TJ= 25°C 35 150
IO= 1 mA to 40 mA, TJ= 25°C 12 75
IQQuiescent current TJ= 25°C 3 5 mA
ΔIQQuiescent current change VIN =20 V to 30 V 1 mA
IO= 1 mA to 40 mA 0.1
VnOutput noise voltage 90 µV
ΔVIN/ΔVORipple rejection f = 120 Hz, VIN = 18.5 V to 28.5 V, TJ= 25°C 37 51 dB
IPK Peak output current 140 mA
ΔVO/ΔTAverage output voltage temperature
coefficient IO= 5 mA –1.3 mV/°C
VIN(MIN) Minimum value of input voltage
required to maintain line regulation TJ= 25°C 16.7 17.5 V
8
LM78L
SNVS754L –JANUARY 2000–REVISED JUNE 2020
www.ti.com
Product Folder Links: LM78L
Submit Documentation Feedback Copyright © 2000–2020, Texas Instruments Incorporated
(1) For the operating ranges of each package, see Absolute Maximum Ratings.
(2) Limits are ensured by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods.
(3) Power dissipation ≤0.75 W.
(4) Recommended minimum load capacitance of 0.01 µF to limit high-frequency noise.
7.9 Electrical Characteristics — LM78L62
Typical values apply for TJ= 25°C, Minimum and Maximum limits apply for the entire operating temperature range of the
package(1)(2), IO= 40 mA, CI= 0.33 µF, CO= 0.1 µF, VIN = 12 V (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOOutput voltage TJ= 25°C 5.95 6.2 6.45 VVIN = 8.5 V to 20 V, IO= 1 mA to 40 mA(3) 5.9 6.5
IO= 1 mA to 70 mA(3) 5.9 6.5
ΔVO
Line regulation VIN = 8.5 V to 20 V, TJ= 25°C 65 175
mV
VIN = 9 V to 20 V, TJ= 25°C 55 125
Load regulation IO= 1 mA to 100 mA, TJ= 25°C 13 80
IO= 1 mA to 40 mA, TJ= 25°C 6 40
IQQuiescent current TJ= 25°C 2 5.5 mA
ΔIQQuiescent current change VIN = 8 V to 20 V 1.5 mA
IO= 1 mA to 40 mA 0.1
VnOutput noise voltage f = 10 Hz to 100 kHz(4) 50 µV
ΔVIN/ΔVORipple rejection f = 120 Hz, VIN = 10 V to 20 V, TJ= 25°C 40 46 dB
IPK Peak output current 140 mA
ΔVO/ΔTAverage output voltage temperature
coefficient IO= 5 mA –0.75 mV/°C
VIN(MIN) Minimum value of input voltage
required to maintain line regulation 7.9 V
9
LM78L
www.ti.com
SNVS754L –JANUARY 2000–REVISED JUNE 2020
Product Folder Links: LM78L
Submit Documentation FeedbackCopyright © 2000–2020, Texas Instruments Incorporated
7.10 Typical Characteristics
LP Package
Figure 1. Maximum Average Power Dissipation Figure 2. Peak Output Current
Figure 3. Dropout Voltage Figure 4. Ripple Rejection
Figure 5. Output Impedance Figure 6. Quiescent Current
11
LM78L
www.ti.com
SNVS754L –JANUARY 2000–REVISED JUNE 2020
Product Folder Links: LM78L
Submit Documentation FeedbackCopyright © 2000–2020, Texas Instruments Incorporated
8 Detailed Description
8.1 Overview
The LM78Lxx series of positive regulators is available in the following fixed output voltages: 5 V, 6.2 V, 8.2 V,
9 V, 12 V, and 15 V. The regulator can be configured to an adjustable output by connecting the GND pin to the
center of a resistive voltage divider as shown in Figure 10. In this configuration, the fixed output voltage acts as
the reference voltage across R1 allowing the output to be adjusted by changing the resistor.
8.2 Functional Block Diagram
12
LM78L
SNVS754L –JANUARY 2000–REVISED JUNE 2020
www.ti.com
Product Folder Links: LM78L
Submit Documentation Feedback Copyright © 2000–2020, Texas Instruments Incorporated
8.3 Feature Description
8.3.1 Load Regulation
These devices regulate the voltage between the VOUT and GND pins, and can be made adjustable by using a
resistive voltage divider. The output voltage tolerance is ±5% over temperature.
8.3.2 Protection
The LM78Lxx series of regulators has internal thermal overload protection that automatically shuts off the device
if the operating temperature becomes too high. There is also internal short-circuit current limit and output
transistor safe area protection that shuts down the device if the output current becomes too high.
8.4 Device Functional Modes
8.4.1 Normal Operation
The VOUT pin sources current necessary to set the voltage on VOUT at a fixed voltage above the GND pin. See
Specifications for VOof each device.
8.4.2 Shutdown
The device automatically shuts down if the output current or its internal temperature becomes too high.
13
LM78L
www.ti.com
SNVS754L –JANUARY 2000–REVISED JUNE 2020
Product Folder Links: LM78L
Submit Documentation FeedbackCopyright © 2000–2020, Texas Instruments Incorporated
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
These devices are versatile and high-performance regulators with a wide temperature range and tight line and
load regulation. An input capacitor is required if the regulator is placed more than 3 inches from the power supply
filter. TI recommends a minimum load capacitance of 0.01 µF to limit high frequency.
9.2 Typical Applications
9.2.1 Fixed Output Regulator
*Required if the regulator is located more than 3 inches from the power supply filter.
**Recommended minimum load capacitance of 0.01 µF to limit high-frequency noise.
Figure 8. Fixed Output Regulator Circuit
9.2.1.1 Design Requirements
The device component count is very minimal. No external components are usually required. However, TI
recommends input or output capacitors depending on the distance between the device and the power supply and
if extra filtering is needed at the output.
The output voltage is set based on the selection of the two resistors (R1 and R2), as shown in Figure 14.
9.2.1.2 Detailed Design Procedure
9.2.1.2.1 Input Capacitor
An input capacitor is required if the regulator is placed more than 3 inches from the power supply filter. A 0.33-µF
capacitor on the input is suitable for most applications.
9.2.1.2.2 Output Capacitor
TI recommends a minimum load capacitance of 0.01 µF to limit high-frequency noise.
Load Current (mA)
Input - Output Differential (V)
0 20 40 60 80 100
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
25qC
14
LM78L
SNVS754L –JANUARY 2000–REVISED JUNE 2020
www.ti.com
Product Folder Links: LM78L
Submit Documentation Feedback Copyright © 2000–2020, Texas Instruments Incorporated
Typical Applications (continued)
9.2.1.3 Application Curve
Figure 9. LM78Lxx Dropout
9.2.2 Other Application Circuits
Figure 10 to Figure 14 show application circuit examples using the LM78Lxx devices. Customers must fully
validate and test these circuits before implementing a design based on these examples. Unless otherwise noted,
the design procedures in Fixed Output Regulator are applicable to these designs.
VO= 5 V + (5 V / R1 + IQ) × R2*
* The 5 V represents the fixed output voltage of the LM78L05. If using one of the other LM78Lxx devices, use that
fixed output voltage value when calculating VO.
IQ< 5 V / (3 × R1)
Load regulation (LR) of LM78L05 ≈(R1 + R2) / R1
Figure 10. Adjustable Output Regulator Circuit
15
LM78L
www.ti.com
SNVS754L –JANUARY 2000–REVISED JUNE 2020
Product Folder Links: LM78L
Submit Documentation FeedbackCopyright © 2000–2020, Texas Instruments Incorporated
Typical Applications (continued)
IOUT = (VO/ R1) + IQ
IQ= 1.5 mA over line and load changes
Figure 11. Current Regulator Circuit
*Solid tantalum
**Heat sink Q1
***Optional: Improves ripple rejection and transient response.
Load Regulation = 0.6%, IL= 0 mA to 250 mA pulsed with tON = 50 ms.
Figure 12. 5-V, 500-mA Regulator With Short-Circuit Protection Circuit
*Solid tantalum
Figure 13. ±15-V, 100-mA Dual Power Supply Circuit
16
LM78L
SNVS754L –JANUARY 2000–REVISED JUNE 2020
www.ti.com
Product Folder Links: LM78L
Submit Documentation Feedback Copyright © 2000–2020, Texas Instruments Incorporated
Typical Applications (continued)
*Solid tantalum
VO= VG+ 5 V, R1 = (–VIN / IQ(LM78L05))
VO= 5 V (R2 / R4) for (R2 + R3) = (R4 + R5)
A 0.5-V output will correspond to (R2 / R4) = 0.1, (R3 / R4) = 0.9
Figure 14. Variable Output Regulator Circuit (0.5 V to 18 V)
10 Power Supply Recommendations
The linear regulator input supply must be well regulated and kept at a voltage level to not exceed the maximum
input to output voltage differential allowed by the device. The minimum dropout voltage (VIN – VO) must be met
with extra headroom when possible to keep the output well regulated. A 0.33-µF or higher capacitor must be
placed at the input to bypass noise.
11 Layout
11.1 Layout Guidelines
For the best overall performance, some layout guidelines may be disregarded. Place all circuit components on
the same side of the circuit board and as near as practical to the respective linear regulator pins. Traces must be
kept short and wide to reduce the amount of parasitic elements in the system. The actual width and thickness of
traces depends on the current carrying capability and heat dissipation required by the end system.
18
LM78L
SNVS754L –JANUARY 2000–REVISED JUNE 2020
www.ti.com
Product Folder Links: LM78L
Submit Documentation Feedback Copyright © 2000–2020, Texas Instruments Incorporated
12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation see the following:
• Texas Instruments, UA78L00 Series Positive-Voltage Linear Regulators data sheet
• Texas Instruments, AN-1112 DSBGA Wafer Level Chip Scale Package application note
• Texas Instruments, TO-92 Packing Options/Ordering Instructions application report
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 11-Jan-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM78L05ACM NRND SOIC D 8 95 Non-RoHS
& Green Call TI Call TI 0 to 125 LM78L
05ACM
LM78L05ACM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 LM78L
05ACM
LM78L05ACMX NRND SOIC D 8 2500 Non-RoHS
& Green Call TI Call TI 0 to 125 LM78L
05ACM
LM78L05ACMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 LM78L
05ACM
LM78L05ACZ/LFT1 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
05ACZ
LM78L05ACZ/LFT3 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
05ACZ
LM78L05ACZ/LFT4 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
05ACZ
LM78L05ACZ/LFT7 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
05ACZ
LM78L05ACZ/NOPB ACTIVE TO-92 LP 3 1800 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
05ACZ
LM78L05AIM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LM78L
05AM
LM78L05AIMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LM78L
05AM
LM78L05ITP/NOPB ACTIVE DSBGA YPB 8 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 P
03
LM78L05ITPX/NOPB ACTIVE DSBGA YPB 8 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 P
03
LM78L09ITPX/NOPB ACTIVE DSBGA YPB 8 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 P
02
LM78L12ACM NRND SOIC D 8 95 Non-RoHS
& Green Call TI Call TI 0 to 125 LM78L
12ACM
LM78L12ACM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 LM78L
12ACM
LM78L12ACMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 LM78L
PACKAGE OPTION ADDENDUM
www.ti.com 11-Jan-2021
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
12ACM
LM78L12ACZ/LFT3 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
12ACZ
LM78L12ACZ/LFT4 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
12ACZ
LM78L12ACZ/LFT7 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
12ACZ
LM78L12ACZ/NOPB ACTIVE TO-92 LP 3 1800 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
12ACZ
LM78L15ACM NRND SOIC D 8 95 Non-RoHS
& Green Call TI Call TI 0 to 125 LM78L
15ACM
LM78L15ACM/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 LM78L
15ACM
LM78L15ACMX NRND SOIC D 8 2500 Non-RoHS
& Green Call TI Call TI 0 to 125 LM78L
15ACM
LM78L15ACMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM 0 to 125 LM78L
15ACM
LM78L15ACZ/LFT4 ACTIVE TO-92 LP 3 2000 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
15ACZ
LM78L15ACZ/NOPB ACTIVE TO-92 LP 3 1800 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
15ACZ
LM78L62ACZ/NOPB ACTIVE TO-92 LP 3 1800 RoHS & Green SN N / A for Pkg Type 0 to 125 LM78L
62ACZ
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
PACKAGE OPTION ADDENDUM
www.ti.com 11-Jan-2021
Addendum-Page 3
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM78L05ACMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L05ACMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L05AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L05ITP/NOPB DSBGA YPB 8 250 178.0 8.4 1.5 1.5 0.66 4.0 8.0 Q1
LM78L05ITPX/NOPB DSBGA YPB 8 3000 178.0 8.4 1.5 1.5 0.66 4.0 8.0 Q1
LM78L09ITPX/NOPB DSBGA YPB 8 3000 178.0 8.4 1.5 1.5 0.66 4.0 8.0 Q1
LM78L12ACMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L15ACMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM78L15ACMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Aug-2020
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM78L05ACMX SOIC D 8 2500 367.0 367.0 35.0
LM78L05ACMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM78L05AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM78L05ITP/NOPB DSBGA YPB 8 250 210.0 185.0 35.0
LM78L05ITPX/NOPB DSBGA YPB 8 3000 210.0 185.0 35.0
LM78L09ITPX/NOPB DSBGA YPB 8 3000 210.0 185.0 35.0
LM78L12ACMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM78L15ACMX SOIC D 8 2500 367.0 367.0 35.0
LM78L15ACMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Aug-2020
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
.228-.244 TYP
[5.80-6.19]
.069 MAX
[1.75]
6X .050
[1.27]
8X .012-.020
[0.31-0.51]
2X
.150
[3.81]
.005-.010 TYP
[0.13-0.25]
0 - 8 .004-.010
[0.11-0.25]
.010
[0.25]
.016-.050
[0.41-1.27]
4X (0 -15 )
A
.189-.197
[4.81-5.00]
NOTE 3
B .150-.157
[3.81-3.98]
NOTE 4
4X (0 -15 )
(.041)
[1.04]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
18
.010 [0.25] C A B
5
4
PIN 1 ID AREA
SEATING PLANE
.004 [0.1] C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
www.ti.com
EXAMPLE BOARD LAYOUT
.0028 MAX
[0.07]
ALL AROUND
.0028 MIN
[0.07]
ALL AROUND
(.213)
[5.4]
6X (.050 )
[1.27]
8X (.061 )
[1.55]
8X (.024)
[0.6]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
EXPOSED
METAL
OPENING
SOLDER MASK METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED
METAL
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SYMM
1
45
8
SEE
DETAILS
SYMM
www.ti.com
EXAMPLE STENCIL DESIGN
8X (.061 )
[1.55]
8X (.024)
[0.6]
6X (.050 )
[1.27] (.213)
[5.4]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
SYMM
SYMM
1
45
8
www.ti.com
PACKAGE OUTLINE
3X 2.67
2.03
5.21
4.44
5.34
4.32
3X
12.7 MIN
2X 1.27 0.13
3X 0.55
0.38
4.19
3.17
3.43 MIN
3X 0.43
0.35
(2.54)
NOTE 3
2X
2.6 0.2
2X
4 MAX
SEATING
PLANE
6X
0.076 MAX
(0.51) TYP
(1.5) TYP
TO-92 - 5.34 mm max heightLP0003A
TO-92
4215214/B 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Lead dimensions are not controlled within this area.
4. Reference JEDEC TO-226, variation AA.
5. Shipping method:
a. Straight lead option available in bulk pack only.
b. Formed lead option available in tape and reel or ammo pack.
c. Specific products can be offered in limited combinations of shipping medium and lead options.
d. Consult product folder for more information on available options.
EJECTOR PIN
OPTIONAL
PLANE
SEATING
STRAIGHT LEAD OPTION
321
SCALE 1.200
FORMED LEAD OPTION
OTHER DIMENSIONS IDENTICAL
TO STRAIGHT LEAD OPTION
SCALE 1.200
www.ti.com
EXAMPLE BOARD LAYOUT
0.05 MAX
ALL AROUND
TYP
(1.07)
(1.5) 2X (1.5)
2X (1.07)
(1.27)
(2.54)
FULL R
TYP
( 1.4)0.05 MAX
ALL AROUND
TYP
(2.6)
(5.2)
(R0.05) TYP
3X ( 0.9) HOLE
2X ( 1.4)
METAL
3X ( 0.85) HOLE
(R0.05) TYP
4215214/B 04/2017
TO-92 - 5.34 mm max heightLP0003A
TO-92
LAND PATTERN EXAMPLE
FORMED LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X
SOLDER MASK
OPENING
METAL
2X
SOLDER MASK
OPENING
123
LAND PATTERN EXAMPLE
STRAIGHT LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X
METAL
TYP
SOLDER MASK
OPENING
2X
SOLDER MASK
OPENING
2X
METAL
12 3
www.ti.com
TAPE SPECIFICATIONS
19.0
17.5
13.7
11.7
11.0
8.5
0.5 MIN
TYP-4.33.7
9.75
8.50
TYP
2.9
2.4 6.75
5.95
13.0
12.4
(2.5) TYP
16.5
15.5
32
23
4215214/B 04/2017
TO-92 - 5.34 mm max heightLP0003A
TO-92
FOR FORMED LEAD OPTION PACKAGE
www.ti.com
PACKAGE OUTLINE
C
0.575 MAX
0.15
0.11
1
TYP
1
TYP
8X 0.18
0.16
0.5
TYP
0.5
TYP
B E A
D
4215100/B 07/2016
DSBGA - 0.575 mm max heightYPB0008
DIE SIZE BALL GRID ARRAY
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
SYMM
SYMM
BALL A1
CORNER
SEATING PLANE
BALL TYP 0.05 C
12
0.015 C A B
A
B
C
3
SCALE 9.000
D: Max =
E: Max =
1.337 mm, Min =
1.337 mm, Min =
1.276 mm
1.276 mm
www.ti.com
EXAMPLE BOARD LAYOUT
8X ( 0.16)
( 0.16)
METAL 0.05 MAX
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
( 0.16)
SOLDER MASK
OPENING
0.05 MIN
(0.5) TYP
(0.5)
TYP
4215100/B 07/2016
DSBGA - 0.575 mm max heightYPB0008
DIE SIZE BALL GRID ARRAY
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
See Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
SOLDER MASK DETAILS
NOT TO SCALE
12
A
B
SYMM
SYMM
LAND PATTERN EXAMPLE
SCALE:40X
C
3
NON-SOLDER MASK
DEFINED
(PREFERRED) SOLDER MASK
DEFINED
www.ti.com
EXAMPLE STENCIL DESIGN
8X ( 0.3) (R0.05) TYP
METAL
TYP
(0.5) TYP
(0.5) TYP
4215100/B 07/2016
DSBGA - 0.575 mm max heightYPB0008
DIE SIZE BALL GRID ARRAY
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
12
A
B
C
3
SYMM
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.125mm THICK STENCIL
SCALE:50X
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party
intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages,
costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (https:www.ti.com/legal/termsofsale.html) or other applicable terms available either
on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s
applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021, Texas Instruments Incorporated
