CMOS IC
UnderDevelopment
Ver:0.95
J1603 January 16, 2003 Tsuchiya 1/14
Overview
The LC573706A is a CMOS 4-bit microcontroller that operates on low voltage and very low power consumption. It
also contains 6K-byte ROM, 256 × 4 bits RAM, LCD drivers and 1/100sec. chronograph function.
Features
(1) RO M: 6,144 × 8 b its
(2) RAM : 256 × 4 b it s
(3) Cycle Time
122µs: VDD = 2.4V to 3.6V
(4) Input / Output Terminals
- Input / Output ports: 4 terminals
- Input ports: 6 terminals (S-port : 4 terminals, M-port : 2 terminals)
- LCD common output ports: 4 terminals
- LCD segment output ports: 40 terminals
* Key m a t ri x ( 4×4)
Output p ort s: Using o utp ut p o rt s b y selec ti ng P c hanne l o p en dr ai n.
Input ports: Using S-port (4 terminals).
* Serial communication: Handled by software program
Ready signal: P11 terminal (Using as output port)
Data output (DAOUT): P10 terminal (Using as output port)
Data input (DAIN): P01 terminal(Using as input port)
Clock (CLK): M port (Starts communication with “H” input)
4-Bit Microcontrolle
r
w ith 6K-B yte ROM, 256 × 4 bits RAM and LCD
Di
LC573706
A
LC573706A
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(5) LCD driver
- Display duty: 1/3, 1/4 duty
- Display bias: 1/2, 1/3 bias
- Built-in step-up / step-down circuit
- LCD d r i ver
Segment output terminals: 40 terminals
Common output terminals: 4 terminals
(6) Buzzer output
- 2kHz/4kHz buzzer output is possible.
- Modulation output is possible.
(7) Base timer
- Generates an overflow every 500ms for a clock application.
(8) 1/ 10 0 sec. chr o no gr ap h fu nc tio n
- Start/stop/lap: Handled by software program
- Display segments fixed to 1/100sec.
(8) HALT rel e as e
- Five vect or s
1. 15-bit base timer (500ms overflow output)
2. 15-b it base ti mer (o utp ut e ve r y 32 ms)
3. S-port
4. M-p ort
5. 1/10 sec. pulse
(9) Stand-by mode
- HALT mode
The program operation will be stopped in this mode. This mode is released by system reset or the triggering
of any of the 5 vectors for HALT release mentioned above.
(10) S ystem rese t
- RES terminal
(11) Oscillation
32.768kHz crystal oscillation
(12) Power supply
- VDD2 = 2.4V to 3.6V
- VDD1 = 1.2V to 1.8V, VDD3 = 3.6V to 5.4V (LCD power supply)
(13) Shi p pi ng fo r m
- Chip
(14) T he deve lo pment to o l
- Emulat o r: TB - 57 370 6 + EV A5 7
LC573706A
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Pad Assignment
Pad pit ch: 120 µs
Pad size: 100 µs
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
M1
P00
P01
P10
P11
VDC
CUP1
CUP2
VDD1
VDD3
COM1
COM2
COM3
COM4
SEG40
SEG39
SEG38
SEG37
M2
S1
S2
S3
S4
ALM
RES
T3
TST
HZ32
VDD2
VDDX
XT2
XT1
VSSX
VSS
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17161514131211109876 5 4 3 21
LC573706A
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Pad Name and Coordinates
Coordinates Coordinates Pad
No. Pad
Name Xµm Yµm Pad
No. Pad
Name Xµm Yµm
1 SEG36 -1081 -1365 47 ALM -321 1365
2 SEG35 -961 -1365 48 S4 -441 1365
3 SEG34 -841 -1365 49 S3 -561 1365
4 SEG33 -721 -1365 50 S2 -681 1365
5 SEG32 -601 -1365 51 S1 -801 1365
6 SEG31 -481 -1365 52 M2 -921 1365
7 SEG30 -361 -1365 53 M1 -1041 1365
8 SEG29 -241 -1365 54 P00 -1222 1037
9 SEG28 -121 -1365 55 P01 -1222 917
10 SEG27 -1 -1365 56 P10 -1222 797
11 SEG26 119 -1365 57 P11 -1222 677
12 SEG25 239 -1365 58 VDC -1222 527
13 SEG24 359 -1365 59 CUP1 -1222 377
14 SEG23 479 -1365 60 CUP2 -1222 257
15 SEG22 599 -1365 61 VDD1 -1222 107
16 SEG21 719 -1365 62 VDD3 -1222 -49
17 SEG20 839 -1365 63 COM1 -1222 -202
18 SEG19 959 -1365 64 COM2 -1222 -323
19 SEG18 1222 -1141 65 COM3 -1222 -442
20 SEG17 1222 -1021 66 COM4 -1222 -562
21 SEG16 1222 -901 67 SEG40 -1222 -682
22 SEG15 1222 -781 68 SEG39 -1222 -802
23 SEG14 1222 -661 69 SEG38 -1222 -922
24 SEG13 1222 -541 70 SEG37 -1222 -1042
25 SEG12 1222 -421
26 SEG11 1222 -301
27 SEG10 1222 -181
28 SEG9 1222 -61
29 SEG8 1222 59
30 SEG7 1222 179
31 SEG6 1222 299
32 SEG5 1222 419
33 SEG4 1222 539
34 SEG3 1222 659
35 SEG2 1222 779
36 SEG1 1222 899
37 VSS 1259 1365
38 VSSX 1119 1365
39 XT1 999 1365
40 XT2 879 1365
41 VDDX 759 1365
42 VDD2 579 1365
43 HZ32 459 1365
44 TST 339 1365
45 T3 219 1365
46 RES -51 1365
The pad coordinates are such that the chip center is taken as the origin and the values for (X, Y) represent the
coordinates of the center point of each pad.
LC573706A
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System Block Diagram
IR
ROM
PC
PLA
ALU
AC
TMP
DPL
RAM
HALTmodecontrol
Stand-bycontrol
Stack
P0port
P1port
Mport
Sport
LCDdriver
Strobepointer
Basetimer
DPH
Clock
generator
X'tal
1/100sec
chronocounter
LC573706A
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LC573706A Terminal Description
Name Pin No. I/O Function Description Option
VSS 37, 38 - Power terminal (−) -
VDD2 42 - Power terminal (+).
Insert Capacitor between VDD2 and VSS -
CUP1 59 - Capacitor conn ect in g ter minal s for step-up / stop down -
CUP2 60 - Capacitor conn ect in g ter minal s for step-up / stop down
VDD1,VDD3 61, 6 2 - P ower su p p l y for dr i v i n g LC D -
VDC 58 - Powe r sup p l y fo r in t e rn al logi c ci r cu i t -
P0
P00 - P01
54, 55 I/O •2-bit I/O port
•I/O programmable in port unit
•In input mode, built-in pull-up resistor: ON
•While in output mode with P-ch OD selected, a built-in
circuit inhibits the input terminal from floating.
Out p u t fo rm
CMOS/
Pch-OD (No t e 1 )
P1
P10 - P11
56, 57 I/O •2-bit I/O port
•I/O programmable in port unit
•In input mode, built-in pull-up resistor: ON
•While in output mode with P-ch OD selected, a built-in
circuit inhibits the input terminal from floating.
Out p u t fo rm
CMOS/
Pch-OD (No t e 1 )
S port
S1 - S4
51 -
48 I •4-bit input port
•Input for HALT release
•Built-in programmable pull-down resistor
M port
M1 - M2
53, 52 I •2-bit input port
•Input for HALT release
•Built-in programmable pull-down resistor
ALM 47 O •Output port
•Alarm output only terminal
•4kHz and 2kHz signals output by instructions SAS and
TME L
COM1 -
COM4 63 -
66 O LCD ou tpu t t e r min a l s for co m mo n -
SEG1 -
SEG40 36 - 1
70 -
67
O LCD output terminals for segment
RES 46 I •Reset
•Built-in pull-down resistor -
T3 45 O •Test terminal
•This terminal should be left unconnected. -
HZ32 43 •Test terminal
•This terminal should be left unconnected. -
XT1 39 I Input for 32.768kHz crystal oscillation -
XT2 40 O Output for 32. 768 kHz cr ystal o sci llat io n -
Note 1: P-ch OD: P channel open drain
Port
’
s option is specified for each port individually.
* A state of port at initial
Name I/O Pull-up / Pull-down Resistor Status
P0, 1 I Pull-up resistor
S, M_PORT I Programmable pull-up resistor ON
Name Output Level
COM1-COM4 VSS (display OFF)
SEG1-SEG40 VSS (display OFF)
LC573706A
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1. Absolu te Maxi mum Ratings / Ta = 25 °C, VSS = 0V
Limits Parameter Symbol Pins Conditions
VDD[V] Min. Typ. Max. Unit
Suppl y vol tage VDDMAX VDD2 -0.3 - +4.0
Input vo l tage VI(1) P ort s S, M,
RES -0.3 -
VDD+0.3
VO(1) C1-C4, S1-S40
CUP1 (1/3 bias) -0.3 -
3/2VDD
+0.3
Output voltage
VO(2) C1-C4, S1-S40
CUP1 (1/2 bias)
CUP2, ALM
-0.3 -
VDD+0.3
I/O voltage VI O(1) Por ts 0, 1 -0 .3 - VDD+0.3
V
Peak
output
current
IOPH(1) • Ports 0, 1
•ALM For each pin -1
High
level
output
current Total
output
current
ΣIOAH(1) • Ports 0, 1
• ALM The to t al o f
all pins -10
Peak
output
current
IOPL(1) • Ports 0, 1
• ALM For each pin 1
Low
level
output
current Total
output
current
ΣIOAL(1) • Ports 0, 1
• C1-C4, S1-S40
• ALM
The to t a l o f
all pins. 10
mA
Operating
temperature range Topg -30 - 70
Storage
temperature range Tstg -40 - 125
°C
LC573706A
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2. Rec omm e nde d Op era t in g Ra nge / Ta =-30 °C to + 70 °C , VSS = 0V
Limits Parameter Symbol Pins Conditions
VDD2[V] Min. Typ. Max. Unit
Operating
supply
voltage
range
VDD(1) VDD2 2.4 3.6
Hold voltage VHD VDD2 RAM’s and
the register’s
data are kept
in HOLD
mode.
2.0 3.6
1/2 bias 2.4 - 3.6 0 VDD Supply
voltage for
LCD
VSUP VDD1,VDD3 1/3 bias 2.4 - 3.6 0 3/2VDD
VIH(1) Ports 0, 1 Input mode 2.4 - 3.6 0.7VDD VDD
VIH(2) Ports S, M 2.4 - 3.6 0.7VDD VDD
High level
inpu t volt ag e VIH(3) RES (Schumitt) 2.4 - 3.6 0.7VDD VDD
VIL(1 ) Port s 0, 1 Input mode 2.4 - 3.6 VSS 0.2VDD
VIL(2 ) Port s S, M 2.4 - 3.6 VSS 0.3VDD
Low level
inpu t volt ag e VIL(3) RES (Schumitt) 2.4 - 3.6 VSS 0.3VDD
V
Operation
cycle time Tcyc 2.4 - 3.6 122 µs
Oscillation
frequency
range
(Note 2)
FXtal XT1, XT2 32.768kHz
crystal
oscillation
Refer to Fig.
1
2.4 - 3.6 32.768 kHz
Note 2: Refer to Table 1 about oscillation constant.
LC573706A
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3. Electrical Characteristics / Ta=-30°C to + 70°C, VSS=0V
Limits Parameter Symbol Pins Conditions VDD2[V] Min. Typ. Max. Unit
High level
input current IIH(1) Ports S, M Programmable pull-down
Tr OFF, VIN=VDD 2.4 - 3.6 1
Low level
input current IIL(1) Ports S, M Programmable pull-down
Tr OFF, VIN=VSS 2.4 - 3.6 -1
µA
High level
output volt age VOH(1) Ports 0, 1,
ALM IOH=-200µA 2.4 - 3.6 VDD-0.2
VOH(2) SEG1-SEG40
(LCD driver) IOH=-0.4µA
1/2 bias 2.4 - 3.6 VDD-0.2
VOH(3) SEG1-SEG40
(LCD driver) IOH=-0.4µA
1/3 bias 2.4 - 3.6 3/2VDD
-0.2
VOH(4) COM1-
COM4 IOH=-4µA
1/2 bias 2.4 - 3.6 VDD-0.2
VOH(5) COM1-
COM4 IOH=-4µA
1/3 bias 2.4 - 3.6 3/2VDD
-0.2
VOM(1) SEG1-SEG40
(LCD driver) IOL=0.4µA, IOH=-0.4µA
1/3 bias 2.4 - 3.6 VDD-0.2 VDD+0.2
VOM(2) SEG1-SEG40
(LCD driver) IOL=0.4µA, IOH=-0.4µA
1/3 bias 2.4 - 3.6 1/2VDD
-0.2 1/2VDD
+0.2
VOM(3) COM1-
COM4 IOL=4µA, IOH=-4µA 2.4 - 3.6 1/2VDD
-0.2 1/2VDD
+0.2
Middle level
output volt age
VOM(4) COM1-
COM4 IOL=4µA, IOH=-4µA
1/3 bias 2.4 - 3.6 VDD-0.2 VDD+0.2
Low level
output volt age VOL(1) CM OS output
of ports 0, 1,
ALM
IOL=200µA 2.4 - 3.6 0.2
V
VOL(2) SEG1-SEG40
(LCD driver) IOL=0.4µA 2.4 - 3.6 0.2
VOL(3) COM1-
COM4 IOL=4µA 2.4 - 3.6 0.2
Pull-up
resistor Rpu P ort s 0, 1 VIN=0.9V DD 2.4 - 3.6 50 100 200
Pull-down
resistor Rpd P ort s S, M VIN=0.1V DD 2.4 - 3.6 50 100 200
kΩ
Hysteresis
voltage VHIS Ports 0, 1
RES Out put disab l e 2.4 - 3.6 0.1V DD V
Pin
capacitance CP All pins f=1MHz
All pins except the
measured terminal:
VIN=VSS
Ta=25°C
2.4 - 3.6 10 pF
LC573706A
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4. Pulse Input Condition / Ta=-30°C to + 70°C, VSS=0V
Limit Parameter Symbol Pin Condition VDD2[V] Min. Typ. Max. Unit
High/lo w
level
pulse width
tPIL(4) RES Reset acceptabl e 2.4 - 3.6 10 µs
5. Sample Current Dissipation Characteristics / Ta=-30°C to + 70°C, VSS=0V
The sample current dissipation characteristics are the measurement result of Sanyo provided evaluation board. The
currents though the output transistor and the pull-up or pull-down MOS transistors are ignored.
Limits Parameter Symbol Pins Conditions
VDD2[V] Min. Typ. Max. Unit
IDDOP
(during normal operation) 1.5
10 Current
dissipation IDDHALT
(in HALT mode)
VDD Ta50°C
32.768 kHz crystal
oscillation
Refer to Figure 2.
2.4 - 3.6
0.6 3
µA
6. LCD Power Vol ta ge Char acte r istic s / Ta =-30° C to + 70 °C, VSS=0V
Limits Parameter Symbol Pins and conditions VDD2[V] Min. Typ. Max.
Unit
VDD1 ou tput vol tage VDD1 2.9 0.45V D D 0.5VDD 0.55VDD
VDD3 output voltage VDD3 LCD ON
1/3 bias
Refer to Figure 2. 2.9 1.35VDD 1.50VDD 1.65VDD
V
Table 1 Crystal Oscillation Recommended Constant
Frequency Manufacturer Oscillator C1 C2
CITIZEN CFS-308 18pF 18pF 32.768 kHz Xt al osci llation SEIKO DT-VT-200 18pF 18pF
(C1 must meet J level tolerances (±5%) or if high accuracy is not required, then C1 must meet K level tolerances
(±10%) and SL characteristics.)
Notes:
∗
Since the circuit pattern affects the os cillation frequency, place the oscillation-related parts
as close to the oscillation pins as possible with the shortest possible pattern length.
∗
If you use other oscillators herein, we provide no guarantee for the characteristics
LC573706A
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Recommended Oscillation Circuit and Characteristics
The oscillation circuit characteristics in the table below are based on the following conditions:
• Recommended circuit parameters are verified by an oscillator manufacturer using a Sanyo provided oscillation
evaluation board.
• The characteristics are the results of the evaluation with the recommended circuit parameters connected externally.
Recommended Oscillation Circuit Parameters and Character istics (Ta = 0°C to +50°C)
Oscillation
stabilizing time (*)
Frequency Manufacturer Oscillator Recommended
circuit parameter
Operating
supply volta ge
range Typ. Max.
TssX’tal
SII DT-VT-200 C1=18pF
C2=18pF 2.4V - 3.6V 1.00s 3.00s
TssX’tal
32.7 68kHz CITIZEN WATCH CO.,
LTD. CFS-308 C1=18pF
C2=18pF 2.4V - 3.6V 1.00s 3.00s
(*) Note: The oscillation stabilizing time period is the time until the oscillation becomes stable after the VDD
becomes higher than the minimum ope rating voltage.
The oscillation circuit characteristics may differ by applications. For further assistance, please contact with the
oscillator manufacturer with the follo wing notes in your mind.
• Since the oscillation frequency precision is affected by wiring capacity of the application board, etc., adjust the
oscillation frequency on the production board.
Since the oscillation circuit characteristics are affected by the noise, wiring capacity, etc., refer to the following
notices.
• The distance between the clock I/O terminal and external parts sho uld be as sho rt a s possib le.
• The capacitors’ VSS should be allocated close to the microcontroller’s GND terminal and be away from other
GND.
• The signal lines with rapid state changes or the signal line with large amplitude such as middle withsta nd voltage
port or LCD driver output should be allocated away from the clock oscillation circuit.
• The signal lines with large current should be allocated away from the oscillation circuit.
LC573706A
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Figure 1 Crystal Oscillation Circuit
Figure 2 Current Dissipation Measurement Circuit/VDD1 and VDD3 Terminals Output
Volt age Meas urement Ci rc uit
Note:
The specification above indicates the operational characteristics of a die that has been packaged
by SANYO into a QIC80 package. If you purchase this product in die for m and use a third party
to package the die, then please note that the operational characteristics may vary depending on
the packaging techniques that are used.
C1
XT1
XT2
X’tal
C2
V
SS
DUT
V
DD3
CUP1
1
CUP2
XT1
XT2
V
DD2
V
DD1
C1
C2
V
DC
LC573706A
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LC573706A
PS 14/14
This catalog provies information as of Nothi ng, Nothing. Speci fications and information herein are subject to change
without notic e
