PRODUCT DATA SHEET
PAC5222
Power Application Controller®
Multi-Mode Power ManagerTM
Configurable Analog Front EndTM
Application Specific Power DriversTM
Arm® Cortex®-M0 Controller Core
www.active-semi.com
Copyright © 2019 Active-Semi, Inc.
PAC5222
Power Application Controller
TABLE OF CONTENTS
1. General Description.......................................................................................................................................... 7
2. PAC Family Applications................................................................................................................................... 8
3. Product Selection Summary.............................................................................................................................. 9
4. Ordering Information......................................................................................................................................... 9
5. Features.......................................................................................................................................................... 10
6. Absolute Maximum Ratings............................................................................................................................. 11
7. Architectural Block Diagram............................................................................................................................ 12
8. Pin Configuration............................................................................................................................................. 13
8.1. PAC5222QM........................................................................................................................................... 13
9. Pin Description................................................................................................................................................ 14
10. Multi-Mode Power Manager (MMPM)...........................................................................................................20
10.1. Features................................................................................................................................................ 20
10.2. Block Diagram....................................................................................................................................... 20
10.3. Functional Description........................................................................................................................... 20
10.3.1. Multi-Mode Switching Supply (MMSS) Controller..........................................................................20
10.3.2. Linear Regulators.......................................................................................................................... 22
10.3.3. Power Up Sequence..................................................................................................................... 22
10.3.4. Hibernate Mode............................................................................................................................. 23
10.3.5. Power and Temperature Monitor...................................................................................................23
10.3.6. Voltage Reference......................................................................................................................... 23
10.4. Electrical Characteristics....................................................................................................................... 24
10.5. Typical Performance Characteristics..................................................................................................... 27
11. Configurable Analog Front End (CAFE)......................................................................................................... 28
11.1. Block Diagram....................................................................................................................................... 28
11.2. Functional Description........................................................................................................................... 29
11.2.1. Differential Programmable Gain Amplifier (DA).............................................................................29
11.2.2. Single-Ended Programmable Gain Amplifier (AMP)......................................................................29
11.2.3. General Purpose Comparator (CMP)............................................................................................ 29
11.2.4. Phase Comparator (PHC).............................................................................................................29
11.2.5. Protection Comparator (PCMP)..................................................................................................... 30
11.2.6. Analog Output Buffer (BUF)...........................................................................................................30
11.2.7. Analog Front End I/O (AIO)...........................................................................................................30
11.2.8. Push Button (PBTN)...................................................................................................................... 30
11.2.9. HP DAC and LP DAC.................................................................................................................... 30
11.2.10. CLKOUT...................................................................................................................................... 30
11.2.11. ADC Pre-Multiplexer.................................................................................................................... 31
11.2.12. Configurable Analog Signal Matrix (CASM).................................................................................31
11.2.13. Configurable Digital Signal Matrix (CDSM)..................................................................................31
11.3. Electrical Characteristics....................................................................................................................... 32
11.4. Typical Performance Characteristics.....................................................................................................36
12. Application Specific Power Drivers (ASPD)...................................................................................................38
12.1. Features................................................................................................................................................ 38
12.2. Block Diagram....................................................................................................................................... 38
12.3. Functional Description........................................................................................................................... 38
12.3.1. Low-Side Gate Driver.................................................................................................................... 39
12.3.2. High-Side Gate Driver................................................................................................................... 39
12.3.3. High-Side Switching Transients..................................................................................................... 39
12.3.4. Power Drivers Control................................................................................................................... 40
12.3.5. Gate Driver Fault Protection.......................................................................................................... 40
12.4. Electrical Characteristics....................................................................................................................... 41
12.5. Typical Performance Characteristics..................................................................................................... 42
PAC5222
Power Application Controller
13. ADC with Auto-Sampling Sequencer............................................................................................................. 44
13.1. Block Diagram....................................................................................................................................... 44
13.2. Functional Description........................................................................................................................... 45
13.2.1. ADC............................................................................................................................................... 45
13.2.2. Auto-Sampling Sequencer............................................................................................................45
13.2.3. EMUX Control............................................................................................................................... 45
13.3. Electrical Characteristics....................................................................................................................... 45
14. Memory System............................................................................................................................................ 47
14.1. Features................................................................................................................................................ 47
14.2. Block Diagram....................................................................................................................................... 47
14.3. Functional Description........................................................................................................................... 48
14.3.1. Program and Data FLASH............................................................................................................ 48
14.3.2. SRAM............................................................................................................................................ 48
14.4. Electrical Characteristics....................................................................................................................... 49
15. Clock Control System.................................................................................................................................... 50
15.1. Features................................................................................................................................................ 50
15.2. Block Diagram....................................................................................................................................... 50
15.3. Functional Description........................................................................................................................... 51
15.3.1. Free Running Clock (FRCLK)....................................................................................................... 51
15.3.2. Fast Clock (FCLK)......................................................................................................................... 51
15.3.3. High-Speed Clock (HCLK)............................................................................................................ 51
15.3.4. Auxiliary Clock (ACLK).................................................................................................................. 51
15.3.5. Clock Gating.................................................................................................................................. 51
15.3.6. Ring Oscillator (ROSC)................................................................................................................. 51
15.3.7. Trimmed 4MHz RC Oscillator........................................................................................................ 51
15.3.8. Internal Slow RC Oscillator........................................................................................................... 51
15.3.9. Crystal Oscillator Driver................................................................................................................ 51
15.3.10. External Clock Input.................................................................................................................... 51
15.3.11. PLL.............................................................................................................................................. 51
15.4. Electrical Characteristics....................................................................................................................... 52
16. ARM® Cortex®-M0 Microcontroller Core........................................................................................................ 53
16.1. Features................................................................................................................................................ 53
16.2. Block Diagram....................................................................................................................................... 53
16.3. Functional Description........................................................................................................................... 53
16.4. Electrical Characteristics....................................................................................................................... 54
16.5. Typical Performance Characteristics..................................................................................................... 54
17. I/O Controller................................................................................................................................................. 55
17.1. Features................................................................................................................................................ 55
17.2. Block Diagram....................................................................................................................................... 55
17.3. Functional Description........................................................................................................................... 56
17.4. GPIO Current Injection.......................................................................................................................... 56
17.5. Electrical Characteristics....................................................................................................................... 57
18. Serial Interface.............................................................................................................................................. 58
18.1. Block Diagram....................................................................................................................................... 58
18.2. Functional Description........................................................................................................................... 58
18.2.1. I2C Controller................................................................................................................................. 58
18.3. UART Controller.................................................................................................................................... 59
18.4. SPI Controller........................................................................................................................................ 59
18.5. Dynamic Characteristics....................................................................................................................... 60
19. Timers........................................................................................................................................................... 64
19.1. Block Diagram....................................................................................................................................... 64
19.2. Functional Description........................................................................................................................... 65
19.2.1. Timer A.......................................................................................................................................... 65
19.2.2. Timer B.......................................................................................................................................... 65
PAC5222
Power Application Controller
19.2.3. Timer C......................................................................................................................................... 65
19.2.4. Timer D......................................................................................................................................... 66
19.2.5. Watchdog Timer............................................................................................................................ 66
19.2.6. SOC Bus Watchdog Timer............................................................................................................66
19.2.7. Wake-Up Timer............................................................................................................................. 66
19.2.8. Real-Time Clock............................................................................................................................ 66
20. Thermal Characteristics................................................................................................................................ 67
21. Application Examples.................................................................................................................................... 68
22. Package Outline and Dimensions.................................................................................................................69
22.1. TQFN66-48 Package Outline and Dimensions.....................................................................................69
23. Legal Information.......................................................................................................................................... 71
PAC5222
Power Application Controller
LIST OF TABLES
Table 1. Product Selection Summary..................................................................................................................... 9
Table 2. Ordering Information................................................................................................................................. 9
Table 3. Absolute Maximum Ratings.................................................................................................................... 11
Table 4. Multi-Mode Power Manager and System Pin Description.......................................................................14
Table 5. Configurable Analog Front End Pin Description...................................................................................... 15
Table 6. Application Specific Power Drivers Pin Description................................................................................16
Table 7. I/O Ports Pin Description........................................................................................................................ 16
Table 8. I/O Ports Pin Description (Continued).....................................................................................................17
Table 9. I/O Ports Pin Description (Continued).....................................................................................................18
Table 10. Multi-Mode Switching Supply Controller Electrical Characteristics.......................................................24
Table 11. Linear Regulators Electrical Characteristics.........................................................................................26
Table 12. Power System Electrical Characteristics..............................................................................................26
Table 13. Differential Programmable Gain Amplifier (DA) Electrical Characteristics............................................32
Table 14. Single-Ended Programmable Gain Amplifier (AMP) Electrical Characteristics.....................................32
Table 15. General Purpose Comparator (CMP) Electrical Characteristics...........................................................33
Table 16. Phase Comparator (PHC) Electrical Characteristics.............................................................................33
Table 17. Protection Comparator (PCMP) Electrical Characteristics....................................................................33
Table 18. Analog Output Buffer (BUF) Electrical Characteristics..........................................................................33
Table 19. Analog Front End I/O (AIO) Electrical Characteristics...........................................................................34
Table 20. Push Button (PBTN) Electrical Characteristics.....................................................................................34
Table 21. HP DAC and LP DAC Electrical Characteristics...................................................................................34
Table 22. CLKOUT Electrical Characteristics.......................................................................................................34
Table 23. Power Driver Resources by Part Numbers...........................................................................................38
Table 24. Microcontroller Port and PWM to Power Driver Mapping......................................................................40
Table 25. Power Driver Propagation Delay.......................................................................................................... 40
Table 26. Gate Drivers Electrical Characteristics................................................................................................. 41
Table 27. ADC and Auto-Sampling Sequencer Electrical Characteristics.............................................................45
Table 28. Memory System Electrical Characteristics............................................................................................49
Table 29. Clock Control System Electrical Characteristics...................................................................................52
Table 30. Microcontroller and Clock Control System Electrical Characteristics....................................................54
Table 31. I/O Controller Electrical Characteristics................................................................................................57
Table 32. Serial Interface Dynamic Characteristics..............................................................................................60
Table 33. I2C Dynamic Characteristics................................................................................................................. 61
Table 34. SPI Dynamic Characteristics................................................................................................................ 63
Table 35. Thermal Characteristics........................................................................................................................ 67
PAC5222
Power Application Controller
LIST OF FIGURES
Figure 1-1. Power Application Controller................................................................................................................ 7
Figure 2-1. Simplified Application Diagram............................................................................................................ 8
Figure 7-1. Architectural Block Diagram............................................................................................................... 12
Figure 8-1. PAC5222QM Pin Configuration (TQFN66-48 Package)....................................................................13
Figure 9-1. Power Supply Bypass Capacitor Routing..........................................................................................19
Figure 10-1. Multi-Mode Power Manager............................................................................................................. 20
Figure 10-2. Buck Mode....................................................................................................................................... 21
Figure 10-3. SEPIC Mode.................................................................................................................................... 21
Figure 10-4. Linear Regulators............................................................................................................................. 22
Figure 10-5. Power Up Sequence........................................................................................................................ 23
Figure 11-1. Configurable Analog Front End........................................................................................................28
Figure 12-1. Application Specific Power Drivers................................................................................................... 38
Figure 12-2. Typical Gate Driver Connections......................................................................................................39
Figure 12-3. High-Side Switching Transients and Optional Circuitry....................................................................40
Figure 13-1. ADC with Auto-Sampling Sequencer................................................................................................44
Figure 14-1. Memory System............................................................................................................................... 47
Figure 15-1 Clock Control System....................................................................................................................... 50
Figure 16-1. Arm Cortex-M0 Microcontroller Core................................................................................................53
Figure 17-1. I/O controller.................................................................................................................................... 55
Figure 18-1. Serial Interface................................................................................................................................. 58
Figure 18-2. I2C Timing Diagram.......................................................................................................................... 62
Figure 18-3. SPI Timing Diagram......................................................................................................................... 63
Figure 19-1. Timers A, B, C, and D...................................................................................................................... 64
Figure 19-2. SOC Bus Watchdog and Wake-Up Timer........................................................................................65
Figure 19-3. Real-Time Clock and Watchdog Timer.............................................................................................65
Figure 21-1. 3-phase Motor Drive Using PAC5222 (Simplified Diagram).............................................................68
PAC5222
Power Application Controller
1. GENERAL DESCRIPTION
!"!#$%#& '(!)#)))!'*((#"!#! ®+,('"! !!
#(!#%#-')"!#'(*#.!!# %!((#" '#" '/#(%!
((#"!#"! #!!01-%®!.®0#!%#""!"*#!"!#$%#& ((#!'
(!!('# 0!#0' * 00 )# 2! 3'0 ' ((#"!# $("#)#" *
4# 0!)%!% !"%("!%#""! '(*'(( ((#"!# !% #)%
'##!(* ((!%!"!%#""!)! (!56)%'''27$1'856)
$0%%# ('#!µs !'##!"!+4,*#!'! %(# /" 9:9
;:< ).#""5 " !#% !#"=0#' ##!)"
0!#0'*0+000,(#' >#?))#"#!(*%%! !#)%!#(!(
)(* " ;!)! ")#%!#%' *#!"# (("!"()(!##"5$3;
%''(!)#!'! ((# ((#"!#$("#)#"*4# +$4,#!
(*'# ' #')"!! !)"!((#"!# #"'#)#'1#'( #!#!
(*%'+;0,'(( '##)#2!3'+23,"%(# '#))!#
(%%#%(#)# #''(%%#%(#)# "%(! '##!!"! '
;:< )(%%'#!""!# # %(#)'"5%(#)#"!#' %#!#)%!#(
#(! # !! %' '%#""!*#')"%("!((#"!# *#!#
#!!'(*%%!'##)'"5'"!)4 (((!9
# # # 8(# .%% @2A ("5 )%##"' ) (!%
(!#%#-'!*5*#!'#))!!!'(#%((#"!#
B
Figure 1-1. Power Application Controller
50MHz ARM® CORTEX®-M0
MICROCONTROLLER CORE & MEMORY
1-cycle 32-bit multiplier,
24-bit RTC, 24-bit WDT, 24-bit SysTick, NVIC,
FLASH & SRAM
50MHz ARM® CORTEX®-M0
MICROCONTROLLER CORE & MEMORY
1-cycle 32-bit multiplier,
24-bit RTC, 24-bit WDT, 24-bit SysTick, NVIC,
FLASH & SRAM
DATA ACQUISITION
& SEQUENCER
10-bit 1µs ADC,
dual auto-sampling
sequencer
DATA ACQUISITION
& SEQUENCER
10-bit 1µs ADC,
dual auto-sampling
sequencer
PWM ENGINE
4 16-bit timers,
14 channels,
HW dead-time control,
10ns resolution control
PWM ENGINE
4 16-bit timers,
14 channels,
HW dead-time control,
10ns resolution control
SERIAL
INTERFACE
SPI, I2C, UART
SERIAL
INTERFACE
SPI, I2C, UART
APPLICATION
SPECIFIC POWER
DRIVERS
High-side & low-side
gate drivers
APPLICATION
SPECIFIC POWER
DRIVERS
High-side & low-side
gate drivers
MULTI-MODE
POWER MANAGER
AC/DC, DC/DC,
linear regulators
MULTI-MODE
POWER MANAGER
AC/DC, DC/DC,
linear regulators
CONFIGURABLE ANALOG FRONT END
3 Differential PGAs,
4 Single-ended PGAs,
10 Comparators,
2 DACs (10-bit & 8-bit),
Temperature monitor
CONFIGURABLE ANALOG FRONT END
3 Differential PGAs,
4 Single-ended PGAs,
10 Comparators,
2 DACs (10-bit & 8-bit),
Temperature monitor
PAC5222
Power Application Controller
2. PAC FAMILY APPLICATIONS
Power Tools (up to 24V)
12V Server Fans
Embedded Speed Controllers (ESCs)
8
Figure 2-1. Simplified Application Diagram
50MHz Arm® CORTEX®-M0
MICROCONTROLLER CORE
& MEMORY
DATA
ACQUISITION
&
SEQUENCER
PWM
ENGINE
SERIAL
INTERFACE
APPLICATION
SPECIFIC
POWER
DRIVERS
MULTI-MODE
POWER
MANAGER
CONFIGURABLE
ANALOG FRONT END
M
BUCK/
SEPIC
SPI/I2C/UART
MONITORING
SIGNALS
PAC52xx
PAC5222
Power Application Controller
3. PRODUCT SELECTION SUMMARY
Table 1. Product Selection Summary
PART
NUMBER
PIN
PKG
POWER
MANAGER
CONFIGURABLE
ANALOG FRONT
END
APPLICATION SPECIFIC
POWER DRIVERS MICROCONTROLLER
PRIMARY
APPLICATIO
N
INPUT VOLTAGE
MULTI-MODESW
DIFF-PGA
PGA
COMPARATOR
DAC
ADC CHANNEL
POWER DRIVER
PWM CHANNEL
FAULTPROTECT
SPEED (MHz)
FLASH (kB)
SRAM (kB)
GPIO
INTERFACE
XTAL
PAC5222
8(#
.
@2A
9 Y 7$+:,
1$+:, ;! 8
$;
;
C
$=4
N)#'
( "!
A! D4;22EF'#))!#(%%#%(#)#EGFG(%%#%(#)#1$F# #'7$F* #'
4. ORDERING INFORMATION
Table 2. Ordering Information
PART NUMBER(1) TEMPERATURE RANGE PACKAGE PINS PACKING
PAC5222QM H!H @2A8 48 + Exposed Pad Tray
+,$Product Selection Summary)('"!)! )"(!%
PAC5222
Power Application Controller
5. FEATURES
Proprietary Multi-Mode Power Manager
Direct DC supply up to 20V
Multi-mode switching supply controller configurable for Buck or SEPIC topologies with supply up to 44V
4 linear regulators with power and hibernate management
Power and temperature monitor, warning, and fault detection
Proprietary Configurable Analog Front End
10 analog front end I/O pins
3 differential programmable gain amplifiers
4 single-ended programmable gain amplifiers
10 comparators
2 DACs (10-bit and 8-bit)
Low-speed clock output for optimizing UL/IEC60730 Class B Safety Applications
Proprietary Application Specific Power Drivers
3 low-side and 3 high-side gate drivers with 1.5A gate driving capability
Configurable delays and fast fault protection
50MHz Arm® Cortex®-M0 32-bit microcontroller core
Fast single cycle 32-bit x 32-bit multiplier
24-bit SysTick timer
Nested vectored interrupt controller (NVIC) with 20 external interrupts
Wake-up interrupt controller allowing power-saving sleep modes
Clock-gating allowing low power operation
32kB FLASH and 8kB SRAM memory
10-bit 1µs ADC with multi-input/multi-sample control engine
9 ADC inputs including input from configurable analog front end
3.3V I/Os
3 general purpose I/Os with tri-state and dedicated analog input to ADC
True 5V I/Os
12 general purpose I/Os with tri-state, pull-up and pull-down and dedicated I/O supply
Configurable as true 5V or 3.3V I/Os
Flexible clock and PLL from internal 2% oscillator, ring oscillator, external clock, or crystal
9 timing generators
Four 16-bit timers with up to 16 PWM/CC blocks and 7 independent dead-time controllers
24-bit watchdog timer
4s or 8s watchdog timer
24-bit real time clock
24-bit SysTick timer
Wake-up timer for sleep modes from 0.125s to 8s
SPI, I2C, and UART communication interfaces
SWD debug interface with interface disable function
PAC5222
Power Application Controller
6. ABSOLUTE MAXIMUM RATINGS
Table 3. Absolute Maximum Ratings
+4!."' ! #%#! !(!'% ! !'#" 3.( ! !%.#%%!# "'#!# ) (#' %))"!'#"
###!,
PARAMETER VALUE UNIT
91040!9$$ ! 9
9!9$$ ! 9
$03E<!9$$ !9I 9
9$J$;<!9$$ ! 9
9!9$$ ! 9
98!9$$ ! 9
;<KDBDL9;<!9$$ !9$J$I 9
.4.3.!9$$ !9;<I 9
.!9$$ !9I 9
.:6.:.:4.:3.:(##M"!#"! B %
.:6.:.:4.:3.: %)(##M"!#"! %
47.!9$$ !9I 9
46.!9$$ ! 9
4$.!9$$ ! 9
4$.*)) ! *!+'94$.:'!, 9:
46.41.! ("!#4$. ! 9
9$$9$$!9$$ ! 9
9$$9$J$4047.41.3E<0$"! 0$
9$$0$"!+, 0$
90$"!+, 0$
<(!#!%(! ! °C
3"! !!#"'# "+3$4,
1%'%'+343, 59
'#"%'+343, 59
PAC5222
Power Application Controller
7. ARCHITECTURAL BLOCK DIAGRAM
Figure 7-1. Architectural Block Diagram
8kB SRAM
32kB FLASH
GPIO (15)
SPI
WATCHDOG
RTC
SYSTEM
CONTROL
DEBUG
10-BIT
ADC
DAC (2)
CLOCK
CONTROL
AUTO
SAMPLING
MULTI-
MODE
SWITCHING
SUPPLY
LINEAR
REGU-
LATORS
(4)
DAxP/PCMPx
DAxN
AMPx/CMPx/PHCx
PGA/
CMP (4)
AIO
CONTROL
(10)
AIOx
HSGD (3)
DRLx
DRHx
DRSx
DRBx
LSGD (3)
APPLICATION SPECIFIC
POWER DRIVERS
CONFIGURABLE
ANALOG FRONT END
MULTI-MODE POWER
MANAGER
REGO
VCCIO
VCC18
DIFF-PGA/
PCMP (3)
VHM
DRM
CSM
VP
VCC33
VSYS
VSSP, VSS, VSSA
BUF6
PBTN
DATA ACQUISITION &
SEQUENCER
PAx, PCx, PDx, PEx
I2C
UART
SPICSx, SPIMISO,
SPIMOSI, SPICLK
I2CSDA, I2CSCL
UARTRX, UARTTX
nRESET1
PWMAx, PWMBx,
PWMCx, PWMDx PWM /
CC (14)
PWM ENGINE
DEAD TIME
(7)
TIMERS (4)
BRIDGE
SWDIO, SWDCL
PAC5222
Power Application Controller
ADx
Arm®
Cortex®-M0
CORE
MUX
AHB/APB
PAC SOC BUS
OSC CLKOUT
PAC5222
Power Application Controller
8. PIN CONFIGURATION
8.1. PAC5222QM
Figure 8-1. PAC5222QM Pin Configuration (TQFN66-48 Package)
1PC4/AD4
2PC3/AD3
3
4
5
PC2/AD2
6
VCC33
7
8
AIO0/DA0N
9
AIO1/DA0P/PCMP0
10
AIO2/DA1N
11
AIO3/DA1P/PCMP1
12
AIO4/DA2N
AIO5/DA2P/PCMP2
AIO6/AMP6/CMP6/BUF6/PBTN
13AIO8/AMP8/CMP8/PHC8
14
AIO9/AMP9/CMP9/PHC9
15VSYS
16REGO
17
CSM
18
VP
19
VHM
20DRM
21
DRL0
22
23
DRL1
24
DRL2
DRS3
48
VSS
47
46
45
VCCIO
44
PE5/SPICS2/I2CSDA
43
PE4/SPICS1/I2CSCL
42
PE3/SPICS0/nRESET1
41
PE2/SPIMISO/UARTRX
40
PE1/SPIMOSI/UARTTX
39
PE0/SPICLK
38
PD0/SWDIO
37
PD1/SWDCL/EXTCLK
PD2/PWMA3/PWMA4/PWMB0
36 PD3/PWMA5/PWMA7/PWMB1
35
34
PD5/PWMA5/PWMC1
33
PD7/PWMA6/PWMD0
32
31
30
DRB5
29
DRH5
28
DRS5
27
DRB4
26
DRH4
25
DRS4
DRB3
DRH3
PAC5222QM
TQFN66-48
EP (VSS)
VCC18
PA7/PWMA5/PWMA7/PWMC1/CLKOUT
AIO7/AMP7/CMP7/PHC7
PAC5222
Power Application Controller
9. PIN DESCRIPTION
Table 4. Multi-Mode Power Manager and System Pin Description
PIN NAME PIN
NUMBER TYPE DESCRIPTION
$0 B $*#!"# (("! #(!"!!!( #!# #')!"!
# !
40 $*#!"# (('#!(!"!!! !)!.!(*
AA"0<$23$PAC User Guide'((#"!#!
3+9$$, 3 * 3.( '('0 !""!'!9$$# !'")#!#"!!
6"(()(*'# #(!#! #5#
9$$ B * E'
3E< * $ !%!!(!"!!9$J$'#"!!.!(*
'# #(!# # !
98 8 *
;!!'89"(* (("!N2#
"%#""("#!)%98!9$$$2#*$((6(
("#!!#*
9 * ;!!'9(* (("!N2#"%#"
"("#!)%9!9$$$6!!*
9;< *
;!!''##!;:<(* (("!BN2#
"%#""("#!)%9;<!9$$$2#*$((6(
("#!!#*
910 *
$*#!"# (("! ((#(!"!N2#"%#"
"("#!N2"%#""("#!#(*#!N2#
"!!#""("#!)%910!9$$# (#/# '"("#!#
( #!9$$ !"%#""("#!% !""!'*#! !!
%%!")%!(#$2#*$((6( ("#!
!#*
9 8 *
0#(* ((#' (*!!(*'# * !
)'"5(!)! *#!"# (("!(( #-' (((
"("#!#(*#!N2"%#""("#!)%9(#!9$$)!
( !##-!## (#/# '"("#!#( #!9$$ !
"%#""("#!% !""!'*#! !!%%!")%!(#
$$2#*$((6( ("#!!#*
9$J$ * 9 !%(* (("!BN2#"%#""("#!)%
9$J$!9$$$2#*$((6( ("#!!#*
PAC5222
Power Application Controller
Table 5. Configurable Analog Front End Pin Description
PIN NAME PIN NUMBER FUNCTION TYPE DESCRIPTION
;<:4A
;< ;:< )!';:<
4A 4#))!#E!##(!
;<:4:0
;< ;:< )!';:<
4 4#))!#E( #!##(!
0 !"!#"%(!#(!
;<:4A B
;< ;:< )!';:<
4A 4#))!#E!##(!
;<:4:0 8
;< ;:< )!';:<
4 4#))!#E( #!##(!
0 !"!#"%(!#(!
;<:4A
;< ;:< )!';:<
4A 4#))!#E!##(!
;<:4:0
;< ;:< )!';:<
4 4#))!#E( #!##(!
0 !"!#"%(!#(!
;<:0:0:6C2:6A
;< ;:< )!';:<
0 E#(!
0 %(!#(!
6C2 6))!(!
6A !!#(!
;<B:0B:0B:1B
;<B ;:< )!';:<B
0B E#(!B
0B %(!#(!B
1B "%(!#(!B
;<8:08:08:18
;<8 ;:< )!';:<8
08 E#(!8
08 %(!#(!8
18 "%(!#(!8
;<:0:0:1
;< ;:< )!';:<
0 E#(!
0 %(!#(!
1 "%(!#(!
PAC5222
Power Application Controller
Table 6. Application Specific Power Drivers Pin Description
PIN NAME PIN NUMBER TYPE DESCRIPTION
46 1# #'!'#! !(
46 1# #'!'#! !(
46 1# #'!'#! !(
41 1# #'!'#
41 8 1# #'!'#
41 1# #'!'#
47 7* #'!'#
47 7* #'!'#
47 7* #'!'#
4$ 1# #'!'# "
4$ B 1# #'!'# "
4$ 1# #'!'# "
Table 7. I/O Ports Pin Description
PIN NAME PIN NUMBER FUNCTION TYPE DESCRIPTION
:4
;:< ;:<(!
4 4#(!
:4
;:< ;:<(!
4 4#(!
:4
;:< ;:<(!
4 4#(!
PAC5222
Power Application Controller
Table 8. I/O Ports Pin Description (Continued)
PIN NAME PIN NUMBER FUNCTION TYPE DESCRIPTION
B:=0:=0B:0:
7O<C
B 4##! ;:<(!B
=0 4##! #%=0:(!
=0B 4##! #%=0:(!B
=0 4##! #%=0:(!
7O<C 4##! 7* ('""5!(!
4:$=4;<
4 ;:< ;:<(!4
$=4;< ;:< $#*#';:<
4:$=47:3P7O 8
4 ;:< ;:<(!4
$=47 ; $#*#'""5
3P7O ; 3.!""5
4:=0:=0:=06 B
4 ;:< ;:<(!4
=0 ;:< #%=0:"(!
=0 ;:< #%=0:"(!
=06 ;:< #%6=0:"(!
4:=0:=0B:=06
4 ;:< ;:<(!4
=0 ;:< #%=0:"(!
=0B ;:< #%=0:"(!B
=06 ;:< #%6=0:"(!
4:=0:=0
4 ;:< ;:<(!4
=0 ;:< #%=0:"(!
=0 ;:< #%=0:"(!
4B:=0:=04
4B ;:< ;:<(!4B
=0 ;:< #%=0:"(!
=04 ;:< #%4=0:"(!
3:$;7O
3 ;:< ;:<(!3
$;7O ;:< $;""5
3:$;0<$;:CP
3 ;:< ;:<(!3
$;0<$; ;:< $;% !! #+0<$;,
CP < C! %#!!(!
3:$;0;$<:CP
3 ;:< ;:<(!3
$;0;$< ;:< $;% !# !+0;$<,
CP ; C"##(!
B
PAC5222
Power Application Controller
Table 9. I/O Ports Pin Description (Continued)
PIN NAME PIN NUMBER FUNCTION TYPE DESCRIPTION
3:$;$:3$3
3 ;:< ;:<(!3
$;$ < $;"#( "!
3$3 ; !#(!+"!#*,
3:$;$:;$7
3 ;:< ;:<(!3
$;$ < $;"#( "!
;$7 ;:< ;""5
3:$;$:;$4
3 ;:< ;:<(!3
$;$ < $;"#( "!
;$4 ;:< ;'!
8
PAC5222
Power Application Controller
Figure 9-1. Power Supply Bypass Capacitor Routing
PAC5222
Power Application Controller
10. MULTI-MODE POWER MANAGER (MMPM)
10.1. Features
Direct DC supply up to 20V
Multi-mode switching supply controller configurable as Buck or SEPIC DC/DC controller up to 44V
4 linear regulators with power and hibernate management
Power and temperature monitor, warning, and fault detection
10.2. Block Diagram
10.3. Functional Description
0!#0'*0+2#,# (!#%#-'!))#"#!(#'Q#Q(*%%!/#'
!' "#!'((#"!#"#"#!)%*#')#(!(* " ;!#"(! ''#"!'%!#
%' *#!"# ((+00$$,"!( "5$3;4:4!))#"#!"!(*)%4
#(! "!!%# ((!(!92#! (#'9$J$9;<9'98 ((# )
9 !%99;:<9%#.' #'89%#""!""#"#!(*% '
!%)"!# #"'##!)"!#!#% #!%'%%!'(*'!%(!
%#!#
10.3.1. Multi-Mode Switching Supply (MMSS) Controller
00$$ "! '# .! (* ! # ! ) ( *#'! %'!# *#!"# ) #'"!
! )%)(*" # 40!(!'# !!)!"0<$23! )!AA
!*!910 !!'9$$)) !!!(('!""' *#!"#)/"! !!!%# ((
!9# !'9!#!# ##!# !!9'# !!('"")#'!9
Figure 10-1. Multi-Mode Power Manager
IMOD
DAC
CSM
CURR
SENSE
DRM
DRIVER
MULTI-MODE POWER MANAGER
VHM
VSSP
PWM
LOGIC
ERROR
AMP
LINEAR
REG
VCCIO
LINEAR
REG
VCC33
LINEAR
REG
VCC18
SYSTEM
SUPPLY
REG
VOLTAGE
SETTING
VP
REGO
VSYS
COMP &
CURR LIMIT CLAMP
ERROR
COMP
MULTI-MODE SWITCHING
SUPPLY CONTROLLER
POWER
OK & OVP
MUX
MUX
START UP &
MODE CTRL
1.2V
HIBERNATE
2.5V VREF
TIMERS POWER
& TEMP
MON
VSSA
VSS
MUX
VMON
VTHREF VTEMP
PAC5222
Power Application Controller
99!%#""!)!##!##-!# =9 # *!!!!!#!!#!
)'"5"!"#"#! " !#'"!"!!#" !# 9 *9 # #!!
!#!!)'"5("!" !#'"!"!!'" !*9)'"5(#
#! !##-'!(!"!"(##!)! *#!"# ((# '!%#'!.!"!
# !;!# #'"! "5$3;%'!#'"!"! ## ''#))!#!*!
$0(#'9' (5"!#%#!! ')9
00$$"!# ).#'")# "5$3;:4"!;(! " #"'!!
(()"5%'+2#,$3;%'+2#,00$$"!(!#%'# '!%#'
.!")#!#'# ! !!# )%!%#""!)!(*(;!"(!##!# #'
* #'"! %''' !/#.!)'"5("%( !#"#"#!2(!#.!''
((#"!# ! 00$$ #"(! ''#!# '##! "! ! %#""! ! '' ""!
"%(!!# )!)'"5("! " (*)"!""!#'""!"!"!
00$$'!"! ' "! !*# #''* #'%''# !!( '!("%!)!"!
# !'!$0(#!;!%( ) !!(%'*#!51- *#!"#)/"!#9."'
9'!"5!! '!! #!# !!51-')! *#!"#)/")! !% !#9
Figure 10-2. Buck Mode
VHM
DRM
CSM
VP
PAC52xx
VP (15V default)
VIN VHM
DRM
CSM
VP
PAC5222
VIN
Figure 10-3. SEPIC Mode
PAC5222
VHM
DRM
CSM
VP
VP (9V/12V/15V)
VIN
PAC5222
Power Application Controller
" !!!!!)#!#! .!' '((#')!! ((#
#'!%#"(" ##!##-' *#!"#)/""")#'!%#"(" !
851-!51-#!# *#!"#)/"%')!! '((#"!# '!51-!51-#!
* *#!"#)/"%')((#"!# C(##!##-!#!%#""!% !")#!00$$!
!' #' !!# )9G!#! *#!"#%' *#!"#)/"'910 "%()!!
((#"!#! ' #')00$$"!' #'(%%#
;) !.!9!89(* "# ##!"(*!9 %# (('!#!
'#"!*#!!/##!00$$"!!(!; "((#"!# 910"""!''#"!!9'
!%#""! ''# !00$$(##!##-!#!'"(*
10.3.2. Linear Regulators
000#"' (!)#! !% ((!# %'#%!!!!!5 !
9 ((' " (!%!3E<!#9$J$.!"('!3E<" 9# * ((
!'.! # !!""!')%3E<!9$J$!" !"!('))'(*'# #(!#!*
9 '9$J$<"9$J$ # 9!!''#!# %#! )9;<9'98 ((#
/!#(*(2# * !(#""#"#!""!# )!#! 29;:< !% !!
9;<(#!9$J$ !( !9;< !29;:< !% !9;<!! 99 '
98 ! !9'89 ("!#=9$J$9;<9'98 !# ("!#
(*'! ' '!")#(* !'!# .(#'!%#""!# ##!##-'
10.3.3. Power Up Sequence
000)* !(#"(*( /" #!2#*!(#" /"# *#!#(!(*
((#((#')*'! ) !!(' !!('!# !#! *#!"# ((!(!9!9
)!#! '=! ((# '!#!""5 "%#'!
%#""! !! ."!#)%!(%%%4###!##-!#!%#""!"")#!
*#!"# ((!'#))!9!#! " 9'!(((#! *#!"#)/"' *#!"#
%'!!'#! *#!"# ((% !5(!*R)!%.#%%!(!"!!#)!!
")#!#)! *#!"# ((# "%(!2#(! ((((#"!# ! !!( /"#"'
''#!#"#!#%)910'('#! !!( # !'"("#!
Figure 10-4. Linear Regulators
VP
REGO
PAC5222
VSYS & VCCIO (5V)
VP (15V typical)
VSYS
VCCIO
VCC33
VCC18
VSS
VSSA +,
BµF
1µF1µF
5V I/O connection shown.
Connect instead to a 4.7µF
capacitor for 3.3V I/O.
+,
PAC5222
Power Application Controller
10.3.4. Hibernate Mode
;"#!!*(*#!%'#!%#""!)#%*#!(!#( !!
+6A Push Button ' "#(!# # Configurable Analog Front End, ;#! %' %##%%!
+!(#"8µA) )"!# '910'!00$$"!'#!! !'*!#%#!
(*'#)%!!(! ((# !%.#! #!%')!*5(!#%'!#+")#)%
% !8 #)##!, .(#'#)( !!')!''#!#( !!! '!"!'
= .#!# ! #! %' ! (* % ! ! !! ( "" ' ! %#""! #
##!##-'<!( # !!(*% !! #! + ! ')! ,!#''##!#
10.3.5. Power and Temperature Monitor
=)!9$J$9;<998(* ((# ) *!# ("!#(*'! '!
)!!# '!"!''!%#""!# !%#""! ! #! ! !!!#9$J$9;<9
'98 ((# '#'! !!#% .(#'%#""! !" ##!#!'
% 5!%(!)!!!!"" *!;!%(!" B°)! !! #! ( # !!
'# !'"'!%#""!(##!##-!#!'!%#!" )(# !
(*%#!# #90<A# (#''!!4(%!#(.)%#!## #!(* ((#
90<A" !!98•9•9;<•9$J$•93E<•9!#!"%( !#!9<0
) *#!"# (((*%#!#
2(*'!%(!*#9*!!BBR)!!#!';!%(!*#!
!°(#'' % 5#!(! !!%#""! *# *!%#""!! )
(*'*! !%
;''#!#!!!%(!*##!(!')! !!%(!%#! # 930FI•+
°C,+9,# (#''!!4(%!#(.);!%(!% %!
10.3.6. Voltage Reference
)""5#"' 9#("# #)"!!!(#' !9)"!)!4
!4 '!(%%! '!9132+999'9,
Figure 10-5. Power Up Sequence
9$J$'9;<+9,
9+9:9:9:9,
9+9,
98+89,
$) !!(
9;A910
B9
9
$!!(
9
8BR
0#""!
##!##-#
*
!'
% $<=2E3$3I%
+')!D% I% F% ,
0#""!
!
9$J$'9;<
9
9
98
;!""5
9;A910
* !
!
'
9+ !!(')!,
")#!#)#%* $ !%(!#
0#""!
."!#
PAC5222
Power Application Controller
10.4. Electrical Characteristics
Table 10. Multi-Mode Switching Supply Controller Electrical Characteristics
+910F99F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
Input Supply (VHM)
;1;6S910 910#!%' (("! 910#!%' 8 T
;$CS910 910 !!( (("! 910U9C97<S910 B T
;<S910 910(!# (("! 40)!# %
9<D910 910(!#! 9
9C97<S910 910'!"5!# # B 8 9
9C97<2S910 910'!"5!)# B 9
970S910 910"%(! %(' #5"!FµA 9
;70S910 910"%( #5"!#%#! %(' %
Output Supply and Feedback (VP)
93ES9 9!(!!#! %%!9999
7'F!% B R
5<OS9 9(*<O! ' 9# # ! # FR 8 8B R
5<9S9 9!(!"!#! ' 9# # ! # FR
000!' R
Switching Control
)$=0S40 $*#!"#)/"(%%
1#)/"%'8 !!# 8
7*)/"%'8 !!#
51-
)$$CS40 $) !!( *#!"#)/" 51-
!<A0;AS40 0##%%!#%
!<220;AS40 0##%%))!#%
7*'!""V7*)/"%'
7*'!""V1#)/"%'
1#'!""%'
8
R
$
$
PAC5222
Power Application Controller
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
Current Sense (CSM Pin)
943S$0 $0%''!"!#! ' # # ! # F%9 9
91$7;0S$0 1# #'"!#%#!! ' 851-'!FR!#!9 B 9
97$7;0S$0 7* #'"!#%#!! ' 51-'!FR B 8 9
!67AOS$0 ! 5#!#%
9<S$0
7* #'%"!
(!"!#! '
9U9 8
9W9
9
Gate Driver Output (DRM Pin)
9<1S40 1#!(!! ;40F% 910− 9
9<7S40 7*!(!! ;40F% 9
;<1S40 1#!(! ""! 940F9109
;<7S40 7*!(! #5"! 940F9
!4S40 $!('*( *#'! 1# #'"! %'
PAC5222
Power Application Controller
Table 11. Linear Regulators Electrical Characteristics
+9F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
9<S9 9(!#! B 8 9
9C97<S9 9'!"5!! ' 9# # ! # F9 B 9
;@S9 9/# "! (("! *%#"'#;@S9$J$ B T
;@S9$J$ 9$J$/# "! (("! 9;<9'98! T
9$J$ 9$J$!(!! 7'Fµ!% 8 9
9;< 9;<!(!! 7'F%
9;< !'!9$J$ 9$J$
9
9;<)%! 8
9 9!(!! 7'F% 8 9
98 98!(!! 7'F% 8 B 9
;7;0S9$J$ 9$J$!"!#%#! %
;7;0S9;< 9;<!"!#%#! 8 %
;7;0S9 9!"!#%#! 8 %
;7;0S98 98!"!#%#! 8 %
5$26 $!"#"#!"!)'"5 R
94<S9$J$ 9$J$'(!! 9F9;$J$F% 8 %9
9C97<S9$J$ 9$J$'!"5!! ' 9$J$# # ! # F9 9
5<O;< 9;<*<O! ' 9;<# # ! # FR B 8 R
5<O 9*<O! ' 9# # ! # FR B 8 R
5<O8 98*<O! ' 98)# ! # FR B 8 R
Table 12. Power System Electrical Characteristics
+9$J$F9;<F99F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
932 )"!
FH 8B
9
F-H!H B
50<A
*%#!#!+90<A,
"))#"#!
98
9:99$J$9;<9
993E<
930 %(!%#!!!H FH!4 B 9
530 %(!%#!"))#"#! !4 %9:O
=A <!%(!*#! ' 1 ! # F°C °C
2C7 <!%(!)!! ' 1 ! # F°C B °C
PAC5222
Power Application Controller
10.5. Typical Performance Characteristics
+9F9'F5°C unless otherwise specified.)
B
0 0.1 0.2 0.3 0.4 0.5
100
90
80
70
60
50
40
30
20
10
0
PACMMPM-001
Efficiency (%)
Buck Mode Efficiency
vs. Output Current
VIN = 48V
VIN = 24V
Output Current (A)
VP = 12V,
fSW;DRM = 181kHz
-40 0 40 80 120
80
70
60
50
40
30
20
10
0
PACMMPM-005
On Resistance (Ω)
DRM Driver Output
On Resistance vs. Temperature
Temperature (°C)
Pull up
Pull down
20 30 40 50 60
50
40
30
20
10
0
PACMMPM-002
Input Current (µA)
Buck Mode Hibernate Input Current
vs. Input Voltage
Input Voltage (V)
PAC5222
Power Application Controller
11. CONFIGURABLE ANALOG FRONT END (CAFE)
11.1. Block Diagram
8
Figure 11-1. Configurable Analog Front End
AMPx
CONFIGURABLE ANALOG FRONT END
MUX
DAxP/PCMPx
DAxN
CMPx
MUX
MUX
S/H
MUX
PROTECT
LP DAC
HP DAC
OFFSET
CAL
AIOx
MUX
I/O
CONTROL
ADC MUX
ADC PRE-MUX
DINx
DINx
CONFIGURABLE DIGITAL SIGNAL MATRIX
CONFIGURABLE ANALOG SIGNAL MATRIX
PHCx
MUX
MUX
DINx
PHASE
REF
INT2/POS
PHASE
POS
PR1, PR2
PHASE COMPARATOR
COMPARATOR
AFE I/O
PGA
DIFF-PGA & PCOMP
PBTN
BUF6
PUSH
BUTTON
MUX
VSYS
INT1
VTEMP, VMON, VREF/
2
3V
VTHREF
PAC5222
Power Application Controller
11.2. Functional Description
'#"#"' )#2!3'+23 2#,"" #!(!';:<
(# (# "")#'!)%).##!""!'"#"#!%'()(!'#))!#(%%
#%(#)# #''(%%#%(#)# (( "%(! ( "%(!
(!"!#"%(! '))!(! (# " (%%' )'!(#
)!';:<(# !!")"!# '##!#(! '##!('#!(! ((#!")#
#%!#.+$0,'")#'##! #%!#.+4$0,*!#% " '
'##! # !!'#).#"#"#!""!# )'#))!((#"!# ( !!)"!## (#'')
(!# ( !! #!' )) (*%%! )"!# * (' ""5 !(! # (#'' )
(!#%#-# !%' #)C7:;3B 6$)!((#"!#
11.2.1. Differential Programmable Gain Amplifier (DA)
4.'4.A(#(#( #!#'!##(! ("!#!'#))!#(%%#%(#)#
'#))!##"(%%!...8...'8.)-% # "#%('"
'#))!# (%% # %(#)# 9 ! 9 #(! "%% %' ' #! !(! "
")#')!#'#"!!!4(%!#(.! %(''"#"#! "#-'*#!!
4 ! %(# %"# % 3" '#))!# %(#)# # ""%(#' )) ! "#!# "#"#! ' !*
(!"!#"%(! )(!"!#!%#!#(%%#'#))!#%(#)## (!#%#-')
*#! # "#%('"*!Ω and with matched source impedance on both positive and negative
inputs for minimal offset. The effective gain is scaled by 13.5k / (13.5k + RSOURCE), where RSOURCE is the matched
source impedance of each input.
11.2.2. Single-Ended Programmable Gain Amplifier (AMP)
3"0.#(! ! #''(%%#%(#)#*#! #!#!9 $$%(#)##"
(%%'!...8...'8. )'!(%%#%(#)#!(!
# !'#%!#(.!!")# #%!#.$0
11.2.3. General Purpose Comparator (CMP)
(( "%(!!5 !0.#(!'"%( #!!#!!(%%! '!
+9132, #)%!")# #%!#.$0"%(! 9!9$J$#(!"%%%'
'#! (#! "!!(!# !'#%!#(.!#!'!#(!#!!")#'##! #
%!#.4$03"(( "%(! !*% 5#! !(!*# #)#')#! !(!!
!# "'%#""!#!(!;A*;A"")#'!"!#(!"!#!
11.2.4. Phase Comparator (PHC)
( "%(!!5 !1.#(!'"%( #!!#!!(%%! '!+9132,
#)%!")# #%!#.$0"%(# #" !!( )" #
!'#!1.#(!! ;!( %!"!((#"!#!( )" #"!
#! "! !( ) 6302 '!"!# 1. #(! (!# )'! ! ! $0 (
"%(! 9!9$J$#(!"%%%''#! (#! "!!(!# !'!'!#(!#!'!
!( :( #!#%!#(. "#-'*#!!! %(# /" 1#(! ""%('!!
#!"!!( ( !( ) ! % ! ))#"#! 6302 -" '!"!# ( "%(!
")# %%!#" ! #
( "%(! 9!9$J$#(!"%%%''#! (#! "!!(!# !'!'!
#(!#!'!!( :( #!#%!#(. "#-'*#!!! %(# /"
PAC5222
Power Application Controller
11.2.5. Protection Comparator (PCMP)
*(!"!#"%(! (#''# "#!#*#!"'#))!#(%%#%(#)#*#!!(!
#!!#(!"!#! '"" # '"5!(!#! # ('(!"!#+1,"%(!
"%( !0.(#!!8#!14!(!!*#!) "!)9#%#!(!"!#+7,
"%(!"%( !'#))!#(%%#%(#)#!(!!!#!74!(!!*#!)
"!)9
3"(!"!#"%(! % 5#!!(!*#!!!#!%#%#""!#!(!;A3"
(!"!#"%(! % 5#!!(!*#!!"!#!(!"!#!'!% 5#!!
(!*#!!"!#!(!"!#! !*(!"!#! " ''#"!(!"!#"#"#!
#!((#"!#$("#)#"*4# +$4,!(!"!'#" #'#
11.2.6. Analog Output Buffer (BUF)
!)! # )%!")# #%!#.$0"%!#(.'!!6C2(#).!
)))) !!"%##%#-'*#!!#!# *()"!#
11.2.7. Analog Front End I/O (AIO)
C(!;<.(# ##!'#";!)!';:<%'!(#"")#'!'##!
#(!'##!('#!(!;<.#(!!(! #" !!'!#(!!(!# !#!
%!#(.'!)! # #!")#'##! #%!#.4$0 #" !!"!##
+')!,"!#**#!9$J$ ((#=;<B8 ((! %#""!#!(!).! # 3"
!* % 5 #! ! (! * # # )# ' ) #! " ('# '##! #(! ! !# "'
%#""!#!(!;A
11.2.8. Push Button (PBTN)
( !!6A*'" '!%#""!!'!"! "!#*( !!!'
!(!! !%#!!*(*#!%'<"! !%# ##!%'6A" '!
*5(! !%;''#!#6A" ' '* !)!%#""!*#!# '*)
!8 '#%(!#6A#(!# "!#*' 5Ω pull-up resistor to 3V.
11.2.9. HP DAC and LP DAC
8#!14" ' !"%(# !)!# ('(!"!#+1,"%(! !')
(( #!6 ##!$014!(!) "!# 9
#!74" ' !"%(# !)!#%#!(!"!#+7,"%(! !')
(( #!6 ##!$074!(!) "!# 9
11.2.10. CLKOUT
# * ('""5!(!!!%''")#'!# '#"""5!(!# '# '
')!'%''# '!# !#!""5!(!%")#')81-51-
# ""5!(! # ) )!# "' ""5 "!!# '' C7;3B 6$)!
!'' # !(!%""!'!'##!#(!!6!# '#" !!!0C)#%*%'!"!
# *#!!""5 " )#'#)!#)!)/"
7O<C(## ' *#! B ('# !(! ;)! 7O<C (# # ' !B %
")#' *5((##%('"#(!*#!5(( # !!!""! B!9;<
'##!#(!)"!# *# !#'!!(!)"!# *'
PAC5222
Power Application Controller
11.2.11. ADC Pre-Multiplexer
4(%!#(.# !%!#(.!! "! !*!'#))!#(%%#%(#)#
!(! 6 ! 6 !%(! %#! # +930, (* %#! # +90<A, ' )) ! "#!#
)"+932 :,4(%!#(."'#"!"!'!%!#" "'!! %(#
/"
=!4(%!#(.# !%!#" "'!))' #!# # '% 5' !!#
(((#!# !#!
11.2.12. Configurable Analog Signal Matrix (CASM)
$0 (( # '6!6!!" ')D
Routing the single-ended programmable gain amplifier or analog feed-through output to AB1 through AB9
Routing an analog signal via AB1, AB2, or AB3 to the negative input of a general purpose comparator or
phase comparator
Routing the 8-bit HP DAC output to AB2
Routing the 10-bit LP DAC output to AB3
Routing analog signals via AB1 through AB12 to the ADC pre-multiplexer
Routing phase comparator feed-through signals to AB7, AB8, and AB9, and averaged voltage to AB1
11.2.13. Configurable Digital Signal Matrix (CDSM)
4$0 B(( #'#"!#'##! # '46!46B!!" ')D
Routing the AIOx input to or output signals from DB1 through DB7
Routing the general purpose comparator output signals to DB1 through DB7
PAC5222
Power Application Controller
11.3. Electrical Characteristics
Table 13. Differential Programmable Gain Amplifier (DA) Electrical Characteristics
+9$J$F9;<F99F9'F°C to 105°C unless otherwise specified.)
PARAMETER CONDITIONS MIN TYP MAX UNI
T
;S4 <(!# (("! 3"'%(#)# T
9;0S4 ;(!"%%%' 9
9<7S4 <!(!# 9
9<$S4 ;(!)) !! E#F8.94.F94.AF9FH 8 8 %9
9X;S4
4#))!#%(#)##
+-% "#%('",
E#F.
R
R
E#F.
E#F.
E#F8.94.F%994.AF9
FH 8
E#F.
E#F.
E#F8. 8
50S4 %%%'M"!#!# E#F8.94.F94.AF9FH '6
;A4;2S4 4#))!##(!#%('" B 5Ω
$*!+, E#F8. B 9:T
!$S4 $!!#!#%+, R))#
+,E!'' #
Table 14. Single-Ended Programmable Gain Amplifier (AMP) Electrical Characteristics
+9$J$F9;<F99F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
;S0 <(!# (("! 3"'%(#)# 8 T
9<7S0 <!(!# 9
9<$S0 ;(!)) !! E#F.FH90PF9 %9
9S0 %(#)##
E#F.
R
R
E#F.
E#F.
E#F8.90.F%9FH 8
E#F.
E#F.
E#F8. 8
;;AS0 ;(!"! µA
$*!+, E#F8. 8 9:T
!$S0 $!!#!#%+, R))#
+,E!'' #
PAC5222
Power Application Controller
Table 15. General Purpose Comparator (CMP) Electrical Characteristics
+9$J$F9;<F99F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
;S0 <(!# (("! 3"'"%(! T
9;0S0 ;(!"%%%' 9$J$ 9
9<$S0 ;(!)) !! 90.F9FH %9
91J$S0 1 ! # 1J$0<43FS1J$KDLF %9
;;AS0 ;(!"! µA
!437S0 %(!'+,
+,E!'' #
Table 16. Phase Comparator (PHC) Electrical Characteristics
+9$J$F9;<F99F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
;S1 <(!# (("! 3"'"%(! T
9;0S1 ;(!"%%%' 9$J$ 9
9<$S1 ;(!)) !! 91.F9FH %9
91J$S1 1 ! # 1J$0<43FS1J$KDLF %9
;;AS1 ;(!"! µA
!437S1 %(!'+,
+,E!'' #
Table 17. Protection Comparator (PCMP) Electrical Characteristics
+9$J$F9;<F99F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
;S0 <(!# (("! 3"'"%(! T
9;0S0 ;(!"%%%' 9$J$ 9
9<$S0 ;(!)) !! 90.F9FH %9
91J$S0 1 ! # %9
;;AS0 ;(!"! µA
!437S0 %(!'+,
+,E!'' #
Table 18. Analog Output Buffer (BUF) Electrical Characteristics
+9$J$F9;<F99F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
;S6C2 <(!# (("! A' T
9;0S6C2 ;(!"%%%' 9
9<7S0 <!(!# 9
9<$S6C2 <)) !! 96C2F9FH 8 8 %9
;<0P 0.#%%!(!"! 7F2 8 %
PAC5222
Power Application Controller
Table 19. Analog Front End I/O (AIO) Electrical Characteristics
+9$J$F9;<F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
9;< #! 9
9;1S;< 1##(!! 9
9;7S;< 7*#(!! 8 9
4S;< '* # !" ;(!%' 8 0Ω
9<7S;< 7*!(!! ;;<.FB%('#!(!%' 9
;<7S;< 7*!(! #5"! 9;<.F9('#!(!%' %
;7OS;< 1#!(!5"! 9;<.F9('#!(!%' μA
Table 20. Push Button (PBTN) Electrical Characteristics
+9$J$F9;<F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
9;S6A ;(!! 9
9;1S6A 1##(!! 9
9;7S6A 7*#(!! 9
CS6A ( # !" 9( !!#(!%' kΩ
Table 21. HP DAC and LP DAC Electrical Characteristics
+9$J$F9;<F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
9432 4)"!
FH 8
9
F-H!H B
18#!4;A7+, 7$6
18#!44A7+, 7$6
7#!4;A7+, 7$6
7#!44A7+, 7$6
+,E!'' #'""!#-!#
Table 22. CLKOUT Electrical Characteristics
+9$J$F9;<F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
27O<C 7* ('""5!(!)/" 8 1-
27O<CY3 7* ('""5!(!)/"FºC, FCLKOUT reference from stored
value in INFO FLASH.
R
PAC5222
Power Application Controller
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
FºC to 105ºC, FCLKOUT reference from
stored value in INFO FLASH. R
#%(!"""!"! % "#!' )7O<C% %! ##;A2<
27$1$!C E#')%#)%!#
PAC5222
Power Application Controller
11.4. Typical Performance Characteristics
+9$J$F9'F5°C unless otherwise specified.)
0 500 1000 1500 2000 2500
5000
4000
3000
2000
1000
0
PACCAFE-001
Output Voltage (mV)
Differential PGA (DAx) Gain Characteristics
at 1x, 2x, 4x, and 8x Settings
Differential Input Voltage (mV)
1x
2x
4x
8x
0 50 100 150 200 250
PACCAFE-002
Output Voltage (mV)
Differential PGA (DAx) Gain Characteristics
at 16x, 32x, and 48x Settings
Differential Input Voltage (mV)
16x
5000
4000
3000
2000
1000
0
32x
48x
0 100h 200h 300h 3FFh
2500
2000
1500
1000
500
0
PACCAFE-005
Output Voltage (mV)
LP DAC Output Voltage vs. Input Code
Input Code
0 500 1000 1500 2000 2500
PACCAFE-003
Output Voltage (mV)
PGA (AMPx) Gain Characteristics
at 1x, 2x, 4x, and 8x Settings
Input Voltage (mV)
5000
4000
3000
2000
1000
0
1x
2x
4x
8x
0 40h 80h C0h FFh
2500
2000
1500
1000
500
0
PACCAFE-006
Output Voltage (mV)
HP DAC Output Voltage vs. Input Code
Input Code
PACCAFE-004
Output Voltage (mV)
PGA (AMPx) Gain Characteristics
at 16x, 32x, and 48x Settings
Input Voltage (mV)
0 50 100 150 200 250
16x
32x
48x
5000
4000
3000
2000
1000
0
PAC5222
Power Application Controller
B
PAC5222
Power Application Controller
12. APPLICATION SPECIFIC POWER DRIVERS (ASPD)
12.1. Features
3 low-side and 3 high-side gate drivers
1.5A gate driving capability
Configurable delays and fast fault protection
12.2. Block Diagram
12.3. Functional Description
((#"!# $("#)#" * 4# +$4 2# , %' ' (* '## ) (* "!
((#"!# !* #'!'# +47.,!# #'!'# +41.,3"!'#
"'#.!0<$23;E6 *#!"# ( !# ('"! # )%!%#""!(!
'(#)# #''* #'!'# ")%)#''#
2#* * !(#"!'#""!# ' * !$4# "
!'# ((!(!9! !( ((
Table 23. Power Driver Resources by Part Numbers
PART
NUMBER
LOW-SIDE GATE DRIVER HIGH-SIDE GATE DRIVER
DRLx SOURCE /SINK CURRENT DRHx MAX SUPPLY SOURCE/ SINK CURRENT
PAC5222 : 9 :
8
Figure 12-1. Application Specific Power Drivers
DRHx
DRBx
DRSx
LEVEL
SHIFT
DELAY
HS
DRLx
LOW-SIDE GATE DRIVERS
DELAY
HIGH-SIDE GATE DRIVERS
VP
APPLICATION SPECIFIC POWER DRIVERS
ENDRV
FAULT
PROTECT
LS
PORT/PWM SIGNALS
PRE-
DRIVER
PRE-
DRIVER
PAC5222
Power Application Controller
$4#"' #!#")#)!(!"!#)!#!!'#
12.3.1. Low-Side Gate Driver
47.* #'!'#'# !!).!0<$23;E6 *#!"!*!*9$$(*
'#'#9 ((#47.!(!(# #5' "!(!"!"(##!)3"
* #'!'## "!'%#""!(! #*#!")# )((!#'
12.3.2. High-Side Gate Driver
41.# #'!'#'# !!).!0<$23;E6 *#!"!*#! *4$.'#
"#'#! #46.! !(#4$.(#"(!9 !' !!41.!(!(#
#5' "!(!"!"(##!)46.! !((#"%.#%%(!#!)9
!#!!4$.(#'(!9 !' !!4$.(## ' #'!!!%%! *#!"#!#
(#5 '*!9*#!!))"!#!41.!(! !!3"# #'!'## "!'%#""!
(! #*#!")# )((!#'
2! !(('# #'(!#""!n appropriate"("#!!*46.'4$.'((!'
! !('#')%9!46.(!!41.!(! * #'!'#""!#! 46.(#!9'#!
4$.(#!9$$
12.3.3. High-Side Switching Transients
(#"# #' *#!"#! #! *#2#+, )"!##!'###!!4$.'
46.(# % !!."'!(5'' !#%#! *# '#)#'(#!46.'
4$.(# '#"!!#!9$$(# % # !''#'"%()!4$.(#" '!%5 !!
!(#! ! *#!#!!##%#!;''#!#!# #' *!'9:'!% !5(!*#!# ±9:
)4$.# ""#'''# # !'#'(## # '(!#"("#!#(*#!!
(* *#!"!("("#! (#' *#%('"'" ! !# !"(#)%!
*#!"'# (!#(!"!#' *!"! *#2#+,
Figure 12-2. Typical Gate Driver Connections
DRHx
DRLx
DRSx
DRBx VPVIN
PAC5222
(To loads/inductors.)
PAC5222
Power Application Controller
12.3.4. Power Drivers Control
(*'# ##!#'# ')%(* !!(*'# !%#"(" % !)# ! !
!'##!!&&!'# "!'!%#""!(! ':=0 # ""'#!
*#!")#' *#)!!((#"!#! ' #')''#!#
#)%!#(*'# "!(%%#
Table 24. Microcontroller Port and PWM to Power Driver Mapping
PART
NUMBER PWMA0 PWMA1 PWMA2
PWMA3/
PWMA4/
PWMB0
PWMA5/
PWMC0
PWMA6/
PWMD0
PAC5222 47 47 47 41 41 41
Table 25. Power Driver Propagation Delay
DRLx DRHx
RISING FALLING RISING FALLING
12.3.5. Gate Driver Fault Protection
$4#"(! ")#)!(!"!#%"# % #(!"!# #)%!)#
2!3'+23,' #!' (!"!#!+, #47:47:47'# ' #!' *
#'(41:41:41!'# ' #!' # #'( #)%!23
" '!'# * #'(# #'(!'('#!% 5#! !!#
Figure 12-3. High-Side Switching Transients and Optional Circuitry
VDRSx
VDRSx ≥ -5V
VDRBx ≤ 83V
VDRBx
dV/dt
dV/dt
(a) High-Side Switching Transients (b) Optional Transient Protection and Slew Rate Control
DRHx
DRLx
DRSx
DRBx VP
VIN
PAC5222
PAC5222
Power Application Controller
12.4. Electrical Characteristics
Table 26. Gate Drivers Electrical Characteristics
+9F99$J$F9'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
Low-Side Gate Drivers (DRLx Pins)
9<147 1#!(!! ;47.F% 9−0.5 VP−0.25 9
9<747 7*!(!! ;47.F% B 9
;<1O47 1#( '(5 ""! T (
;<7O47 7*( '(5 #5"! T (
High-Side Gate Drivers (DRHx, DRBx and DRSx Pins)
94$ 7 #)!'# "!
(!#!#T (
9
$!' !!
946 6! !((#!
(!#!#T (
9
$!' !!
96$S46 6! !( ((! 946.!#! ("!#94$. 9
9C97<S46 6! !(C97<! ' 946.# #!#! ("!#94$.
! # F9 9
;6$S46 6! !("#"#! (("!
E!4#4# '
µA
E!4#3'
;<$S46 <)) ! (("!
E!4#4# '
µA
E!4#3'
9<1S41 1#!(!! ;41.F% 946.−
0.6
VDRBx-
0.25 9
9<7S41 7*!(!! ;41.F% 94$.I
B
94$.
I 9
;<1OS41 1#( '(5 ""! T (
;<7OS41 7*( '(5 #5"! T (
High-Side and Low-Side Gate Driver Propagation Delay
!4 (!#4
4 !!#
4 !!#
4 !!#
4 !!#
4)%*4#(!#4
PAC5222
Power Application Controller
12.5. Typical Performance Characteristics
+9F99$J$F9'F5°C unless otherwise specified.)
-40 0 40 80 120
500
400
300
200
100
0
PACASPD-007
Turn-On Delay (ns)
Low-Side Gate Driver (DRLx)
Turn-On Delay vs. Temperature
Temperature (°C)
00b setting (default)
11b setting
10b setting
CL = 1nF
01b setting
-40 0 40 80 120
500
400
300
200
100
0
PACASPD-008
Turn-Off Delay (ns)
Low-Side Gate Driver (DRLx)
Turn-Off Delay vs. Temperature
Temperature (°C)
00b setting (default)
11b setting
10b setting
01b setting
CL = 1nF
-40 0 40 80 120
3
2
1
0
PACASPD-001
Source/Sink Current (A)
Low-Side Gate Driver (DRLx)
Source/Sink Current vs. Temperature
Temperature (°C)
Sink current
Source current
-40 0 40 80 120
8
7
6
5
4
3
2
1
0
$4
< # !"+Ω,
Low-Side Gate Driver (DRLx)
On Resistance vs. Temperature
%(!+°C)
( '*
-40 0 40 80 120
PACASPD-003
Source/Sink Current (A)
High-Side Gate Driver (DRHx)
Source/Sink Current vs. Temperature
Temperature (°C)
3
2
1
0
Sink current
Source current
-40 0 40 80 120
PACASPD-004
On Resistance (Ω)
High-Side Gate Driver (DRHx)
On Resistance vs. Temperature
Temperature (°C)
Pull up Pull down
8
7
6
5
4
3
2
1
0
PAC5222
Power Application Controller
Typical Performance Characteristics (Continued)
+9F99$J$F9'F5°C unless otherwise specified.)
-40 0 40 80 120
500
400
300
200
100
0
PACASPD-009
Turn-On Delay (ns)
High-Side Gate Driver (DRHx)
Turn-On Delay vs. Temperature
Temperature (°C)
00b setting (default)
11b setting
10b setting
CL = 1nF
01b setting
-40 0 40 80 120
500
400
300
200
100
0
PACASPD-011
Turn-Off Delay (ns)
High-Side Gate Driver (DRHx)
Turn-Off Delay vs. Temperature
Temperature (°C)
CL = 1nF
00b setting (default)
11b setting
10b setting
01b setting
PAC5222
Power Application Controller
13. ADC WITH AUTO-SAMPLING SEQUENCER
13.1. Block Diagram
Figure 13-1. ADC with Auto-Sampling Sequencer
ADC
AHB/APB
ADC WITH AUTO-SAMPLING SEQUENCER
ADx
MUX
ADC PRE-MUX
VTEMP, VMON, VREF/
2
REGISTER
EMUX
S/H
10-BIT
ADC
DAxP
DAxN
DIFFERENTIAL PGA
DIFF-PGA
MUX
CONFIGURABLE ANALOG FRONT END
CASM
AUTO-SAMPLING
SEQUENCER
ADC RESULT REGISTERS
(16)
EMUX CONTROL
STATE MACHINE 1
STATE MACHINE 0
REGISTER
REGISTER
REGISTER
PAC5222
Power Application Controller
13.2. Functional Description
13.2.1. ADC
!'##!"!+4,# #! "" #((.#%!## !+$,4*#! μs conversion
time and (!0$$"(##!4#(!""5 ")#'##')%:!:8)! !%""5
#!!'%!#(.* "!#)%(!'#"!4.#(! ')%(!#(! #
#!)#2!3'+23,#"'#(!'#))!##(!(# 4"")#')
(!#(!#" # '"#!(!!%#""!*" ## )## '
13.2.2. Auto-Sampling Sequencer
* #'('! ').# ! %(# /" !! %"# * # %(# #!4 *#!!
#!"!#)%%#""!"3"! %(# /" !!%"#"(%%'!!5' !(
!8 %( "#!4 !# !)%'#))!#(! !"!!40CP'4%.
* !("# !#%#)!$:1#!)#)!' %(# !!)!! %(#
/""("# !#' #!#% 64)!# "#!'=0' +#!**
!#,;! ((! % !!(#( "%*! %(# /" !!%"#!#
!!*#!)## %(#
! %(# /""#!(!!%#""!*#!" # /"# )## '
13.2.3. EMUX Control
''#"!'*!"#!)""!!! %(# /"# !"!* "#!4
(%!#(.' !#:' !#!$:1"#"#!#!")#)!'*#"5!"5
" # )%!#(#(! *#!!%#""!#!"!#
13.3. Electrical Characteristics
Table 27. ADC and Auto-Sampling Sequencer Electrical Characteristics
(VSYS = VCCIO = 5V, VCC33 = 3.3V, VCC18 = 1.8V, and TA = -40°C to 105°C unless otherwise specified.)
PAC5222
Power Application Controller
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
ADC
)47O 4" #""5#(! 01-
!4<A9 4" #!#% )47OF01- μs
4 !# #!
4))"!# !# #!
4'#))!###!+4A7, ± 7$6
4#!##!+;A7, ± 7$6
4)) ! R2$
4# R2$
Reference Voltage
9324 4)"!#(! 9
Sample and Hold
!4$1 4 %(''!#% )47OF01- 88 ns
4; 4#(!"("#!" (2
Input Voltage Range
94;A 4#(!! 4%!#(.#(! 9324 9
EMUX Clock Speed
)30CP7O 30CP#""5#(! 01-
PLL Clock Speed
)<C77 77!(!)/" TAF°C to 85°C 01-
TAF8°C to 105°C 8 01-
PAC5222
Power Application Controller
14. MEMORY SYSTEM
14.1. Features
32kB embedded FLASH
100,000 program/erase cycles
10 years data retention
8kB SRAM
14.2. Block Diagram
B
Figure 14-1. Memory System
8kB
SRAM
AHB/APB
MEMORY SYSTEM
1kB FLASH
PAGES
FLASH
256B INFO
ROM
INFO ROM SRAM
PAC5222
Power Application Controller
14.3. Functional Description
'#" %!#(5 )%'''27$1%%$0%% * (#("!# ! !!
(%"" ##)!%%%(
14.3.1. Program and Data FLASH
56#( )56"# #)(%'!%%3")!%"#'##' '*#!!
!*#!%#""!# ."!#(%)%$0
14.3.2. SRAM
C(!856"!# )$0# #)( # !!'! !$0%% ((! *'
+!,)*'+!,'!'' #'"" %#""!%."!"'!)$0)!#%
"#!#"((#"!# *%'#)#!"!! )27$1%%
8
PAC5222
Power Application Controller
14.4. Electrical Characteristics
Table 28. Memory System Electrical Characteristics
(VSYS = VCCIO = 5V, VCC33 = 3.3V, VCC18 = 1.8V, and TA = -40°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
Embedded FLASH
!34S27$1 27$1'!#%
!=;3S27$1 27$1*#!!#% μ
!3$3S27$1 27$1( !#% %
A3$3S27$1 27$1(%: "" 5 ""
!4S27$1 27$1'!!!#
SRAM
!$0 $0"" ""!#%
PAC5222
Power Application Controller
15. CLOCK CONTROL SYSTEM
15.1. Features
Ring oscillator with 7.5MHz, 9.6MHz, 13.8MHz, and 25.7MHz settings
High accuracy 2% trimmed 4MHz RC oscillator
Crystal oscillator driver supporting 2MHz to 10MHz crystals
External clock input up to 40MHz
PLL with 1MHz to 25 MHz input, and 3.5MHz to 100MHz output
/1 to /8 clock divider for HCLK
/1 to /128 clock divider for ACLK
15.2. Block Diagram
Figure 15-1 Clock Control System
XIN
XOUT
EXTCLK
MUX
CRYSTAL
DRIVER
2% RC
OSCILLATOR
RING
OSCILLATOR
PLL
MUX
DIV
DIV
HCLK
CLOCK SOURCES PLL CLOCK TREE
DIV
RTCDIV
WDT
DIV WIC
DIV ADC
DIV
CORTEX M0
SYSTICK
SRAM
FLASH
DIV UART
DIV I2C
DIV SOC BUS
DIV SPI
DIV ADC EMUX
CLOCK
GATING
TIMERS A, B, C & D
CLOCK
GATING
CLOCK
GATING
ACLK
FCLK
FRCLK
CLOCK CONTROL SYSTEM
TIMERDIV
FRCLK
PAC5222
Power Application Controller
15.3. Functional Description
""5"! !%" *#')((#"!#
15.3.1. Free Running Clock (FRCLK)
)#""5+27O,# !')%)!""5 " D# "#!!#%%' "#!
" !'#.!""5#(!27O# ')!!#%""5+,*!"'!#%G+=4,#(!!
!7727O "!""5! !%#*(*' (%'
15.3.2. Fast Clock (FCLK)
) !""5+27O,# !')%!77 ((#'!27O'#"!27O ((# !*!"'
!#%+=4,4*5(#!(!"!+=;,$ #"5!#%%® !.®0(#(# ('""5
+17O,'* ('""5+7$7O,
15.3.3. High-Speed Clock (HCLK)
# ('""5+17O,# '#')%!27O*#!::::8'##';! ((# !(#(16:6
#% !4''!#%"! $;#!)";#!)"C#!)"30CP#!)"$<#'
#!)"'%% !%'" # 01-
15.3.4. Auxiliary Clock (ACLK)
.##""5+7O,# '#')%27O*#!::!:8'##'' ((# !!#%''' !#%
"5 ;!"""5') ! *!17O'" # 01-
15.3.5. Clock Gating
""5! ((! ""5!##'( (%')!!#%"54$;#!)";#!)"C
#!)"%% !%'!%®!.®0#! )
15.3.6. Ring Oscillator (ROSC)
#!!'# "#!(#' '#))!""5 *#!B01-01-801-'B01- !!# )!
!!""5!* ')! !!# ""5#(!*#!!* !)/" !!#
15.3.7. Trimmed 4MHz RC Oscillator
R!#%%'01- "#!(#' ""!""5 #!)%((#"!# ;!# '!'#!
""5)!0!#0'*0
15.3.8. Internal Slow RC Oscillator
#!51- "#!# ''# !!(!(#'##!#""5!"#"#!;!# ! '
""5#(!!!""5!
15.3.9. Crystal Oscillator Driver
(!#" ! "#!'#"'#" ! )%01-!01-!(#'#""!' !""5
#!! !%
15.3.10. External Clock Input
""5!" ((#'*#!.!""5(!01-
15.3.11. PLL
#!!'77#(!""5# ((#'!27O*#!#(!)/")01-!01-77
!(!)/"# 'M !)%01-!01-
PAC5222
Power Application Controller
15.4. Electrical Characteristics
Table 29. Clock Control System Electrical Characteristics
+9$J$F9;<F99F998F89'F°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
Clock Tree (FRCLK, FCLK, HCLK, and ACLK)
)27O 2#""5)/" 01-
)27O 2 !""5)/" 01-
)17O 1# ('""5)/" 01-
)7O .##""5)/" 01-
Internal Oscillators
)<$ # "#!)/"
2/" !!#F B
01-
2/" !!#F
2/" !!#F 8
2/" !!#F B
);0 #%%' "#!)/"
F° R R
01-
F°!° R R
#%%' "#!""5M#!! F°!8° R
Crystal Oscillator Driver
9;1SP;A P;A##(!! •98 9
9;7SP;A P;A*#(!! •98 9
)P7 ! "#!)/" 01-
"%%''"("#!#'
)P7F01-!01-
(2)P7F01-!01-
)P7F01-!01-
3.!"#"#!3$
)P7F01-!01-
Z)P7F01-!01-
)P7F01-!01-
External Clock Input
)3P7O 3.!""5#(!)/" 01-
!1;E1S3P7O 3.!""5#!#%
!7<=S3P7O 3.!""5*!#%
PLL
);A77 77#(!)/" 01-
)<C77 77!(!)/" 01-
77 !!#!#% %
77(#'M#!!
0$
(
5!(5 ±
PAC5222
Power Application Controller
16. ARM® CORTEX®-M0 MICROCONTROLLER CORE
16.1. Features
Arm® Cortex®-M0 core
Fast single-cycle 32-bit x 32-bit multiplier
24-bit SysTick timer
Up to 50MHz operation
Serial wire debug (SWD), with 4 break-point and 2 watch-point unit comparators
Nested vectored interrupt controller (NVIC) with 25 external interrupts
Wake-up interrupt controller (WIC) with GPIO, real-time clock (RTC) and watchdog timer (WDT) interrupts
enabled
Sleep and deep-sleep mode with clock gating
16.2. Block Diagram
16.3. Functional Description
%®!.®0%#""!"# ")#')#!!'#(!#'#"' !) ! #""
#!%!#(#'#!$ #"5!#%'"(!!)/")(!01-
%#""! !'"!'#!(!"!+A9;, ((! .!#!(! )!'#"& (#(
' !% 2*!"#!(!(" #!A9; ((! #!(!!#"##*5(
#!(!"!+=;,# !*5(!'#")%*(*%' #E;<#!(! * )%
!=4%®!.®0 ((! ! (''( (*(*%' '( (%'
((! ""5!#!#%#! !'(*)!
2#%*' ((!#"' 5(#!'*!"(#!#!"%(! #! #*#'+$=4,
(!" #*#'%"# %"'# '!(!'#""" !!)#%*#!)#'
Figure 16-1. Arm Cortex-M0 Microcontroller Core
SERIAL WIRE
DEBUG WITH
DISABLE
ARM®
CORTEX®-
M0
AHB/APB
ARM® CORTEX®-M0 MICROCONTROLLER CORE
1-CYCLE
32X32
MULTIPLIER
WAKE-UP
INTERRUPT
CONTROLLER
24-BIT
SYSTICK
SWDDA
SWDCL NESTED
VECTORED
INTERRUPT
CONTROLLER
PAC5222
Power Application Controller
16.4. Electrical Characteristics
Table 30. Microcontroller and Clock Control System Electrical Characteristics
(VSYS = VCCIO = 5V, VCC33 = 3.3V, VCC18 = 1.8V, and TA = -40°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
)17O 0#""!""5 17O 01-
;<S9$J$ 9$J$(!# (("!
)27OF)17OF)7OF<$77
'# 'C!S!""5 " 4
!#% ' ##!)"'# '
+, B
%
)27OF)17OF)7OF<$77
'# 'C!S!""5 " 4
!#% ' ##!)"'# '
+, B8
)27OF)17OF)7OF<$77
'# 'C!S!""5 " 4
!#% ' ##!)"'# '
+,
)27OF)17OF)7OF<$77
'# 'C!S!""5 " 4
!#% ' ##!)"'# '
B+,
)27OF)17OF)7OF7O3277'# '
C!S!""5 " 4!#%
' ##!)"'# '
+,
)27OF)17OF)7OF01-P777
'# 'C!S!""5 " 4
!#% ' ##!)"'# '
+, B
)27OF01-7O32)17OF01-)7O
F)<C77F01-C!S!""5
" 4!#% ' ##!)"
'# '
+,
;@S9;< 9;</# "! (("! %
+,%##%%(!# (("! )%!%(!
16.5. Typical Performance Characteristics
+VSYS = VCCIO = 5V, VCC33 = 3.3V, VCC18 = 1.8V, 'F5°C unless otherwise specified.)
0 20 40 60 80 100
25
20
15
10
5
0
PACMCU-001
IVCC18 (mA)
IVCC18 vs. PLL Frequency
PLL Frequency (MHz)
fHCLK = fACLK = fOUTPLL
fHCLK = 0.5•fOUTPLL,
fACLK = fOUTPLL
PAC5222
Power Application Controller
17. I/O CONTROLLER
17.1. Features
5V-compliant I/O PAx, PDx, PEx
3.3V-compliant I/O PCx
Configurable drive strength on PAx, PDx, PEx
Configurable pull-up or pull-down on PAx, PDx, PEx
17.2. Block Diagram
Figure 17-1. I/O controller
PAx, PDx, PEx
DIGITAL I/O
GPIO INPUT
VCCIO (5V/3.3V)
GPIO OUTPUT
OUTPUT ENABLE
DRIVE STRENGTH
PULL UP
PULL DOWN
VCCIO (5V/3.3V)
PCx
GPIO INPUT
GPIO OUTPUT
OUTPUT ENABLE
VCC33 (3.3V)
INPUT ENABLE
ADC MUX
AHB/APB
PERIPHERAL
PERIPHERAL
GPIO (PCx)
GPIO (PAx, PDx, PEx)
PAC5222
Power Application Controller
17.3. Functional Description
" ((!(!(! *#!8;:< ")%..4.'3.#''#!#!!;:< !
)!'..4.'3.(! #!(!"(##!*#!")##!(!'
.4.'3.;:< 9;< !;:< ((!!!# 9')!(! +'9#)%)"!,
'#"!"")#' 8%% ((!*5(('('*! .!
"%(!
. 9 #! ;:< ((!'#"!# )#.'!8%! "#!'*#!
#(! 4!4!!4
17.4. GPIO Current Injection
C'%(!#! '!"!#M"!'#!!E;< !'#"'!!E;<!*
'!E;< ((!#M"!'"" *!E;<(#!# !9*!
!E;< ((I9
;'(#' ! !#*!# #!!#"" !# '#"* %%!)#M"!'"!#!!
E;<(# !#'." #5'#"'%
2#)%!#!E;<"!#M"!#! ' ! !%.#%%(%! )!# '#"
$ !#'(!#*#!!E;<(#!!!!E;< ((*!E;<(#!# !
9% !#'"'#)!#%)!'#"E;<"!#M"!# '!%("'#!#
9# ! (()E;<(#'9;<# ! (()!E;<(#
PAC5222
Power Application Controller
17.5. Electrical Characteristics
Table 31. I/O Controller Electrical Characteristics
(VSYS = VCCIO = 5V, VCC33 = 3.3V, VCC18 = 1.8V, and TA = -40°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
PAx, PDx, PEx (5V Operation)
9;1 1##(!! 9;<F9 9
9;7 7*#(!! 9;<F9 8 9
;<7 7*!(! #5"! 9;<F9
9<7F9
4# !! !!#F B
%
4# !! !!#F
;<1 1#!(! ""! 9;<F9
9<1F9
4# !! !!#F B
%
4# !! !!#F
C =5(( # !" 9;<F9 8B kΩ
4 =5('* # !" 9;<F9 8 kΩ
;;7 ;(!5"! F° 10 μ
PAx, PDx, PEx (3.3V Operation)
9;1 1##(!! 9;<F9 9
9;7 7*#(!! 9;<F9 8 9
;<7 7*!(! #5"! 9;<F9
9<7F9
4# !! !!#F
%
4# !! !!#F 8
;<1 1#!(! ""! 9;<F9
9<1F9
4# !! !!#F
%
4# !! !!#F 8
C =5(( # !" 9;<F9 B B kΩ
4 =5('* # !" 9;<F9 8 kΩ
;;7 ;(!5"! F° 10
PCx (3.3V Operation)
9;1 1##(!! 9F9 9
9;7 7*#(!! 9F9 8 9
;<7 7*!(! #5"! 9F99<7F9 B %
;<1 1#!(! ""! 9F99<1F9 B %
;;7 ;(!5"! F° 10
B
PAC5222
Power Application Controller
18. SERIAL INTERFACE
18.1. Block Diagram
18.2. Functional Description
'#" (!! ##!)" D;C'$;
18.2.1. I2C Controller
;"!# ")#(#(!!" ((!# %' )(!#D
I2C master operation
Normal mode (100kHz), fast mode (400kHz), or fast mode plus (1MHz)
Single and multi-master
Synchronization (multi-master)
Arbitration (multi-master)
7-bit or 10-bit slave addressing
I2C slave operation
Normal mode (100kHz), fast mode (400kHz), or fast mode plus (1MHz)
Clock stretching
7-bit or 10-bit slave addressing
;(#(%(!#!(#"")#'!#!(!'#)!"#'! %#!
8
Figure 18-1. Serial Interface
SCL
SERIAL INTERFACE
SDA
I2C
MASTER
I2C
SLAVE
I2C
AHB/APB
SPICLK
SPIMISO
SPI
MASTER
SPI
SPIMOSI
SPICS0, 1, 2
TX
RX
16550-COMPATIBLE
UART
UART
SPI
SLAVE
PAC5222
Power Application Controller
'!
18.3. UART Controller
C(#(# ")#(#(!!" ((!# )! '%' )(!#D
Programmable clock selection
National Instruments PC16550D compatible
16-deep transmit and receive FIFO and fractional clock divisor
Up to 3.125Mbps communication speed (with HCLK = 50MHz)
C(#(%(!#!(#"")#'!#!(!'#)!"#'
! %#!'!
18.4. SPI Controller
'#""!# $;"!!!"" '##!% ! (!#*#!!)*#)! D
SPI master operation
Control of up to three different SPI slaves
Operation up to 25MHz
Flexible multiple transmit mode for variable-size SPI data with user-defined chip-select behavior
Chip select “shaping” through programmable additional delay for chip-select setup, hold and wait time
for back-to-back transfers
SPI master or slave operation
Supports clock phase and polarity control
Data transmission/reception can be on 8-, 16-, 24- or 32-bit boundary
Selectable data bit ordering (LSB or MSB first)
Programmable chip select polarity
Selectable “auto-retransmit” mode
$;(#(%(!#!(#"")#'!#!(!'#)!"#'! %#!
'!
PAC5222
Power Application Controller
18.5. Dynamic Characteristics
Table 32. Serial Interface Dynamic Characteristics
(VSYS = VCCIO = 5V, VCC33 = 3.3V, VCC18 = 1.8V, and TA = -40°C to 105°C unless otherwise specified.)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNI
T
I2C
);7O ;#(!""5)/"
$!''%'+51-, 8 01-
2 !%'+51-, 8 01-
2 !%'( +01-, 01-
UART
)C7O C#(!""5)/" )17O: 01-
C'! )17OF01- 0(
SPI
)$;7O $;#(!""5)/"
0 !%' )17O: 01-
$%' )17O: 01-
PAC5222
Power Application Controller
Table 33. I2C Dynamic Characteristics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
)$7 $7""5)/"
$!''%'
2 !%'
2 !%'(
51-
!7<= $7""5*
$!''%' B
2 !%'
2 !%'(
N
!1;E1 $7""5#
$!''%'
2 !%'
2 !%'(
N
!14S$ 1'!#%)(!'$"'#!#
$!''%'
2 !%'
2 !%'(
N
!$CS$
$!(!#%)(!'$
"'#!#
$!''%' B
2 !%'
2 !%'(
N
!14S4 4!'!#%
$!''%'
2 !%'
2 !%'(
N
!$CS4 4! !(!#%
$!''%'
2 !%'
2 !%'(
!$CS$< $!(!#%)$<"'#!#
$!''%'
2 !%'
2 !%'(
N
!6C2
6 )!#%!*$<'$
"'#!#
$!''%' B
2 !%'
2 !%'(
N
!# !#%)$4'$7
$!''%'
2 !%'
2 !%'(
!)2!#%)$4'$7
$!''%'
2 !%'
2 !%'(
("#!#')" #
$!''%'2 !%' (2
2 !%'( (2
PAC5222
Power Application Controller
Figure 18-2. I2C Timing Diagram
S Sr P S
SDA
SCL
tHD;STA
tHIGH
tLOW
tSU;STA
tr
tf
tBUF
tSU;STO
tf
tr
tSU;DAT
tHD;DAT
PAC5222
Power Application Controller
Table 34. SPI Dynamic Characteristics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
!$7OS1;E1 $;7O;(!1##%
!$7OS7<= $;7O;(!7*#%
!$$S$7O $;$!$;7O#%
!$$S0<$; $;$!$;0;$<1##%('"!#%
!+$7O, $;7O# #%
!)+$7O, $;7O2#%
!+0<$;, $;0;$<# #%
!)+$0<$;, $;0;$<2#%
!$CS0;$< $;0;$<$!(#%
!1S0;$< $;0;$<1'#%
$;7OF01-
Figure 18-3. SPI Timing Diagram
SPICSn
SPICLK
[SPICFG.RCVCP = 0b]
SPIMOSI
SPIMISO
SPICLK
[SPICFG.RCVCP = 1b]
tSS;CLK tf(SCLK)
tr(SCLK)
tr(MOSI)
tf(MOSI)
tSS;MOSI
tSU;MISO
tH;MISO
tSCLK;HIGH
tSCLK;LOW
PAC5222
Power Application Controller
19. TIMERS
19.1. Block Diagram
Figure 19-1. Timers A, B, C, and D
PWMA0, PWMA1,
PWMA2, PWMA3
TIMERS A, B, C, AND D
AHB/APB
DEAD TIME
GENERATOR
PWMA4, PWMA5,
PWMA6, PWMA7
CAPTURE &
COMPARE
CAPTURE &
COMPARE
TIMER A
16-BIT
PWMB0 DEAD TIME
GENERATOR
PWMB1
CAPTURE &
COMPARE
CAPTURE &
COMPARE
PWMC0 DEAD TIME
GENERATOR
PWMC1
CAPTURE &
COMPARE
CAPTURE &
COMPARE
PWMD0 DEAD TIME
GENERATOR
PWMD1
CAPTURE &
COMPARE
CAPTURE &
COMPARE
TIMER B
16-BIT
TIMER C
16-BIT
TIMER D
16-BIT
TIMER A PWM
TIMER B PWM
TIMER C PWM
TIMER D PWM
SYNC
PAC5222
Power Application Controller
19.2. Functional Description
'#"#"' !#% D!#%!#%6!#%!#%4*!"'!#%+=4,*!"'!#%*5(
!#%!#%""5+,'$ #"5!#%'#" ((! (!'#))!=0 # ' (!B''
!#%"! #% 6'4"""!!'! "#-! #""5' !!: !( #)
((#"!# !!/# "#-'!#%(#'!*!#%
19.2.1. Timer A
#%# (( #!!#%*#!8=0:"(!'"%(#! ;! (# )=0 # ##!
''!#% "! #%" ""!!' *#!!#% 6'4! "#-!=0:"(! '
"%(#! ;!" #!7O17O ""5#(!*#!''#!#""5'##')%:!:8
19.2.2. Timer B
#%6# (( #!!#%*#!=0:"(!'"%(#! ;! (#)=0 # #
#!''!#%"! * ''#!#"%(#! !!" ')''#!# !%!#% )
#!(! #%6"""!!'*#!!#% '4! "#-!=0:"(!'"%(#! ;!"
#!7O17O ""5#(!*#!''#!#""5'##')%:!:8
19.2.3. Timer C
#%# (( #!!#%*#!=0:"(!'"%(#! ;! (#)=0 # #
#!''!#%"!#%"""!!'*#!!#% 6'4! "#-!=0:"(!'
"%(#! ;!" #!7O17O ""5#(!*#!''#!#""5'##')%:!:8
Figure 19-2. SOC Bus Watchdog and Wake-Up Timer
SOC BUS
WATCHDOG
WAKE-UP
TIMER
SOC
SOC BUS
AHB/APB
SOC BUS WATCHDOG AND WAKE-UP TIMER
Figure 19-3. Real-Time Clock and Watchdog Timer
WDT
24-BIT
RTC
24-BIT
AHB/APB
REAL-TIME CLOCK AND WATCHDOG TIMER
PAC5222
Power Application Controller
19.2.4. Timer D
#%4# (( #!!#%*#!=0:"(!'"%(#! ;! (#)=0 # #
#!''!#%"!#%4"""!!'*#!!#% 6'! "#-!=0:"(!'
"%(#! ;!" #!7O17O ""5#(!*#!''#!#""5'##')%:!:8
19.2.5. Watchdog Timer
#!*!"'!#%+=4," ')!#%(#'% %! (#'#"*5()% (%'
*!"'!#%" ' !%*!"' #!!#%!*!"'!#%" #!
27O27O ""5#(!*#!''#!#""5'##')%:!:
19.2.6. SOC Bus Watchdog Timer
*!"'!#%# '!%#!#!$<6 "%%#"!#;!*#!#'#" !#)!# $<
6 "%%#"!#!!23) 8
19.2.7. Wake-Up Timer
*5(!#%" ')*(*#!' (%' !*5(!%#""!(#'#"
;!"")#'!% % % 8
19.2.8. Real-Time Clock
#!!#%""5+," ')!#%% %! *""!""5 "# '# !#%"
')(#'#"*5()% (%' 27O ""5#(!*#!''#!#""5'##'
)%:!:
PAC5222
Power Application Controller
20. THERMAL CHARACTERISTICS
Table 35. Thermal Characteristics
PARAMETER VALUE UNIT
<(!#%#!!%(! ! H
<(!#M"!#!%(! ! H
$!!%(! ! H
7'!%(!+$'# "' , H
"!#!" !% # !"+θJC)8B H:=
"!#!%#!!% # !"+θJA) H:=
B
PAC5222
Power Application Controller
21. APPLICATION EXAMPLES
)*# #%(#)#''#% *'#))!.%( )((#"!# )!((#"!#! )'!#'
' #' "#(!#
8
Figure 21-1. 3-phase Motor Drive Using PAC5222 (Simplified Diagram)
VHM
PAC5222 DRM
CSM VP
DRHx
DRLx
DRSx
DRBx
DAxP, DAxN
INTERFACE
MONITORING
SIGNALS
GPIO
VBAT
M
VP
PAC5222
Power Application Controller
22. PACKAGE OUTLINE AND DIMENSIONS
22.1. TQFN66-48 Package Outline and Dimensions
PAC5222
Power Application Controller
4#% #
Millimeters Inches
Dimensions Min. Max. Min. Max.
B 8 8
8
4 B
4 B
3 B
3 B
7 B
O 8
B
PAC5222
Power Application Controller
23. LEGAL INFORMATION
(#
