L
10 PH20V
15 mA
R1
510k
R2
33k
LM2703
SW
FB
GND
VIN
SHDN
D
1
2
3
4
5
VIN = Li-Ion
4.7 PF
CIN
CIN: Taiyo Yuden Ceramic
COUT: Taiyo Yuden Ceramic
L: Coilcraft DT1608C-103 or Murata
LQY33PN100M02
(low profile)
D: Motorola MBRM130LT3
1 PF
COUT
LM2703
www.ti.com
SNVS172F FEBRUARY 2002REVISED MAY 2013
LM2703 Micropower Step-Up DC/DC Converter with 350mA Peak Current Limit
Check for Samples: LM2703
1FEATURES DESCRIPTION
The LM2703 is a micropower step-up DC/DC in a
2 350mA, 0.7, Internal Switch small 5-lead SOT-23 package. A current limited, fixed
Uses Small Surface Mount Components off-time control scheme conserves operating current
Adjustable Output Voltage up to 21V resulting in high efficiency over a wide range of load
conditions. The 22V switch allows for output voltages
2.2V to 7V Input Range as high as 21V. The low 400ns off-time permits the
Input Undervoltage Lockout use of tiny, low profile inductors and capacitors to
0.01µA Shutdown Current minimize footprint and cost in space-conscious
portable applications. The LM2703 is ideal for LCD
Small 5-Lead SOT-23 Package panels requiring low current and high efficiency as
well as white LED applications for cellular phone
APPLICATIONS back-lighting. The LM2703 can drive up to 4 white
LCD Bias Supplies LEDs from a single Li-Ion battery.
White LED Back-Lighting
Handheld Devices
Digital Cameras
Portable Applications
Typical Application Circuit
Figure 1. Typical 20V Application
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2002–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
R1 = R2
VOUT
1.237V -1
SW
FB
GND
VIN
SHDN
LM2703
SNVS172F FEBRUARY 2002REVISED MAY 2013
www.ti.com
Connection Diagram
Top View
The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-
to-ambient thermal resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the
thermal resistance. The maximum allowable power dissipation at any ambient temperature is calculated using: PD
(MAX) = (TJ(MAX) TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die
temperature.
Figure 2. SOT23-5
TJmax = 125°C, θJA = 220°C/W
PIN DESCRIPTIONS
Pin Name Function
1 SW Power Switch input.
2 GND Ground.
3 FB Output voltage feedback input.
4 SHDN Shutdown control input, active low.
5 VIN Analog and Power input.
SW (Pin 1):Switch Pin.
This is the drain of the internal NMOS power switch. Minimize the metal trace area
connected to this pin to minimize EMI.
GND (Pin 2):Ground Pin.
Tie directly to ground plane.
FB (Pin 3):Feedback Pin.
Set the output voltage by selecting values for R1 and R2 using:
(1)
Connect the ground of the feedback network to an AGND plane which should be tied directly
to the GND pin.
SHDN (Pin 4):Shutdown Pin.
The shutdown pin is an active low control. Tie this pin above 1.1V to enable the device. Tie
this pin below 0.3V to turn off the device.
VIN (Pin 5): Input Supply Pin.
Bypass this pin with a capacitor as close to the device as possible.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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SNVS172F FEBRUARY 2002REVISED MAY 2013
Absolute Maximum Ratings (1)(2)
VIN 7.5V
SW Voltage 22.5V
FB Voltage 2V
SHDN Voltage 7.5V
Maximum Junction Temp. TJ(3) 150°C
Lead Temperature
(Soldering 10 sec.) 300°C
Vapor Phase
(60 sec.) 215°C
Infrared
(15 sec.) 220°C
ESD Ratings (4)
Human Body Model 2kV
Machine Model (5) 200V
(1) Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance. The maximum
allowable power dissipation at any ambient temperature is calculated using: PD(MAX) = (TJ(MAX) TA)/θJA. Exceeding the maximum
allowable power dissipation will cause excessive die temperature.
(4) The human body model is a 100 pF capacitor discharged through a 1.5 kresistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin.
(5) ESD susceptibility using the machine model is 150V for SW pin.
Operating Conditions
Junction Temperature
(1) 40°C to +125°C
Supply Voltage 2.2V to 7V
SW Voltage Max. 22V
(1) All limits ensured at room temperature and at temperature extremes. All room temperature limits are 100% production tested or
ensured through statistical analysis. All limits at temperature extremes are ensured via correlation using standard Statistical Quality
Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Electrical Characteristics
Specifications in standard type face are for TJ= 25°C and those in boldface type apply over the full Operating Temperature
Range (TJ=40°C to +125°C). Unless otherwise specified. VIN =2.2V. Min Typ Max
Symbol Parameter Conditions Units
(1) (2) (1)
IQDevice Disabled FB = 1.3V 40 70
Device Enabled FB = 1.2V 235 300 µA
Shutdown SHDN = 0V 0.01 2.5
VFB FeedbackTrip Point 1.189 1.237 1.269 V
ICL Switch Current Limit 275 350 400 mA
260 400
IBFB Pin Bias Current FB = 1.23V (3) 30 120 nA
VIN Input Voltage Range 2.2 7.0 V
RDSON Switch RDSON 0.7 1.6
TOFF Switch Off Time 400 ns
(1) All limits ensured at room temperature and at temperature extremes. All room temperature limits are 100% production tested or
ensured through statistical analysis. All limits at temperature extremes are ensured via correlation using standard Statistical Quality
Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) Feedback current flows into the pin.
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Electrical Characteristics (continued)
Specifications in standard type face are for TJ= 25°C and those in boldface type apply over the full Operating Temperature
Range (TJ=40°C to +125°C). Unless otherwise specified. VIN =2.2V. Min Typ Max
Symbol Parameter Conditions Units
(1) (2) (1)
ISD SHDN Pin Current SHDN = VIN, TJ= 25°C 0 80
SHDN = VIN, TJ= 125°C 15 nA
SHDN = GND 0
ILSwitch Leakage Current VSW = 22V 0.05 5 µA
UVP Input Undervoltage Lockout ON/OFF Threshold 1.8 V
VFB Feedback Hysteresis 8 mV
Hysteresis
SHDN SHDN low 0.7 0.3 V
Threshold SHDN High 1.1 0.7
θJA Thermal Resistance 220 °C/W
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0.05 2 6 10 14 18 22 26
LOAD CURRENT (mA)
35
45
55
65
75
85
95
EFFICIENCY (%)
VIN = 2.5V
VIN = 4.2V
VIN = 3.3V
VOUT = 20V
LM2703
www.ti.com
SNVS172F FEBRUARY 2002REVISED MAY 2013
Typical Performance Characteristics
Enable Current Disable Current
vs vs
VIN VIN
(Part Switching) (Part Not Switching)
Figure 3. Figure 4.
Efficiency Efficiency
vs vs
Load Current Load Current
Figure 5. Figure 6.
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SNVS172F FEBRUARY 2002REVISED MAY 2013
www.ti.com
Typical Performance Characteristics (continued)
Efficiency SHDN Threshold
vs vs
Load Current VIN
Figure 7. Figure 8.
Switch Current Limit Switch RDSON
vs vs
VIN VIN
Figure 9. Figure 10.
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Product Folder Links: LM2703
-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (°C)
120
121
122
123
124
125
FEEDBACK TRIP POINT (V)
FEEDBACK BIAS CURRENT (nA)
55
50
45
40
35
30
25
20
15
V
nA
0.05 2 6 10 14 18 22 26 30 38 55 75
LOAD CURRENT (mA)
11.85
11.90
11.95
12.00
12.05
12.10
12.15
12.20
OUTPUT VOLTAGE (V)
VIN = 5V
VIN = 4.2V
VIN = 3.3V
VIN = 2.5V
COUT = 1uF
VOUT = 12V
LM2703
www.ti.com
SNVS172F FEBRUARY 2002REVISED MAY 2013
Typical Performance Characteristics (continued)
FB Trip Point and FB Pin Current Output Voltage
vs vs
Temperature Load Current
Figure 11. Figure 12.
Step Response Start-Up/Shutdown
VOUT = 20V, VIN = 2.5V
VOUT = 20V, VIN = 2.5V 1) SHDN, 1V/div, DC
1) Load, 1mA to 10mA to 1mA, DC 2) IL, 200mA/div, DC
2) VOUT, 200mV/div, AC 3) VOUT, 20V/div, DC
3) IL, 200mA/div, DC T = 400µs/div
T = 50µs/div RL= 1.8k
Figure 13. Figure 14.
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SNVS172F FEBRUARY 2002REVISED MAY 2013
www.ti.com
OPERATION
Figure 15. LM2703 Block Diagram
VOUT = 20V, VIN = 2.5V
1) VSW, 20V/div, DC
2) Inductor Current, 200mA/div, DC
3) VOUT, 200mV/div, AC
T = 4µs/div
Figure 16. Typical Switching Waveform
The LM2703 features a constant off-time control scheme. Operation can be best understood by referring to
Figure 15 and Figure 16. Transistors Q1 and Q2 and resistors R3 and R4 of Figure 15 form a bandgap reference
used to control the output voltage. When the voltage at the FB pin is less than 1.237V, the Enable Comp in
Figure 15 enables the device and the NMOS switch is turned on pulling the SW pin to ground. When the NMOS
switch is on, current begins to flow through inductor L while the load current is supplied by the output capacitor
COUT. Once the current in the inductor reaches the current limit, the CL Comp trips and the 400ns One Shot turns
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IPK = ICL + VIN(max)
L
200ns
VOUT - VIN(min) + VD
ICL
L = TOFF
LM2703
www.ti.com
SNVS172F FEBRUARY 2002REVISED MAY 2013
off the NMOS switch.The SW voltage will then rise to the output voltage plus a diode drop and the inductor
current will begin to decrease as shown in Figure 16. During this time the energy stored in the inductor is
transferred to COUT and the load. After the 400ns off-time the NMOS switch is turned on and energy is stored in
the inductor again. This energy transfer from the inductor to the output causes a stepping effect in the output
ripple as shown in Figure 16.
This cycle is continued until the voltage at FB reaches 1.237V. When FB reaches this voltage, the enable
comparator then disables the device turning off the NMOS switch and reducing the Iq of the device to 40uA. The
load current is then supplied solely by COUT indicated by the gradually decreasing slope at the output as shown
in Figure 16. When the FB pin drops slightly below 1.237V, the enable comparator enables the device and
begins the cycle described previously. The SHDN pin can be used to turn off the LM2703 and reduce the Iqto
0.01µA. In shutdown mode the output voltage will be a diode drop lower than the input voltage.
APPLICATION INFORMATION
INDUCTOR SELECTION
The appropriate inductor for a given application is calculated using the following equation:
(2)
where VDis the schottky diode voltage, ICL is the switch current limit found in the Typical Performance
Characteristics section, and TOFF is the switch off time. When using this equation be sure to use the minimum
input voltage for the application, such as for battery powered applications. For the LM2703 constant-off time
control scheme, the NMOS power switch is turned off when the current limit is reached. There is approximately a
200ns delay from the time the current limit is reached in the NMOS power switch and when the internal logic
actually turns off the switch. During this 200ns delay, the peak inductor current will increase. This increase in
inductor current demands a larger saturation current rating for the inductor. This saturation current can be
approximated by the following equation:
(3)
Choosing inductors with low ESR decrease power losses and increase efficiency.
Care should be taken when choosing an inductor. For applications that require an input voltage that approaches
the output voltage, such as when converting a Li-Ion battery voltage to 5V, the 400ns off time may not be enough
time to discharge the energy in the inductor and transfer the energy to the output capacitor and load. This can
cause a ramping effect in the inductor current waveform and an increased ripple on the output voltage. Using a
smaller inductor will cause the IPK to increase and will increase the output voltage ripple further. This can be
solved by adding a 4.7pF capacitor across the RF1 feedback resistor (Figure 15) and slightly increasing the
output capacitor. A smaller inductor can then be used to ensure proper discharge in the 400ns off time.
DIODE SELECTION
To maintain high efficiency, the average current rating of the schottky diode should be larger than the peak
inductor current, IPK. Schottky diodes with a low forward drop and fast switching speeds are ideal for increasing
efficiency in portable applications. Choose a reverse breakdown of the schottky diode larger than the output
voltage.
CAPACITOR SELECTION
Choose low ESR capacitors for the output to minimize output voltage ripple. Multilayer ceramic capacitors are the
best choice. For most applications, a 1µF ceramic capacitor is sufficient. For some applications a reduction in
output voltage ripple can be achieved by increasing the output capacitor.
Local bypassing for the input is needed on the LM2703. Multilayer ceramic capacitors are a good choice for this
as well. A 4.7µF capacitor is sufficient for most applications. For additional bypassing, a 100nF ceramic capacitor
can be used to shunt high frequency ripple on the input.
Copyright © 2002–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LM2703
VIN
2.5V-4.2V
CIN
4.7 PF
Ceramic
L
10 PH
R2
82:
SW
FB
GND
VIN
SHDN
D
1
2
3
5
4
>1.1V
0V
COUT
1 PF
Ceramic
LM2703
CIN: Taiyo Yuden Ceramic
COUT: Taiyo Yuden Ceramic
L: Coilcraft DT1608C-103 or Murata
LQY33PN100M02 (low profile)
D: Motorola MBRM130LT3
LM2703
SNVS172F FEBRUARY 2002REVISED MAY 2013
www.ti.com
LAYOUT CONSIDERATIONS
The input bypass capacitor CIN, as shown in Figure 1, must be placed close to the IC. This will reduce copper
trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 100nF bypass
capacitor can be placed in parallel with CIN to shunt any high frequency noise to ground. The output capacitor,
COUT, should also be placed close to the IC. Any copper trace connections for the Cout capacitor can increase
the series resistance, which directly effects output voltage ripple. The feedback network, resistors R1 and R2,
should be kept close to the FB pin to minimize copper trace connections that can inject noise into the system.
The ground connection for the feedback resistor network should connect directly to an analog ground plane. The
analog ground plane should tie directly to the GND pin. If no analog ground plane is available, the ground
connection for the feedback network should tie directly to the GND pin. Trace connections made to the inductor
and schottky diode should be minimized to reduce power dissipation and increase overall efficiency.
Figure 17. White LED Application
Figure 18. Li-Ion 5V Application
10 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated
Product Folder Links: LM2703
L
10PH
R1
240k
R2
27k
SW
FB
GND
VIN
SHDN
D
1
2
3
4
5
LM2703
4.7PF
CIN
12V
70 mA
4.7PF
COUT
VIN
5V
L
10PH
R1
240k
R2
27k
SW
FB
GND
VIN
SHDN
D
1
2
3
4
5
LM2703
4.7PF
CIN
12V
22 mA
1PF
COUT
VIN
2.5-
4.2V
LM2703
www.ti.com
SNVS172F FEBRUARY 2002REVISED MAY 2013
Figure 19. Li-Ion 12V Application
Figure 20. 5V to 12V Application
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SNVS172F FEBRUARY 2002REVISED MAY 2013
www.ti.com
REVISION HISTORY
Changes from Revision E (May 2013) to Revision F Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 11
12 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM2703MF-ADJ NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 S48B
LM2703MF-ADJ/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 S48B
LM2703MFX-ADJ/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 S48B
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 2
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM2703MF-ADJ SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM2703MF-ADJ/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM2703MFX-ADJ/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM2703MF-ADJ SOT-23 DBV 5 1000 210.0 185.0 35.0
LM2703MF-ADJ/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LM2703MFX-ADJ/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 2
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