Winbond: eEchoe Electronics Carp. ore GENERAL DESCRIPTION The W24L10 is a normal-speed, very low-power CMOS static RAM organized as 131072 x 8 bits that operates on a wide voltage range from 2.7V to 3.6V power supply. The W24L10 family, W24L10- 7OLE, can meet the requirement of various operating temperature. This device is manufactured using Winbonda's high performance GMOS technology. FEATURES Low power consumption: - Active: 144 mW (max.} Standby: 18 pW (max.) Access time: 70 nS (max.} Single 3.3V power supply * Fully static operation All inputs and outputs directly TTL compatible PIN CONFIGURATIONS + Three-state outputs Battery back-up operation capability Data retention voltage: 2V (min.) Packaged in 450 mil SOP, standard type one W24L10 128K x 8 CMOS STATIC RAM TSOP (8 mm x 20 mm) and small type one TSOP (8 mm x 13.4 mm) BLOCK DIAGRAM ANG Al4 Bere Ay R o Ww D E c o o E R Ag Wot 08 WE cst ose OE CORE CELL ARRAY 1024 ROWS 128 48 COLUMNS Te AI5 A13 Aa AAD AITATO PIN DESCRIPTION SYMBOL DESCRIPTION we (ht 32 [] voo ae [he 31 [] ais aia Cs so [] cose ae (Ja 231] we ar Ls 2e[] ais as Ls 27 |] a8 as 7 ze Ll as M4 (Js zs[] an a3 (Ja 24] OF a2 []io pa] ato at in 22[] csi Ao q 12 Bi i er] voi [is 20/] vor voz [J14 19] vos vos [Jas 1e[] vos Ves []is 7D vos aiofro ase AB 3 Ais Co 4 ECa Ss cst J 6 ee Do OS 22-pin wes bt 780? " Al2 C4 12 A? CUT 13 ABC 14 AS Co 18 A0-A16 Address Inputs 01-08 | Data Inputs/Outputs CS1, cso | Chip Select Input WE Write Enable Input OE Qutput Enable Input VDD Power Supply Vss Ground NG No Gonnection Publication Release Date: February 1999 Revision A3W24L10 Atty & Winbond TRUTH TABLE csi | CS2| OF | WE MODE /01- /O8 Vop CURRENT H Xx x Xx Not Selected High 7 Isp, ISBi x L x x Not Selected High 2 ISB, ISB1 L H H H Output Disable High 7 IDD L H L H Read Data Out IDD L H x L Write Data In IDD DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER RATING UNIT Supply Voltage to Vss Potential -0.5 to +4.6 V Input/Output to Vss Potential -0.5 to VoD +0.5 V Allowable Power Dissipation 1.0 Ww Storage Temperature -65 to +150 C Operating Temperature SL 0 to 70 G LE -20 to 85 C LI -40 to 85 C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. Operating Characteristics (VDD = 2.7 to 3.6V; Vss = OV: TA (C) = O to 70 for SL; -20 to 85 for LE; -40 to 85 for LI) PARAMETER SYM. TEST CONDITIONS MIN. MAX. UNIT Input Low Voltage VIL - -0.5 +0.6 V Input High Voltage VIH - +2.0 | VoD +0.5 V Input Leakage Current Iu! VIN = Vss to VoD -1 +1 pA Output Leakage Current ILO VI/O = Vss to Vop, -1 +1 LA C81 = VIH(min.) or CS2 = VIL (max.) or OE =VIH (min.) or WE = VIL (max.) Output Low Voltage VOL loL = +2.1 mA - 0.4 V Output High Voltage VOH IOH = -1.0 mA 2.2 - Vv Operating Power Supply IDD CS1 = VIL (max.) and - 40 mA Current CS2 = VIH (max.), /O =0 mA, Cycle = min. Duty = 100%cE, G Winbond NE Flectronics Corn. W24L10 SRR TITIES Operating Characteristics, continued PARAMETER SYM. TEST CONDITIONS MIN. MAX. UNIT Standby Power Supply Current ISB CS1 = VIH (min.) or - 1 mA CS2 = VIL (max.) Cycle = min. Duty = 100% IsB1_ | CS1 > Vpp -0.2V or - 5 LA CS2 < 0.2V Note: Typical parameter is measured under ambient temperature TA = 25 C and Vpp = 3.3V CAPACITANCE (VpD = 3.3 V, TA = 25 C, f= 1 MHz) PARAMETER SYM. CONDITIONS MAX. UNIT Input Capacitance CIN VIN =O0V 6 pF Input/Output Capacitance Cro VOUT = OV 8 pF Note: These parameters are sampled but not 100% tested. AC characteristics AC Test Conditions PARAMETER CONDITIONS Input Pulse Levels OV to 2.4V Input Rise and Fall Times 5ns Input and Output Timing Reference Level 1.5V Output Load See the drawing below AC Test Loads and Waveform 1 TTL 1 TTL OUTPUT OUTPUT 100 pF 5 pF I Including I including ~ Jig and ~ Jig and Scope Scope (For Tez, ToLz, TcHz, ToH7, TWH, Tow) 24V0 rou% 90% av 10% 10% 58 5ns Publication Release Date: February 1999 Revision A3W24L10 Athy @ Winbond SOR Electronics Corn, SIRES I SIDS IIIS IIIS II IIIS AC Characteristics, continued (VDD = 2.7 to 3.6 V; Vss = OV; Ta (C) = 0 to 70 for SL; -20 to 85 for LE; -40 to 85 for LI) Read Cycle PARAMETER SYMBOL MIN. MAX. UNIT Read Cycle Time TRC 790 - ns Address Access Time TAA - 70 ns Chip Select Access Time TACS - 10 ns Output Enable to Output Valid TAOE - 35 ns Chip Selection to Output in Low 2 TCLz* 10 - ns Output Enable to Output in Low 7 TOLZ* 5 - ns Chip Deselection to Output in High Z TCHz* - 30 ns Output Disable to Output in High 2 TOH2* - 30 ns Output Hold from Address Change TOH 10 - ns * These parameters are sampled but not 100% tested Write Cycle PARAMETER SYMBOL MIN. MAX. UNIT Write Cycle Time TWe 70 - ns Chip Selection to End of Write Tow 55 - ns Address Valid to End of Write TAW 55 - ns Address Setup Time TAS 0 - ns Write Pulse Width TWP 50 - ns Write Recovery Time CS1, CS2, WE TWR 0 - ns Data Valid to End of Write Tow 45 - ns Data Hold from End of Write TBH 0 - ns Write to Output in High 4 TWHz* - 25 ns Output Disable to Output in High 7 TOHzZ* - 25 ns Output Active from End of Write Tow 5 - ns * These parameters are sampled but not 100% testedW24L10 Winbond fetthey, SPIRIT, TIMING WAVEFORMS Read Cycle 1 (Address Controlled) a TRC _...... * Address x KTH Ta I Tox Read Cycle 2 (Chip Select Controlled) =e VAS Cs2 SILL LLY m Tez | M TCHZ Dour Read Cycle 3 (Output Enable Controlled) Address DouT Publication Release Date: February 1999 -5- Revision A3W24L10 ThE, Winbond ett SOP I III III TTI, Timing Waveforms, continued Write Cycle 1 | Twe ! Address % x Twa S AANA O77 7LZ7Z ose LLL LLL Sf NAAAAANAS TAW WE oy N \ _ / wa 4 DeUT > ? ? ? ? > ? (= TOH DIN Write Cycle 2 (OE = ViL Fixed) Twe Address * i# Tow wTwr fe _ mm AAAAAANA LL a SII A YW TAW WE NR \ \ he TwHz 1,4 Dour a Tow ele TDH . << OXXXXX Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. The data output from Dout are the same as the data written to Din during the write cycle. 3. Bout provides the read data for the next address. 4. Transition is measured +500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.an G Winbond NE Flectronics Corn. W24L10 SRR TITIES DATA RETENTION CHARACTERISTICS (TA (C) = 0 to 70 for SL; -20 to 85 for LE; -40 to 85 for LI) PARAMETER SYM. TEST CONDITIONS MIN. | TYP. | MAX. | UNIT VoD for Data Retention VDR C&S1 > Vpp -0.2V or 2.0 - - Vv CS2 < 0.2V Data Retention Current IDDDR + | GSi = VpD -02V or - - 5 LA CS2 < 0.2V, VoD = 3V Chip Deselect to Data TcDR |See data retention waveform} 0 - - ns Retention Time Operation Recovery Time TR TRC* - - ns * Read Cycle Time DATA RETENTION WAVEFORM cs2 W\\\ N VDR2 2V CS12Vpp-0.2V OV $CS2 <0.2V Publication Release Date: February 1999 Revision A3W24L10 an G Winbond NE Flectronics Corn. SRR TITIES ORDERING INFORMATION PART NO. ACCESS OPERATING OPERATING PACKAGE TIME (nS) VOLTAGE (V) | TEMPERATURE ( C) W24L10S-70SL 70 2.7V to 3.6V 0 to 70 450 mil SOP We24L198T-70SL 70 2.7V to 3.6V 0 to 70 Standard type one TSOP W24L10Q-70SL 70 2.7V to 3.6V 0 to 70 Small type one TSOP We4L10S-70LE 70 2.7V to 3.6V -20 to 85 450 mil SOP W24L10T-70LE 70 2.7V to 3.6V -20 to 85 Standard type one TSOP W24L10Q-70LE 70 2.7V to 3.6V -20 to 85 Small type one TSCP W24L108-70L| 70 2.7 to 3.6V -40 to 85 450 mil SOP We4L10T-70OLI 70 2.7V to 3.6V -40 to 85 Standard type one TSOP W24L10Q-70LI 70 2.7 to 3.6V -40 to 85 Small type one TSOP Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure.aq52 . inbond ott Electronics Corn, fetthey, W24L10 SRR TITIES PACKAGE DIMENSIONS 32-pin SOP Wide Body BARARRAARRRARRRE 4 oO 6 HEHEEERHER ERE E : : Detail F Symbol Dimension in Inches Dimension in mm Min. | Nom. | Max. | Min. |Nom. | Max. A | |atta | | | 300 Ay ood | | Joto | | Az o1o1 joios jaiti | esr | 2eq | zaz b 0.014 [0.018 |ooz | 028 | 041 | 051 G e008 jocos [aotz |ois | oso | ost D |osos josty | |2o45 |zo7s E o44o [o445 |odso [11.18 [itao0 [11.43 fe 0.044 )o.oso | G08 | 142 | ter | 142 He o5da joss |O.558 [1387 [1412 |14.38 L 0.023 joost |ooe joss |ore | og Le oo47 |ooss |aoss | 1.19 | 140 | 120 s | Jame | | Jos | Joos | | } oto 6 o | | 10 o | | 10 Notes: Dimensions D Max. & S include mold flash Controlling dimension: Millimeters ay or tie bar burrs. 2. Dimension b does net include dambar a c protrusion/intrusion. i | 3. Dimensions D & E include mold mismatch 1 i + and determined at the mold parting line. 4, Controlling dimension: Inches L 5. General appearance spec should be based - on final visual inspection spec. See Detail F Seating Plane Ho Dimension in Inches Dimension in mm Symbol Min. | Nom. | Max. | Min. | Nom. | Max. DB A 7 | 7 | oo | 7 | oT [120 {J AG o.ooz |o006 | cos}; |} 045 _ Az 0.037 | 0.039 | 0.041 O95 | 1.00 1.05 = b 0.007 |0.008 | ooos | O17 | 0.20 0.23 = E _ c 0.005 | 0.006 | 0.007 | 0.12 O15 O47 = D 0.720 | 0.724 | 0.728 | 18.30 | 18.40 | 18.50 0.311 |0.315 | og19 | 7.90 | 8.00 8.10 | Ho O7s0 | 0787) 0.795 }1980 | 20.00 | 20.20 o.020 o.50 _ L 0.016) 0.020) oo24] O40; O50 060 L- |o.031} | | oso _ A f | ooo] | oom] ooo) | o10 { i f ih 8 a 1 5 1 3 5 Sa , Publication Release Date: February 1999 Revision A3W24L10 ett, & Winbond SEE Flentronics Corp. SRR TITIES Package Dimensions, continued 32-pin Small Type One TSOP Ho Dimension in Inches | Dimension in mm Symbol B Min. | Nom. | Max. | Min. | Nom. | Max. A ~ ~ |oo4a) | | 125 = Aa l/ooz] |oous|oos| | ois Lo L Az | 0.037 | 0.039] 0.041 | 0.95] 1.00] 1.05 L b | ooo7]o.008] o.cpa) 017] o20| 027 L E C Jo cose|o.cosg 0.0062) 0.14] 0.15] 0.16 b = D | o.461 | o.45| 0.489 |41.70] 11.80] 14.90 = E |oa1i}osisjosia | 790] soc] ato Ho | 0.520 | 0.528/o0.536 13.20] 13.40] 13.60 e fovze) | |] oso} L | ooctz]0020) 0028 | o30] 0.50] 0.70 Li |ooe7| 7 | 7 joss} | } 2 6 HF] Y [ooo] |oon4 |ooo| | oto AL CL oly 6 0 3 5 Q 3 5 Ly Controlling dimension: Millimeters -i0-fetthey, cP EES, & v i ) cd ci" Electronics Corn. RARER NESE PEI PV VERSION HISTORY W24L10 VERSION DATE PAGE DESCRIPTION Al Jun. 1998 - Initial Issued A2 Sep. 1998 4 Tpw is changed from 40 te 45 n& A3 Feb. 1998 2,4, 7,8 Add TA (C) = 0 to 70 for SL TA (C) = -40 to 85 for LI oT. fat eo ff Winbond too Electronics Corp. Moadiuarters food, Graatiqn Aa i Winbond Electronics (HUBS Lie a7 Fie, Ravan fons, Song Keng PEL: 82 VsTao FAM: AR 28S 2084 Volos & Far-or-demand: 886-227 71397008 Taipel Otfics nm. 303, World Trade augers, Towar i, Winbond Electronics North america Corg. Winbond Momary Lak. Winhond Miorasigeranios Gans. Winband Systeme Lab. 2927 8. First Sueet, San Jose, GA S834 TESA. -/ii- Publication Release Date: February 1999 Revision A3