TCD2301C
2001-10-15
1
TOSHIBA CCD LINEAR IMAGE SENSOR CCD (Charge Coupled Device)
TCD2301C
The TCD2301C which includes sampleandhold circuit and clamp
circuit is a high sensitive and low dark current 3648 elements × 3
lines CCD color image sensor. The sensor is designed for color
scanner.
The device contains a row of 3648 element × 3 lines photodiodes
which provide a 16 lines / mm across a A4 size paper. The device
is operated by 5V pulse, and 12V power supply.
FEATURES
Number of Image Sensing Elements : 3648 elements × 3 lines
Image Sensing Element Size : 8 µm by 8 µm on 8 µm
centers
Photo Sensing Region : High sensitive pn
photodiode
Distance Between Photodiode Array : 96 µm (12 Lines)
Clock : 2 phase (5V)
Internal Circuit : Sample & Hold circuit, Clamp circuit
Package : 22 pin DIP
Color Filter : Red, Green, Blue
MAXIMUM RATINGS (Note 1)
CHARACTERISTIC SYMBOL RATING UNIT
Clock Pulse Voltage Vφ
Shift Pulse Voltage VSH
Reset Pulse Voltage RS
V
Sample and Hold Pulse Voltage SP
V
Switch Pulse Voltage SG
V
Clamp Pulse Voltage CP
V
0.3~8 V
Power Supply Voltage VOD 0.3~15 V
Operating Temperature Topr 0~60 °C
Storage Temperature Tstg 25~85 °C
Note 1: All voltage are with respect to SS terminals (Ground).
PIN CONNECTION
(TOP VIEW)
Weight: 4.8g (Typ.)
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CIRCUIT DIAGRAM
PIN NAMES
φ1E Clock 1 (Phase 1) SH3 Shift Gate 3
φ2E Clock 2 (Phase 2) RS Reset Gate
φ1O Clock 1 (Phase 1) SP Sample and Hold Gate
φ2O Clock 2 (Phase 2) SGR R Switch
φ1B Final Stage Clock (Phase 1) SGG G Switch
φ2B Final Stage Clock (Phase 2) SGB B Switch
SS Ground CP Clamp Gate
OD Power OS Signal Output
SH1 Shift Gate 1 DOS Compensation Output
SH2 Shift Gate 2 NC Non Connection
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OPTICAL / ELECTRICAL CHARACTERISTICS
(Ta = 25°C, VOD = 12 V, Vφ= VRS = VSH = VCP = 5 V (Pulse), fφ = 0.51 MHz, f RS = 1.0 MHz,
Load Resistance = 100 k, tINT (Integration Time) = 10 ms,
Light Source = A Light Source + CM500 Filter (t = 1.0 mm) )
CHARACTERISTIC SYMBOL MIN TYP. MAX UNIT NOTE
Sensitivity (Red) RR 1.1 V / lx·s (Note 2)
Sensitivity (Green) RG 1.4 V / lx·s (Note 2)
Sensitivity (Blue) RB 0.5 V / lx·s (Note 2)
PRNU (1) 10 20 % (Note 3)
Photo Response Non Uniformity
PRNU (3) 3 12 mV (Note 4)
Register Imbalance Rl 3 % (Note 5)
Saturation Output Voltage VSAT 1.0 1.5 V (Note 6)
Saturation Exposure SE 1.07 lx·s (Note 7)
Dark Signal Voltage VDRK 2.0 mV (Note 8)
Dark Signal Non Uniformity DSNU 3.0 mV (Note 9)
Total Transfer Efficiency TTE 92 %
Output Impedance ZO 0.5 1.0 k
DC Power Dissipation PD 500 750 mW
DC Offset Voltage VOS 6.0 V (Note 10)
DC Compensation Output Voltage VDOS 6.0 V (Note 10)
DC Mismach Voltage |VDOSVDOS| 100 300 mV (Note 10)
Note 2: Sensitivity is defined for each color of signal outputs average when the photosensitive surface is applied with
the light of uniform illumination and uniform color temperature.
Note 3: PRNU (1) is defined for each color on a single chip by the expressions below when the photosensitive
surface is applied with the light of uniform illumination and uniform color temperature.
100(%)×)1(PRNU χ
χ
=
When χis average of total signal output and χ is the maximum deviation from χ. The amount of incident
light is shown below.
Red = 2
1SE
Green = 2
1SE
Bule = 4
1SE
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Note 4: PRNU (3) is defined as maximum voltage with next pixel, where measured 5% of SE (TYP.).
Note 5: RI is defined for each color on a single chip by the expressions below when the photosensitive surface is
applied with the light of uniform illumination and uniform color temperature.
(%)100
×3647
3647
1n
1+n-n
Rl ×
χ
=χχ
=
Where
χ
n and
χ
n+1 are signal outputs of each pixel. χis average of total signal outputs.
Note 6: VSAT is defined as minimum saturation output of all effective pixels.
Note 7: Definition of SE:
G
R
SAT
V
SE =
Note 8: VDRK is defined as average dark signal voltage of all effective pixels.
Note 9: DSNU is defined as different voltage between VDRK and VMDK when VMDK is maximum dark voltage.
Note 10: DC Signal Output Voltage and DC Compensation Output Voltage are defined as follows:
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OPERATING CONDITION
CHARACTERISTIC SYMBOL MIN TYP. MAX UNIT NOTE
“H” Level 4.5 5.0 5.5
Clock Pulse Voltage
“L” Level
Vφ0, E
0.0 0.2 0.5
V
“H” Level 4.5 5.0 5.5
Final Stage Clock Pulse Voltage
“L” Level
VφB
0.0 0.2 0.5
V
“H” Level Vφ0,E“H”1 V
φ0,E“H” V
φ0,E“H”
Shift Pulse Voltage
“L” Level
VSH
0.0 0.2 0.5
V (Note 11)
“H” Level 4.5 5.0 5.5
Reset Pulse Voltage
“L” Level RS
V
0.0 0.2 0.5
V
“H” Level 4.5 5.0 5.5
Sample and Hold Pulse Voltage
“L” Level SP
V
0.0 0.2 0.5
V (Note 12)
“H” Level 4.5 5.0 5.5
RGB Switch Pulse Voltage
“L” Level SG
V
0.0 0.2 0.5
V
“H” Level 4.5 5.0 5.5
Clamp Pulse Voltage
“L” Level CP
V
0.0 0.2 0.5
V (Note 13)
Power Supply Voltage VDD 11.4 12.0 13.0 V
Note 11: Vφ0, E “H” means the high level voltage of Vφ0 and VφE when SH pulse is high level.
Note 12: Supply “L” level to SP terminal when sampleandhold circuit is not used.
Note 13: Supply SH (inversed pulse of SH) to CP terminal when clamp circuit is not used.
CLOCK CHARACTERISTICS (Ta = 25°C)
CHARACTERISTIC SYMBOL MIN TYP. MAX UNIT
Clock Pulse Frequency fφ 0.5 2.0 MHz
Reset Pulse Frequency RS
f 1.0 4.0 MHz
Sample and Hold Pulse Frequency SP
f 1.0 4.0 MHz
Clamp Pulse Frequency CP
f 1.0 4.0 MHz
Clock Capacitance Cφ0, E 500 pF
Final Stage Clock Capacitance CφB 10 pF
Shift Gate Capacitance CSH 200 pF
Reset Gate Capacitance RS
C 10 pF
Sample and Hold Gate Capacitance SP
C 10 pF
RGB Switch Pulse Capacitance SG
C 10 pF
Clamp Gate Capacitance CP
C 10 pF
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APPLICATION NOTE
a) You drive TCD2301C by above timing, so you can get the three output signal of nearly equal level.
b) In switching “ SGR , “ SGG ” and “ SGB ”, asynchronous switching operation with clock pulse, shift pulse or any
other input pulses timing, is possible. (It is not necessary to switch above timing shown in figure.) But care
should be taken not to make more than two switches to “L” level at the same time.
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TIMING CHART 1
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TIMING CHART 2
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TIMING CHART 3
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TIMING REQUIREMENTS
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TIMING REQUIREMENTS (Cont.)
CHARACTERISTIC SYMBOL MIN
TYP.
(Note 14) MAX UNIT
Pulse Timing of SH and φ1,0 t1, t5 0 1000 ns
SH Pulse Rise Time, Fall Time t2, t4 0 50 ns
SH Pulse Width t3 500 1000 ns
φ1, φ2 Pulse Rise Time, Fall Time t6, t7 0 50 ns
RS Pulse Rise Time, Fall Time t8, t10 0 20 ns
RS Pulse Width t9 40 250 ns
Pulse Timing of φ1B, φ2B and RS t11 120 300 ns
SP Pulse Rise Time, Fall Time t12, t14 0 20 ns
SP Pulse Width t13 70 100 ns
Pulse Timing of SP and RS t15 0 50 ns
Video Data Delay Time (Note 15) t16, t17 70 ns
CP Pulse Rise Time, Fall Time t18, t20 0 20 ns
CP Pulse Width t19 100 200 ns
Pulse Timing of φ1B, φ2B and CP t21 20 50 ns
Pulse Timing of RS and CP t22 0 50 ns
Note 14: TYP. is the case of fRS =1.0MHz
Note 15: Load resistance is 100k
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TYPICAL SPECTRAL RESPONSE
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TYPICAL DRIVE CIRCUIT
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CAUTION
1. Window Glass
The dust and stain on the glass window of the package degrade optical performance of CCD sensor.
Keep the glass window clean by saturating a cotton swab in alcohol and lightly wiping the surface, and
allow the glass to dry, by blowing with filtered dry N2. Care should be taken to avoid mechanical or
thermal shock because the glass window is easily to damage.
2. Electrostatic Breakdown
Store in shorting clip or in conductive foam to avoid electrostatic breakdown.
CCD Image Sensor is protected against static electricity, but interior puncture mode device due to static
electricity is sometimes detected. In handing the device, it is necessary to execute the following static
electricity preventive measures, in order to prevent the trouble rate increase of the manufacturing system
due to static electricity.
a. Prevent the generation of static electricity due to friction by making the work with bare hands or by
putting on cotton gloves and non-charging working clothes.
b. Discharge the static electricity by providing earth plate or earth wire on the floor, door or stand of the
work room.
c. Ground the tools such as soldering iron, radio cutting pliers of or pincer.
It is not necessarily required to execute all precaution items for static electricity.
It is all right to mitigate the precautions by confirming that the trouble rate within the prescribed
range.
3. Incident Light
CCD sensor is sensitive to infrared light. Note that infrared light component degrades resolution and
PRNU of CCD sensor.
4. Soldering
Soldering by the solder flow method cannot be guaranteed because this method may have deleterious
effects on prevention of window glass soiling and heat resistance.
Using a soldering iron, complete soldering within ten seconds for lead temperatures of up to 260°C, or
within three seconds for lead temperatures of up to 350°C.
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<Application note>
EVENODD UNBALANCE
When Highspeed draiving standard level of oddeven bits is often unbalanced. For that reason
when highspeed draiving CCD you should put a damping resistance in input φ pin.
1. WAVEFORM (Sample and Hold ON)
2. MEASUREMENT CONDITION
Ta=25°C, VAD=VDD=12V,
Vφ1E=Vφ10=Vφ1B=Vφ2E=Vφ20=Vφ2B=V RS =V CP =V SP =VSH1=VSH2=VSH3=5V (Pulse),
Light Source=Daylight Fluorescent Lamp.
Ocilloscope Tektoronix 2465A (400MHz)
Probe P6136 10.8pF
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3. DRIVE CIRCUIT (with a damping resistance)
Please put a damping resistance in input φ20 (22).
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PACKAGE DIMENSIONS
Note 1: No.1 SENSOR ELEMENT (S1) TO EDGE OF PACKAGE.
Note 2: TOP OF CHIP TO BOTTOM OF PACKAGE.
Note 3: GLASS THICKNESS (n=1.5)
Weight: 4.8g (Typ.)
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devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
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conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
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The information contained herein is subject to change without notice.
000707EB
A
RESTRICTIONS ON PRODUCT USE