1. Product profile
1.1 General description
260 W LDMOS packaged asymmetric Doherty power transistor for base station
applications at frequencies from 1805 MHz to 1880 MHz.
[1] VDS = 28 V; IDq = 750 mA (main); VGS(amp)peak = 0.80 V.
[2] Test signal: 3GPP test model 1; 64 DPCH; PAR = 9.65 dB at 0.01% probability on CCDF per carrier.
1.2 Features and benefits
Excellent ruggedness
High-efficiency
Low Rth providing excellent thermal stability
Designed for broadband operation (1805 MHz to 1880 MHz)
Asymmetric design to achieve optimum efficiency across the band
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent digital pre-distortion capability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for W-CDMA base stations and GSM multi carrier applications in
the 1805 MHz to 1880 MHz frequency range
BLF8G20LS-260A
Power LDMOS transistor
Rev. 5 — 1 September 2015 Product data sheet
Table 1. Typical performance
Typical RF performance at Tcase = 25
C in an asymmetrical Doherty production test circuit.
Test signal f VDS PL(AV) GpDACPR
(MHz) (V) (W) (dB) (%) (dBc)
1-carrier W-CDMA[1] 1805 to 1880 28 50 15.9 45.5 29[2]
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Product data sheet Rev. 5 — 1 September 2015 2 of 15
BLF8G20LS-260A
Power LDMOS transistor
2. Pinning information
[1] Connected to flange.
3. Ordering information
4. Limiting values
[1] Continuous use at maximum temperature will affect reliability.
5. Thermal characteristics
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
1 drain1 (main)
2 drain2 (peak)
3gate1 (main)
4 gate2 (peak)
5source [1]
5
12
43
4
35
1
2sym117
Table 3. Ordering information
Type number Package
Name Description Version
BLF8G20LS-260A - earless flanged balanced ceramic package; 4 leads SOT539B
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 65 V
VGS(amp)main main amplifier gate-source voltage 0.5 +13 V
VGS(amp)peak peak amplifier gate-source voltage 0.5 +13 V
Tstg storage temperature 65 +150 C
Tjjunction temperature [1] -225C
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-c) thermal resistance from junction
to case
VDS = 28 V; IDq = 750 mA (main);
VGS(amp)peak = 0.80 V; Tcase =80C
PL= 50 W 0.36 K/W
PL= 200 W 0.29 K/W
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Product data sheet Rev. 5 — 1 September 2015 3 of 15
BLF8G20LS-260A
Power LDMOS transistor
6. Characteristics
Table 6. DC characteristics
Tj = 25
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Main device
V(BR)DSS drain-source breakdown voltage VGS =0V; I
D=1.44mA 65--V
VGS(th) gate-source threshold voltage VDS =10 V; I
D= 144 mA 1.5 1.9 2.3 V
VGSq gate-source quiescent voltage VDS =28 V; I
D= 750 mA 1.7 2.1 2.5 V
IDSS drain leakage current VGS =0V; V
DS =28V - - 2.8 A
IDSX drain cut-off current VGS =V
GS(th) +3.75 V;
VDS =10V
-27- A
IGSS gate leakage current VGS =11V; V
DS = 0 V - - 280 nA
gfs forward transconductance VDS =10V; I
D= 5.04 A - 9.70 - S
RDS(on) drain-source on-state resistance VGS =V
GS(th) + 3.75 V;
ID=5.04A
- 102 166 m
Peak device
V(BR)DSS drain-source breakdown voltage VGS =0V; I
D=2.2mA 65--V
VGS(th) gate-source threshold voltage VDS =10 V; I
D= 220 mA 1.5 1.9 2.3 V
VGSq gate-source quiescent voltage VDS =28 V; I
D= 1200 mA 1.7 2.1 2.5 V
IDSS drain leakage current VGS =0V; V
DS =28V - - 2.8 A
IDSX drain cut-off current VGS =V
GS(th) +3.75 V;
VDS =10V
-41- A
IGSS gate leakage current VGS =11V; V
DS = 0 V - - 280 nA
gfs forward transconductance VDS =10V; I
D=7.70A - 14.9 - S
RDS(on) drain-source on-state resistance VGS =V
GS(th) + 3.75 V;
ID=7.7A
-66112m
Table 7. RF characteristics
Test signal: 1-carrier W-CDMA; PAR = 9.65 dB at 0.01 % probability on the CCDF;
3GPP test model 1 ; 1 - 64 DPCH; f1=1810MHz; f
2= 1875 MHz; RF performance at VDS =28V;
IDq = 750 mA (main); VGS(amp)peak =0.80V; T
case =25
C; unless otherwise specified; in an
asymmetrical Doherty producti on test circuit at 1805 MHz to 1880 MHz.
Symbol Parameter Conditions Min Typ Max Unit
Gppower gain PL(AV) = 50 W 14.7 15.9 - dB
RLin input return loss PL(AV) =50W - 11 7dB
Ddrain efficiency PL(AV) = 50 W 40 45.5 - %
ACPR adjacent channel power ratio PL(AV) =50W - 29 24 dBc
Table 8. RF characteristics
Test signal: 1-carrier W-CDMA; PAR = 9.65 dB at 0.01 % probability on the CCDF;
3GPP test model 1; 1 - 64 DPCH; f = 1877.5 MHz; RF performance at VDS = 28 V;
IDq = 750 mA (main); VGS(amp)peak =0.80V; T
case = 25
C; unless otherwise specified; in an
asymmetrical Doherty producti on test circuit at 1805 MHz to 1880 MHz.
Symbol Parameter Conditions Min Typ Max Unit
PAROoutput peak-to-average ratio PL(AV) =60W 6.4 7.0 - dB
PL(M) peak output power 257 300 - W
BLF8G20LS-260A#5 All information provided in this document is subject to legal disclaimers. © Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 1 September 2015 4 of 15
BLF8G20LS-260A
Power LDMOS transistor
7. Test information
7.1 Ruggedness in Doherty operation
The BLF8G20LS-260A is capable of withstanding a load mismatch corresponding to a
VSWR = 10 : 1 through all phases under the following conditions: VDS =28V;
IDq = 750 mA (main); VGS(amp)peak =0.80V; P
L= 200 W (CW); f = 1805 MHz to
1880 MHz.
7.2 Impedance information
[1] ZS and ZL defined in Figure 1.
[2] at 3 dB gain compression.
Table 9. Typical impedance of main device
Measured load-pull data of main device; IDq = 750 mA (main); VDS = 28 V.
f ZS[1] ZL[1] PL[2] D[2] Gp[2]
(MHz) () ()(W) (%) (dB)
Maximum power load
1810 1.0 j3.7 1.4 j4.1 172 56.3 15.1
1840 1.0 j3.9 1.4 j3.9 167 55.9 15.1
1880 1.1 j4.0 1.4 j3.6 162 57.4 15.3
Maximum drain efficiency load
1810 1.0 j3.7 2.6 j2.4 114 67 17.5
1840 1.0 j3.9 2.4 j2.8 126 66 17.3
1880 1.1 j4.0 2.3 j2.7 120 66 17.6
Table 10. Typical impedance of peak device
Measured load-pull data of peak device; IDq = 1200 mA (peak); VDS = 28 V.
f ZS[1] ZL[1] PL[2] D[2] Gp[2]
(MHz) () ()(W) (%) (dB)
Maximum power load
1810 0.8 j3.7 1.8 j4.5 240 54 15.3
1840 0.7 j3.9 1.8 j4.3 238 56 15.4
1880 0.7 j4.0 1.7 j4.0 233 57 15.8
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Product data sheet Rev. 5 — 1 September 2015 5 of 15
BLF8G20LS-260A
Power LDMOS transistor
[1] ZS and ZL defined in Figure 1.
[2] at 3 dB gain compression.
7.3 Recommended impedances for Doherty design
[1] ZS and ZL defined in Figure 1.
[2] at 3 dB gain compression.
[3] at PL(AV) = 47 dBm.
[1] ZS and ZL defined in Figure 1.
[2] at 3 dB gain compression.
[3] at PL(AV) = 47 dBm.
Maximum drain efficiency load
1810 0.8 j3.7 2.6 j2.6 176 67 18.1
1840 0.7 j3.9 2.4 j2.4 162 66 18.3
1880 0.7 j4.0 2.3 j2.5 163 65 18.4
Fig 1. Definition of transistor impedance
Table 10. Typical impedance of peak device …continued
Measured load-pull data of peak device; IDq = 1200 mA (peak); VDS = 28 V.
f ZS[1] ZL[1] PL[2] D[2] Gp[2]
(MHz) () ()(W) (%) (dB)
001aaf059
drain
Z
L
Z
S
gate
Table 11. Typical impedance of main device at 1 : 1 load
Measured load-pull data of main device; IDq = 750 mA (main); VDS = 28 V.
f ZS[1] ZL[1] PL[2] D[3] Gp[3]
(MHz) () ()(dBm) (%) (dB)
1810 1.0 j3.7 1.4 j4.1 52.38 33.8 18.0
1840 1.0 j3.9 1.4 j3.8 52.23 34.3 18.1
1880 1.1 j4.0 1.3 j3.6 52.08 35.0 18.3
Table 12. Typical impedance of main device at 1 : 2.5 load
Measured load-pull data of main device; IDq = 750 mA (main); VDS = 28 V.
f ZS[1] ZL[1] PL[2] D[3] Gp[3]
(MHz) () ()(dBm) (%) (dB)
1810 1.0 j3.7 2.4 j2.6 50.83 47.3 20.2
1840 1.0 j3.9 2.8 j3.0 50.47 50.2 20.8
1880 1.1 j4.0 3.1 j2.7 50.25 50.9 21.2
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Product data sheet Rev. 5 — 1 September 2015 6 of 15
BLF8G20LS-260A
Power LDMOS transistor
[1] ZS and ZL defined in Figure 1.
[2] at 3 dB gain compression.
7.4 Test circuit
Table 13. Typical impedance of peak device at 1 : 1 load
Measured load-pull data of peak device; IDq = 1200 mA (peak); VDS = 28 V.
f ZS[1] ZL[1] PL[2] D[2] Gp[2]
(MHz) () ()(dBm) (%) (dB)
1810 0.8 j3.7 2.2 j4.3 53.70 59.1 16.1
1840 0.7 j3.9 2.1 j4.0 53.69 61.2 16.3
1880 0.7 j4.0 2.1 j3.7 53.43 62.0 16.8
Table 14. Off-state impedances of peak device
f Zoff
(MHz) ()
1810 0.5 j0.1
1840 0.4 + j0.5
1880 0.4 + j4.0
Printed-Circuit Board (PCB): Rogers RO4350; thickness = 0.508 mm.
See Table 15 for list of components.
Fig 2. Component layout for test circuit
aaa-004804
40 mm
80 mm
40 mm
C1
C2
C11
R30
C14
C15
C12 C28
C24
C23
C31
C30
C21
C16 C18
C17
C13
C19
R28
L3
C22
C32
C10
C27
C26 C29
R29 L4
+-
C20
+-
X1
L5
L6
R17
R27
R18
BLF8G20LS-260A#5 All information provided in this document is subject to legal disclaimers. © Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 1 September 2015 7 of 15
BLF8G20LS-260A
Power LDMOS transistor
7.5 Graphical data
7.5.1 CW pulsed
Table 15. List of components
For test circuit, see Figure 2.
Component Description Value Remarks
C1, C2, C18, C29 multilayer ceramic chip capacitor 1 F Murata
C11, C12, C14, C15, C16,
C22, C23, C25, C31
multilayer ceramic chip capacitor 30 pF ATC100B
C13 multilayer ceramic chip capacitor 0.5 pF ATC800B
C17, C26 multilayer ceramic chip capacitor 100 nF Murata
C19, C27, C30, C32 multilayer ceramic chip capacitor 10 F Murata
C20, C28 electrolytic capacitor 2200 F Panasonic
C21 multilayer ceramic chip capacitor 0.3 pF ATC800B
C24 multilayer ceramic chip capacitor 1.2 pF ATC800B
R17, R18 resistor 5.1 SMD1206
R27 resistor 50 EMC
R28, R29 resistor 9.1 Vishay Dale
R30 resistor 5.6 SMD1206
L3, L4 ferrite bead - Fair Rite 2743019447
L5, L6 inductor 12 nH Coilcraft
X1 hybrid coupler - Anaren X3C19P1-03S
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1805 MHz
(2) f = 1842.5 MHz
(3) f = 1880 MHz
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1805 MHz
(2) f = 1842.5 MHz
(3) f = 1880 MHz
Fig 3. Power gain and drain efficiency as function of
output power; typical values
Fig 4. Power gain and drain efficiency as function of
output power; typical values
aaa-004802
0 50 100 150 200 250 300 350
11 0
12 10
13 20
14 30
15 40
16 50
17 60
PL (W)
Gp
Gp
(dB)(dB)(dB)
ηD
ηD
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
Gp
Gp
ηD
ηD
aaa-004805
38 42 46 50 54 58
11 0
12 10
13 20
14 30
15 40
16 50
17 60
PL (dBm)
Gp
Gp
(dB)(dB)(dB)
ηD
ηD
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
Gp
Gp
ηD
ηD
BLF8G20LS-260A#5 All information provided in this document is subject to legal disclaimers. © Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 1 September 2015 8 of 15
BLF8G20LS-260A
Power LDMOS transistor
7.5.2 2-Carrier W-CDMA
2-carrier W-CDMA; PAR = 7.5 dB per carrier at 0.01 % probability on the CCDF;
3GPP test model with 64 DPCH (46 % clipping).
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1805 MHz
(2) f = 1842.5 MHz
(3) f = 1880 MHz
Fig 5. Input return loss as a function of output power; typical values
aaa-004806
38 42 46 50 54 58
-18
-14
-10
-6
-2
PL (dBm)
RL
RLinin
RLin
(dB)(dB)(dB)
(1)(1)(1)
(2)
(2)(2)
(3)
(3)(3)
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1807.5 MHz
(2) f = 1842.5 MHz
(3) f = 1877.5 MHz
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1805 MHz
(2) f = 1842.5 MHz
(3) f = 1880 MHz
Fig 6. Power gain and drain efficiency as function of
output power; typical values
Fig 7. Power gain and drain efficiency as function of
output power; typical values
aaa-004807
0 20 40 60 80 100 120 140
920
11 30
13 40
15 50
17 60
PL (W)
Gp
Gp
(dB)(dB)(dB)
ηD
ηD
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
Gp
Gp
ηD
ηD
aaa-004808
38 40 42 44 46 48 50 52
920
11 30
13 40
15 50
17 60
PL (dBm)
Gp
Gp
(dB)(dB)(dB)
ηD
ηD
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
Gp
Gp
ηD
ηD
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Product data sheet Rev. 5 — 1 September 2015 9 of 15
BLF8G20LS-260A
Power LDMOS transistor
7.5.3 1-Carrier W-CDMA
1-carrier W-CDMA; PAR = 9.65 dB per carrier at 0.01 % probability on the CCDF;
3GPP test model with 64 DPCH (no clipping).
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1807.5 MHz
(2) f = 1842.5 MHz
(3) f = 1877.5 MHz
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1807.5 MHz
(2) f = 1842.5 MHz
(3) f = 1877.5 MHz
Fig 8. Input return loss as a function of output
power; typical values
Fig 9. Adjacent channel power ratio (5 MHz) and
Adjacent channel power ratio (10 MHz) as
function of output power; typical values
aaa-004809
38 40 42 44 46 48 50 52 54
-16
-12
-8
-4
0
PL (dBm)
RL
RLinin
RLin
(dB)(dB)(dB)
(1)(1)(1)
(2)
(2)(2)
(3)
(3)(3)
aaa-007000
0 20 40 60 80 100 120 140
-50 -50
-40 -40
-30 -30
-20 -20
-10 -10
PL (W)
ACPR
ACPR5M5M
ACPR5M
(dBc)(dBc)(dBc)
ACPR
ACPR10M10M
ACPR10M
(dBc)(dBc)(dBc)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
(1)(1)(1)
(2)(2)(2)
(3)(3)(3)
ACPRACPR5M5M
ACPR5M
ACPRACPR10M10M
ACPR10M
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1810 MHz
(2) f = 1875 MHz
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1810 MHz
(2) f = 1875 MHz
Fig 10. Power gain and drain efficiency as function of
output power; typical values
Fig 11. Adjacent channel power ratio (5 MHz) as a
function of output power; typical values
aaa-006997
0 20 40 60 80 100 120
920
11 30
13 40
15 50
17 60
PL (W)
Gp
Gp
(dB)(dB)(dB)
ηD
ηD
(%)(%)(%)
(1)(1)(1)
(2)(2)(2)
(1)(1)(1)
(2)(2)(2)
Gp
Gp
ηD
ηD
aaa-006998
0 20 40 60 80 100 120
-50
-40
-30
-20
-10
PL (W)
ACPR
ACPR5M5M
ACPR5M
(dBc)(dBc)(dBc)
(1)(1)(1)
(2)(2)(2)
BLF8G20LS-260A#5 All information provided in this document is subject to legal disclaimers. © Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 1 September 2015 10 of 15
BLF8G20LS-260A
Power LDMOS transistor
VDS = 28 V; IDq = 746 mA; VGS(amp)peak =0.80V.
(1) f = 1810 MHz
(2) f = 1875 MHz
Fig 12. Input return loss as a function of output power; typical values
aaa-006999
0 20 40 60 80 100 120
-16
-12
-8
-4
0
PL (W)
RL
RLinin
RLin
(dB)(dB)(dB)
(1)(1)(1)
(2)
(2)(2)
BLF8G20LS-260A#5 All information provided in this document is subject to legal disclaimers. © Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 1 September 2015 11 of 15
BLF8G20LS-260A
Power LDMOS transistor
8. Package outline
Fig 13. Package outline SOT539B
References
Outline
version
European
projection Issue date
IEC JEDEC JEITA
SOT539B
sot539b_po
12-05-02
13-05-24
Unit(1)
mm
max
nom
min
4.7
4.2
11.81
11.56
31.55
30.94
31.52
30.96
9.5
9.3
9.53
9.27
1.75
1.50
17.12
16.10
3.48
2.97
10.29
10.03
0.25
A
Dimensions
Earless flanged balanced ceramic package; 4 leads SOT539B
bc
0.18
0.10
DD
1EE
1e
13.72
FHH
1
25.53
25.27
LQ
2.26
2.01
U1
32.39
32.13
U2w2
0.25
inches
max
nom
min
0.185
0.165
0.465
0.455
1.242
1.218
1.241
1.219
0.374
0.366
0.375
0.365
0.069
0.059
0.674
0.634
0.137
0.117
0.405
0.395
0.01
0.007
0.004
0.54
1.005
0.995
0.089
0.079
1.275
1.265
0.01
w3
0 5 10 mm
scale
c
E
Q
E1
e
H
L
b
H1
U1
U2
Dw2
w3
1 2
3 4
D
D
A
F
D1
5
Note
1. millimeter dimensions are derived from the original inch dimensions.
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Product data sheet Rev. 5 — 1 September 2015 12 of 15
BLF8G20LS-260A
Power LDMOS transistor
9. Handling information
10. Abbreviations
11. Revision history
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
Table 16. Abbreviations
Acronym Description
3GPP Third Generation Partnership Project
CCDF Complementary Cumulative Distribution Function
CW Continuous Wave
DPCH Dedicated Physical CHannel
ESD ElectroStatic Discharge
GSM Global System for Mobile communications
LDMOS Laterally Diffused Metal-Oxide Semiconductor
PAR Peak-to-Average Ratio
SMD Surface Mounted Device
VSWR Voltage Standing Wave Ratio
W-CDMA Wideband Code Division Multiple Access
Table 17. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF8G20LS-260A#5 20150901 Product data sheet BLF8G20LS-260A v.4
Modifications: •The format of this document has been redesigned to comply with the new identity guidelines
of Ampleon.
•Legal texts have been adapted to the new company name where appropriate.
BLF8G20LS-260A v.4 20130712 Product data sheet - BLF8G20LS-260A v.3
BLF8G20LS-260A v.3 20130501 Product data sheet - BLF8G20LS-260A v.2
BLF8G20LS-260A v.2 20121109 Preliminary data sheet - BLF8G20LS-260A v.1
BLF8G20LS-260A v.1 20120913 Objective data sheet - -
BLF8G20LS-260A#5 All information provided in this document is subject to legal disclaimers. © Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 1 September 2015 13 of 15
BLF8G20LS-260A
Power LDMOS transistor
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.ampleon.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Ampleon does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Ampleon sales office. In
case of any inconsistency or conflict with the short data sheet, the full data
sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Ampleon and its customer, unless Ampleon and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be valid
in which the Ampleon product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, Ampleon does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Ampleon takes no responsibility for
the content in this document if provided by an information source outside of
Ampleon.
In no event shall Ampleon be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost profits,
lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Ampleon’ aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Ampleon.
Right to make changes — Ampleon reserves the right to make changes to
information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Ampleon products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction of an
Ampleon product can reasonably be expected to result in personal injury,
death or severe property or environmental damage. Ampleon and its
suppliers accept no liability for inclusion and/or use of Ampleon products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Ampleon makes no representation
or warranty that such applications will be suitable for the specified use without
further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Ampleon products, and Ampleon accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Ampleon product is suitable and
fit for the customer’s applications and products planned, as well as for the
planned application and use of customer’s third party customer(s). Customers
should provide appropriate design and operating safeguards to minimize the
risks associated with their applications and products.
Ampleon does not accept any liability related to any default, damage, costs or
problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Ampleon products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Ampleon does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Ampleon products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.ampleon.com/terms, unless otherwise agreed in a valid written
individual agreement. In case an individual agreement is concluded only the
terms and conditions of the respective agreement shall apply. Ampleon
hereby expressly objects to applying the customer’s general terms and
conditions with regard to the purchase of Ampleon products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
BLF8G20LS-260A#5 All information provided in this document is subject to legal disclaimers. © Ampleon The Netherlands B.V. 2015. All rights reserved.
Product data sheet Rev. 5 — 1 September 2015 14 of 15
BLF8G20LS-260A
Power LDMOS transistor
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Ampleon product is automotive qualified, the product
is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Ampleon
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without Ampleon’ warranty of the product for such
automotive applications, use and specifications, and (b) whenever customer
uses the product for automotive applications beyond Ampleon’ specifications
such use shall be solely at customer’s own risk, and (c) customer fully
indemnifies Ampleon for any liability, damages or failed product claims
resulting from customer design and use of the product for automotive
applications beyond Ampleon’ standard warranty and Ampleon’ product
specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Any reference or use of any ‘NXP’ trademark in this document or in or on the
surface of Ampleon products does not result in any claim, liability or
entitlement vis-à-vis the owner of this trademark. Ampleon is no longer part of
the NXP group of companies and any reference to or use of the ‘NXP’
trademarks will be replaced by reference to or use of Ampleon’s own Any
reference or use of any ‘NXP’ trademark in this document or in or on the
surface of Ampleon products does not result in any claim, liability or
entitlement vis-à-vis the owner of this trademark. Ampleon is no longer part of
the NXP group of companies and any reference to or use of the ‘NXP’
trademarks will be replaced by reference to or use of Ampleon’s own
trademarks.
13. Contact information
For more information, please visit:
http://www.ampleon.com
For sales office addresses, please visit:
http://www.ampleon.com/sales
BLF8G20LS-260A
Power LDMOS transistor
© Ampleon The Netherlands B.V. 2015. All rights reserved.
For more information, please visit: http://www.ampleon.com
For sales office addresses, please visit: http://www.ampleon.com/sales
Date of release: 1 September 2015
Document identifier: BLF8G20LS-260A#5
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . 2
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 4
7.1 Ruggedness in Doherty operation . . . . . . . . . . 4
7.2 Impedance information . . . . . . . . . . . . . . . . . . . 4
7.3 Recommended impedances for Doherty design 5
7.4 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.5 Graphical data . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.5.1 CW pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.5.2 2-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 8
7.5.3 1-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 9
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
9 Handling information. . . . . . . . . . . . . . . . . . . . 12
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
13 Contact information. . . . . . . . . . . . . . . . . . . . . 14
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
