REFERENCE DESIGN IRDCiP1206-B International Rectifier * 233 Kansas Street, El Segundo, CA 90245 USA IRDCiP1206-B: 300 kHz, Dual Output, Synchronous Buck Converter using iP1206 Overview This reference design is capable of delivering a continuous current of 30A; (i.e. 15A max. per output channel) at an ambient temperature of 45C and with 200LFM of airflow. Figures 1-24 provide performance graphs, thermal images, and waveforms. Figures 25-35, and Table 1 are provided to engineers as design references for implementing an iP1206 solution. The components installed on this demoboard were selected based on operation at an input voltage of 12V and at a switching frequency of 300 kHz. Changes from these set points may require optimizing the control loop and/or adjusting the values of input/output filters in order to meet the user's specific application requirements. Refer to the iP1206 datasheet User Design Guidelines section for more information. Note: The 16-pin connector (CON1) is used only for production test purposes and should not be used for evaluation of this demoboard. Demoboard Quick Start Guide Initial Settings: VOUT1 is set to 2.5V, but can be adjusted from 0.8V to 5.5V by changing the values of R5 and R6 according to the following formula: R5 = R6 = (10.0k * 0.8) / (VOUT - 0.8) VOUT2 is set to 1.5V, but can be adjusted from 0.8V to 5.5V by changing the values of R5 and R6 according to the following formula: R15 = R16 = (10.0k * 0.8) / (VOUT - 0.8) The switching frequency is set to 300 kHz, but can be adjusted by changing the value of RT. The graph in Figure 26 shows the relationship between RT and the switching frequency. Power Up Procedure: 1. Apply input voltage across VIN and PGND. 2. Apply load across VOUT1 pads and PGND pads and across VOUT2 pads and PGND pads 3. Adjust load to desired level. See recommendations below. Simultaneous and Ratiometric Startup and Shutdown: Refer to the iP1206PbF datasheet for instructions on using the IRDCiP1206-B board outputs in either ratiometric or simultaneous operation mode. IRDCiP1206-B_______ _____ IRDCiP1206-B Recommended Operating Conditions (Refer to the iP1206 datasheet for maximum operating conditions) Input voltage: 7.5V - 14.5V 0.8 - 5.5V Output voltage (VOUT1, VOUT2) Switching Freq: 300kHz Output current: This reference design is capable of delivering a continuous current of 30A (15A per output channel) at an ambient temperature of 45C with 200LFM of airflow (without heatsink). 9.0 8.0 P o w er L o ss (W ) 7.0 6.0 5.0 Fig. 1: Total System Power Loss vs. Output Current per phase 4.0 3.0 2.0 1.0 0.0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Current(A) 95% E fficien cy 90% Fig. 2: Total System Efficiency vs. Output Current per phase 85% 80% 75% 70% 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Current(A) www.irf.com 2 ____________ __IRDCiP1206-B 100.75% Vo1 Output regulation wrt 0A 100.50% Vo2 100.25% 100.00% 99.75% 99.50% 99.25% 0 1 2 3 4 5 6 7 8 9 Output Current (A) 10 11 12 13 14 15 Fig. 3: Output Voltage Regulation vs. Current PM=57o Vin = 12V Vo1 = 2.5V Iout1 = 15A Fsw = 300KHz No Airflow Fc=75kHz GM=10dB Fig. 4: Bode Plot of Vo1 (2.5V) www.irf.com 3 IRDCiP1206-B_______ _____ PM=54o Vin = 12V Vo2 = 1.5V Iout2 = 15A Fsw = 300KHz No Airflow Fc=45kHz GM=16dB Fig. 5: Bode Plot of Vo2 (1.5V) Conditions: Vin = 12V Vout1 = 2.5V Vout2 = 1.5V Iout1 = Iout2 = 15A Fsw = 300kHz Ambient Temp. = 45C Airflow = 200LFM Stabilizing Time = 15 min Fig. 6: Thermograph (No Heatsink) www.irf.com 4 ____________ __IRDCiP1206-B Vin = 12V Vo1 = 2.5V Iout = 15A Fsw = 300KHz No Airflow Fig.7: Vo1 Power Up Sequence Vin = 12V Vo1 = 2.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 8: Vo1 Power Down Sequence www.irf.com 5 IRDCiP1206-B_______ _____ Vin = 12V Vo2 = 1.5V Iout = 15A Fsw = 300KHz No Airflow Fig.9: Vo2 Power Up Sequence Vin = 12V Vo2 = 1.5V Iout = 15A Fsw = 300KHz No Airflow Fig.10: Vo2 Power Down Sequence www.irf.com 6 ____________ __IRDCiP1206-B Vin = 12V Vo1 = 2.5V Vo2 = 1.5V Iout1 = 15A = Iout2 Fsw = 300KHz Fig. 11: Power Down when Enable is pulled low Vin = 12V Vo1 = 2.5V Vo2 = 1.5V Iout1 = 15A = Iout2 Fsw = 300KHz Fig. 12: Switch Node Waveforms www.irf.com 7 IRDCiP1206-B_______ _____ Vin = 12V Vo = 2.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 13: Over Voltage Protection Vin = 12V Vo = 2.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 14: Short Circuit Protection www.irf.com 8 ____________ __IRDCiP1206-B 43mV 51mV Vin = 12V Vo1 = 2.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 15: Iout1 Transient Step-Up 50% - 75% Vin = 12V Vo1 = 2.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 16: Iout1 Transient Step-Down 75% - 50% 71mV 80mV Vin = 12V Vo1 = 2.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 17: Iout1 Transient Step-Up 50% - 100% Vin = 12V Vo1 = 2.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 18: Iout1 Transient Step-Down 100% - 50% www.irf.com 9 IRDCiP1206-B_______ _____ 34mV 42mV Vin = 12V Vo1 = 1.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 19: Iout2 Transient Step-Up 50% - 75% Vin = 12V Vo1 = 1.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 20: Iout2 Transient Step-Down 75% - 50% 42mV 72mV Vin = 12V Vo1 = 1.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 21: Iout2 Transient Step-Up 50% - 100% www.irf.com Vin = 12V Vo1 = 1.5V Iout = 15A Fsw = 300KHz No Airflow Fig. 22: Iout2 Transient Step-Down 100% - 50% 10 ____________ __IRDCiP1206-B Fig. 23 Ratiometric Startup and Shutdown of Vo1 and Vo2 Fig. 24 Simultaneous Startup and Shutdown of Vo1 and Vo2 www.irf.com 11 IRDCiP1206-B_______ _____ Adjusting the Over-Current Limit ROCx is the resistor used to adjust the over-current trip point. The trip point corresponds to the peak inductor current indicated on the x-axis of Fig. 21. (Note: The trip point will be higher than expected if the reference board is cool and is being used for short circuit testing.) 13 12 11 Current Limit Resistor (kOhms) 10 9 8 7 6 5 4 3 2 1 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Peak Inductor Current (A) Fig. 25: ROCSET vs. Over-Current Trip Point Switching Frequency Vs. Rt 700 600 F sw (kH z ) 500 400 300 200 100 0 0 10 20 30 40 50 60 70 Rt (Kohm) Fig. 26: RT vs. Frequency www.irf.com 12 ____________ Fig. 27: Component Placement Top Layer Fig. 29: Top Copper Layer __IRDCiP1206-B Fig. 28: Component Placement Bottom Layer Fig. 30: 1st Mid Copper Layer www.irf.com 13 IRDCiP1206-B_______ Fig. 31: 2nd Mid Copper Layer Fig. 33: 4th Mid Copper Layer www.irf.com _____ Fig. 32: 3rd Mid Copper Layer Fig. 34: Bottom Copper Layer 14 TRK 1.2V_EN TP6 SS2 TP11 SS1 TP7 1.43K R20 R4 TP9 PGD2 C20 0.1uF 0.1uF 30.9k(300kHz) R14 SYNC TP5 C33 C21 100pF SEQ TP10 RT SYNC SS2 SS1 VREF SEQ EN 33 22 2 17 26 25 24 21 31 28 RT www.irf.com U1 FB1S CC1 20 18 FB1S CC1 FB1 5.76K iP1206 FB2S CC2 FB2 VSW2 OC2 VCB2 CC2 FB2S 34 FB2 5.76K ROC2 OC2 VCB2 1 35 5 8 7 R7 10K 11.5K 100pF 11.5K R15 R16 10K 221 C27 VSW2 0.1uF R13 4.64K R9 L2 10K R11 10K C24 1000pF R10 10K R26 R6 100pF R8 10K 1.0uH 221 C23 10uF 16V C6 1000pF 1.0uH L1 10uF 16V C5 R12 C25 C28 4700pF C29 15pF C15 4700pF C26 15pF C14 VSW1 0.1uF C22 10uF 16V C4 0 R27 0 R17 10uF 16V C7 Fig. 35: Schematic of the Reference design SYNC SS2 SS1 VREF VP2 VP1 SEQ ENABLE VCC 19 14 ROC1 OC1 VCB1 10uF 16V C3 4.64K VCC TP8 PGD1 FB1 VSW1 11 12 10uF 16V C2 R5 0 PGD2 PGD1 OC1 VCB1 10uF 16V C1 1uF 1uF 1uF 23 PGD2 TRK VIN C19 C31 C32 VO3 36 AGND R25 27 30 PGD1 TRK 0 open 0.1uF C18 29 1uF 4 PGND 6 open C17 PGND 13 TP12 open R22 R24 100K R3 R23 100K R1 VO3 0 10K VOUT2 R18 R19 1uF 0 VCH VCH C16 9 R21 0 16 VIN1 R2 3 VIN2 VCC_VIN 10 VCL PGND 32 NC DH_ ON PGND 15 TP2 C35 100uF C34 100uF C10 100uF C9 PGND 100uF 10uF 16V C8 TP1 +12V PGND TP14 VOUT2 TP13 100uF C36 PGND TP4 VOUT1 TP3 100uF C11 680uF C30 1.5V 10uF C37 VOUT2 2.5V 10uF C12 VOUT1 VIN PGND J6 VOUT2 J5 10uF C38 PGND J4 VOUT1 J3 10uF C13 PGND J2 VIN J1 15 13 11 9 7 5 3 16 14 12 10 8 6 4 2 VDDS VOUT2 VSW2 SS2 PGNDS SMT16_CONNECTOR VOUT1 VSW1 SS1 PGNDS VINS CON1 1 ____________ __IRDCiP1206-B 15 Table 1: Bill of Materials for the Reference design IRDCiP1206-B_______ www.irf.com _____ 16 ____________ __IRDCiP1206-B Refer to the following application notes for detailed guidelines and suggestions when implementing iPOWIR Technology products: AN-1028: Recommended Design, Integration and Rework Guidelines for International Rectifier's iPowIR Technology BGA and LGA and Packages This paper discusses optimization of the layout design for mounting iPowIR BGA and LGA packages on printed circuit boards, accounting for thermal and electrical performance and assembly considerations. Topics discussed includes PCB layout placement, and via interconnect suggestions, as well as soldering, pick and place, reflow, inspection, cleaning and reworking recommendations. AN-1030: Applying iPOWIR Products in Your Thermal Environment This paper explains how to use the Power Loss and SOA curves in the data sheet to validate if the operating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product. AN-1047: Graphical solution for two branch heatsinking Safe Operating Area Detailed explanation of the dual axis SOA graph and how it is derived. Use of this design for any application should be fully verified by the customer. International Rectifier cannot guarantee suitability for your applications, and is not liable for any result of usage for such applications including, without limitation, personal or property damage or violation of third party intellectual property rights. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 www.irf.com 17