International Rectifier • 233 Kansas Street
,
El Se
g
undo
,
CA 90245 USA
R
R
E
EF
FE
ER
RE
EN
NC
CE
E
D
D
E
ES
SI
IG
GN
N
IRDCiP1206-B
IRDCiP1206-B: 300 kHz, Dual Output, Synchronous
Buck Converter using iP1206
Overview
This reference design is capable of delivering a continuous current of 30A; (i.e.
15A max. per output channel) at an ambient temperature of 45ºC and with
200LFM of airflow. Figures 1–24 provide performance graphs, thermal images,
and waveforms. Figures 25–35, and Table 1 are provided to engineers as
design references for implementing an iP1206 solution. The components
installed on this demoboard were selected based on operation at an input
voltage of 12V and at a switching frequency of 300 kHz. Changes from these
set points may require optimizing the control loop and/or adjusting the values of
input/output filters in order to meet the user’s specific application requirements.
Refer to the iP1206 datasheet User Design Guidelines section for more
information.
Note: The 16-pin connector (CON1) is used only for production test purposes
and should not be used for evaluation of this demoboard.
Demoboard Quick Start Guide
Initial Settings:
VOUT
1
is set to 2.5V, but can be adjusted from 0.8V to 5.5V by changing the values of R5 and R6 according to the following
formula: R5 = R6 = (10.0k * 0.8) / (VOUT - 0.8)
VOUT
2
is set to 1.5V, but can be adjusted from 0.8V to 5.5V by changing the values of R5 and R6 according to the following
formula: R15 = R16 = (10.0k * 0.8) / (VOUT - 0.8)
The switching frequency is set to 300 kHz, but can be adjusted by changing the value of R
T
. The graph in Figure 26 shows the
relationship between R
T
and the switching frequency.
Power Up Procedure:
1. Apply input voltage across VIN and PGND.
2. Apply load across VOUT
1
pads and PGND pads and across VOUT
2
pads and PGND pads
3. Adjust load to de sired level. See recommendations below.
Simultaneous and Ratiometric Startup and Shutdown:
Refer to the iP1206PbF datasheet for instructions on using the IRDCiP1206-B board outputs in either ratiometric or simultaneous
operation mode.
IRDCiP1206-B_______ _____
www.irf.com 2
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
0123456789101112131415
Current(A)
P ow er Loss (W )
70%
75%
80%
85%
90%
95%
0123456789101112131415
Current(A)
Efficiency
IRDCiP1206-B Recommended Operating Conditions
(Refer to the iP1206 datasheet for maximum operating conditions)
Input voltage: 7.5V – 14.5V
Output voltage (
VOUT
1,
VOUT
2
) 0.8 – 5.5V
Switching Freq: 300kHz
Output current: This reference design is capable of delivering a continuous current of 30A (15A per output
channel) at an ambient temperature of 45ºC with 200LFM of airflow (without heatsink).
Fig. 2: Total System
Efficiency vs. Output
Current per phase
Fig. 1: Total System Power
Loss vs. Output Current
per phase
____________ __IRDCiP1206-B
www.irf.com 3
Fc=75kHz
PM=57
o
GM=10dB
Fc=75kHz
PM=57
o
GM=10dB
99.25%
99.50%
99.75%
100.00%
100.25%
100.50%
100.75%
0 1 2 3 4 5 6 7 8 9101112131415
Output Curre nt (A)
Output regulation wrt 0A
Vo1 Vo2
Fig. 3: Output Voltage Regulation vs. Current
Fig. 4: Bode Plot of Vo1 (2.5V)
Vin = 12V
Vo1 = 2.5V
Iout1 = 15A
Fsw = 300KHz
No Airflow
IRDCiP1206-B_______ _____
www.irf.com 4
Fc=45kHz
PM=54
o
GM=16dB
Fc=45kHz
PM=54
o
GM=16dB
Fig. 5: Bode Plot of Vo2 (1.5V)
Fig. 6: Thermograph (No Heatsink)
Conditions:
Vin = 12V
Vout1 = 2.5V
Vout2 = 1.5V
Iout1 = Iout2 = 15A
Fsw = 300kHz
Ambient Temp. = 45ºC
Airflow = 200LFM
Stabilizing Time = 15
min
Vin = 12V
Vo2 = 1.5V
Iout2 = 15A
Fsw = 300KHz
No Airflow
____________ __IRDCiP1206-B
www.irf.com 5
Fig.7: Vo1 Power Up Sequence
Fig. 8: Vo1 Power Down Sequence
Vin = 12V
Vo1 = 2.5V
Iout = 15A
Fsw = 300KHz
No Airflo
w
Vin = 12V
Vo1 = 2.5V
Iout = 15A
Fsw = 300KHz
No Airflow
IRDCiP1206-B_______ _____
www.irf.com 6
Fig.9: Vo2 Power Up Sequence
Fig.10: Vo2 Power Down Sequence
Vin = 12V
Vo2 = 1.5V
Iout = 15A
Fsw = 300KHz
No Airflow
Vin = 12V
Vo2 = 1.5V
Iout = 15A
Fsw = 300KHz
No Airflow
____________ __IRDCiP1206-B
www.irf.com 7
Fig. 11: Power Down when Enable is pulled low
Fig. 12: Switch Node Waveforms
Vin = 12V
Vo1 = 2.5V
Vo2 = 1.5V
Iout1 = 15A = Iout2
Fsw
=
300KHz
Vin = 12V
Vo1 = 2.5V
Vo2 = 1.5V
Iout1 = 15A = Iout2
Fsw
=
300KHz
IRDCiP1206-B_______ _____
www.irf.com 8
Fig. 13: Over Voltage Protection
Fig. 14: Short Circuit Protection
Vin = 12V
Vo = 2.5V
Iout = 15A
Fsw = 300KHz
No Airflow
Vin = 12V
Vo = 2.5V
Iout = 15A
Fsw = 300KHz
No Airflow
____________ __IRDCiP1206-B
www.irf.com 9
Fig. 15: Iout1 Transient Step-Up 50% - 75% Fig. 16: Iout1 Transient Step-Down 75% - 50%
Fig. 17: Iout1 Transient Step-Up 50% - 100% Fig. 18: Iout1 Transient Step-Down 100% - 50%
Vin = 12V
Vo1 = 2.5V
Iout = 15A
Fsw = 300KHz
No Airflow
Vin = 12V
Vo1 = 2.5V
Iout = 15A
Fsw = 300KHz
No Airflow
Vin = 12V
Vo1 = 2.5V
Iout = 15A
Fsw = 300KHz
No Airflow
Vin = 12V
Vo1 = 2.5V
Iout = 15A
Fsw = 300KHz
No Airflow
51mV
43mV
80mV
71mV
IRDCiP1206-B_______ _____
www.irf.com 10
Fig. 19: Iout2 Transient Step-Up 50% - 75% Fig. 20: Iout2 Transient Step-Down 75% - 50%
Fig. 21: Iout2 Transient Step-Up 50% - 100% Fig. 22: Iout2 Transient Step-Down 100% - 50%
Vin = 12V
Vo1 = 1.5V
Iout = 15A
Fsw = 300KHz
No Airflow
Vin = 12V
Vo1 = 1.5V
Iout = 15A
Fsw = 300KHz
No Airflow
Vin = 12V
Vo1 = 1.5V
Iout = 15A
Fsw = 300KHz
No Airflow
Vin = 12V
Vo1 = 1.5V
Iout = 15A
Fsw = 300KHz
No Airflow
42mV
34mV
72mV
42mV
____________ __IRDCiP1206-B
www.irf.com 11
Fig. 23 Ratiometric Startup and Shutdown of Vo1 and Vo2
Fig. 24 Simultaneous Startup and Shutdown of Vo1 and Vo2
IRDCiP1206-B_______ _____
www.irf.com 12
Adjusting the Over-Current Limit
ROCx is the resistor used to adjust the over-current trip point. The trip point corresponds to the peak inductor current indicated on
the x-axis of Fig. 21. (Note: The trip point will be higher than expected if the reference board is cool and is being used for short
circuit testing.)
Fig. 25: ROCSET vs. Over-Current Trip Point
Fig. 26: RT vs. Frequency
Switching Frequency Vs. Rt
0
100
200
300
400
500
600
700
0 10203040506070
Rt (Kohm )
Fsw (kHz)
1
2
3
4
5
6
7
8
9
10
11
12
13
56789101112131415161718192021222324252627282930
Peak Indu ctor Cur r e nt (A)
Current Lim it Resistor (kO hm s)
____________ __IRDCiP1206-B
www.irf.com 13
Fig. 27: Component Placement Top Lay er Fig. 28: Component Placement Bottom Layer
Fig. 29: Top Copper Layer Fig. 30: 1st Mid Copper Lay er
IRDCiP1206-B_______ _____
www.irf.com 14
Fig. 31: 2nd Mid Copper Layer Fig. 32: 3rd Mid Copper Layer
Fig. 33: 4th Mid Copper Layer Fig. 34: Bottom Copper Layer
____________ __IRDCiP1206-B
www.irf.com 15
C22
0.1uF
C19
1uF
C5
10uF 16V
C14
15pF
C26
4700pF
R7
10K
R13
10K
R12
221
R5
4.64K
R14
30.9k(300kHz)
TP5
SYNC
R8
10K
C23
1000pF
ROC2
5.76K
PGD1
SS1
VREF
VIN
RT
FB1
CC1
FB1S
L2
1.0uH
C9
100uF
C10
100uF
C11
100uF
VOUT1
TP1
+12V
C21
0.1uF
SEQ
C6
10uF 16V
C1
10uF 16V
C2
10u F 16V
C3
10u F 16V
C4
10u F 16V
VIN1 16
VIN2 3
VSW1 14
VSW2 5
AGND
36
PGND
4
PGND
6
PGND
13
PGND
15
SS1
17
CC1 18
FB1 19
FB1S 20
SEQ
21
SYNC
22
PGD2
23
VP1
24
VP2
25
VREF
26
PGD1
27
VCC
28
VO3
29
TRK
30
ENABLE
31
DH_ON 32
RT
33 FB2S 34
FB2 35
CC2 1
SS2
2
VCB1 12
OC1 11
VCL 10
VCH 9
OC2 8
VCB2 7
U1
iP1206
C25
100pF
C15
15pF
R9
10K
L1
1.0uH
ROC1
5.76K
R6
4.64K
C20
100pF
FB2
OC1
OC2
SS2
PGD2
R4
0
VO3
EN
CC2
SYNC
VCB1
C28
0.1uF
VCB2
VSW1
VSW2
C16
1uF
C17
1uF
C18
0.1uF
FB2S
C12
10uF
2.5V
C13
10uF
TP6
1.2V_EN
R3
100K
R1
100K
TP3
VOUT1
R17
0
C30
680uF
J1
VIN
J2
PGND
VIN
J3
VOUT1
J4
PGND
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
CON1
SMT16_CONNECTOR
VINS
PGNDS
VSW1
SS1
VOUT1 VOUT2
C7
10uF 16V
C8
10uF 16V
R18
0
VCC
R2
0
VCC_VIN
R20
1.43K
R19
10K
TP7
SS1
TP8
PGD1
TP2
PGND
TP4
PGND
R21
0
R22
open
VCH
TRK
C32
1uF
C31
1uF
TP9
PGD2
R24
0
TP10
SEQ
TP11
SS2
C33
0.1uF
R23
open
R25
open
VOUT2
TP12
TRK
C29
4700pF
R26
221
R15
11.5K
R10
10K
C24
1000pF
C34
100uF
C35
100uF
C36
100uF
VOUT2
C27
100pF
R11
10K
R16
11.5K
C37
10uF
C38
10uF
R27
0
1.5V
TP13
VOUT2
J5
VOUT2
J6
PGND
TP14
PGND
VDDS
PGNDS
VSW2
SS2
N
C
Fig. 35: Schematic of the Reference design
IRDCiP1206-B_______ _____
www.irf.com 16
Table 1: Bill of Materials for the Reference design
____________ __IRDCiP1206-B
www.irf.com 17
Refer to the following application notes for detailed guidelines and suggestions when
implementing iPOWIR Technology products:
AN-1028: Recommended Design, Inte gration and Rework Guidelines for International Rectifier’s
iPowIR Technology BGA and LGA and Packages
This paper discusses optimization of the layout design for mou nting iPowIR BGA and LGA packages on
printed circuit boards, accounting for thermal and electrical performance and assembly considerations.
Topics discussed includes PCB layout placement, and via interconnect suggestions, as well as soldering,
pick and place, reflow, inspection, cleaning and re working recommendations.
AN-1030: Applyi ng iPOWIR Products in Your Thermal Environment
This paper explains how to use the Po wer Loss and SOA curves in the data shee t to validate if the
operating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product.
AN-1047: Graphical solution for two branch heatsinking Safe Operating Area
Detailed explanation of the dual axis SOA graph and how it is derived.
Use of this design for any application should be fully verified by the customer. International Rectifier
cannot guarantee suitability for your a pplications, and is not liable for any re sult of usage for such
applications including, without limitation, personal or property d amage or violation of third part y
intellectual property rights.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7 903
