Am186ER/Am188ER AMD continues 16-bit innovation Systems in Silicon 386-Class Performance, Enhanced System Integration, and Built-in SRAM AMD Embedded Processor Division, Am186ER Technical Overview Am186ER and Am188ER Systems in Silicon $P(0 &RUH .%\WHV5$0 AMD Embedded Processor Division, Am186ER Technical Overview Am186 System Evolution Systems in Silicon Internal External External 80C186 Based 3.37 MIP System Am186EM Based 5.35 MIP System Am186ER Based 6.6 MIP System CPU CPU CPU Basic System Logic Basic System Logic Basic System Logic Advanced System Logic Advanced System Logic Advanced System Logic RAM FLASH RAM FLASH AMD Embedded Processor Division, Am186ER Technical Overview RAM FLASH Typical 80C186 Design Systems in Silicon +5V Buffered clocks / 2 Input Frequency Oscillator Interrupt input expansion +5V X1 -PCS1 -PCS2 -PCS3 -PCS4 -PCS5 Int 0 Chip selects for peripheral s with 256 registers 80C186 Byte Write Enables Parallel -WR Control/Status -BHE Address Latch ALE I/O A0 CLK Address D Q -WE Flash/ 16 Mux'ed A/D Address/Data 32 PIOs SRAM EPROM Serial Port Latch 32 Application Specific q Potential system cost savings AMD Embedded Processor Division, Am186ER Technical Overview I/O Typical 80C186EM Design (Glueless System Bus) Systems in Silicon 1X or / 2 Input Frequency Crystal CLKOUTA X1 X2 Buffered clocks CLKOUTB -PCS1 Chip selects for peripherals with 256 registers -PCS2 Interrupt input -PCS3 Int 0 expansion Int 4 Am186EM ALE Control/Status Flash/ Application SRAM Specific Address EPROM Address/Data I/O Serial Port TXD RXD Paralllel I/O* PIO(0:31) q New or Enhanced Features *16 bit reset configuration latch and up to 32 general purpose programmable I/Os AMD Embedded Processor Division, Am186ER Technical Overview Typical Am186ER Design (Glueless System Bus & Integrated RAM) Systems in Silicon 1X, 4x, or / 2 Input Frequency Crystal CLKOUTA X1 X2 Buffered clocks CLKOUTB -PCS1 Chip selects for peripherals with 256 registers -PCS2 Interrupt input expansion Int 0 -PCS3 Int 4 ALE Am186ER 32Kbytes RAM Control/Status Flash/ Specific Address EPROM Address/Data Application I/O Serial Port TXD RXD Paralllel I/O* PIO(0:31) *16 bit reset configuration latch and up to 32 general purpose programmable I/Os AMD Embedded Processor Division, Am186ER Technical Overview Am186/188ER vs. 80C186/188 Systems in Silicon * Software compatible with 80C186/188 * 25 to 50MHz - Higher performance options * Glueless connection to memory - Lower system cost * Demultiplexed address bus - Zero wait state using commodity memories * Use Am188ER to replace low frequency 80C186 - 25 MHz Am188ER equals12 MHz 80C186 performance - Save on routing and space while using cheaper x8 components AMD Embedded Processor Division, Am186ER Technical Overview Am186/188EM vs. Am186/188ER Systems in Silicon * No wait state internal RAM - 16Kx16 for Am186ER, and 32Kx8 for Am188ER - Visible for debugging * Low Power - 3.3v Vcc with 5V tolerant IO - TTL compatible - Integration of RAM reduces system power * Multiple clocking modes - 1/2x, 1x, and 4x system frequency vs. input frequency - Use a 12.5 MHz crystal for 50MHz system * Same 100 pin TQFP and PQFP package/pinout AMD Embedded Processor Division, Am186ER Technical Overview Am186ER Block Diagram Systems in Silicon Timer Timer Unit Unit (3) (3) GPIO GPIO (32) (32) Glueless Glueless Connection Connection to toRAM/ROM RAM/ROM PLL PLL /2, 1x, /2, 1x,4x 4x High HighPerf. Perf. 186 (50 186 (50 MHZ) MHZ) Watchdog Watchdog Timer Timer 32K 32KBytes Bytes RAM RAM Chip Chip Selects Selects Interrupt Interrupt Control Control Unit Unit Synch Synch Serial Serial I/F I/F CPU voltage: 3.3v w/5v tolerant I/Os Packages: 100 PQFP and TQFP AMD Embedded Processor Division, Am186ER Technical Overview DMA DMA Control Control (2) (2) UART UART w/DMA w/DMA Systems in Silicon Am186ER and Am188ER Features AMD Embedded Processor Division, Am186ER Technical Overview Am186/188ER New Features w/ Revision B Systems in Silicon * Increased Performance - 50 MHZ - 6.6 MIPs * DMA to/from asynchronous serial port * Hardware Watchdog Timer - Generates NMI or reset AMD Embedded Processor Division, Am186ER Technical Overview Systems in Silicon Am186/188ER Rev B Enhanced Features Con't * Am186/188ER 40MHz max at Industrial Temp now available in both PQFP and TQFP - PQFP 25, 33 & 40MHz at Industrial Temp available - TQFP 25, 33 & 40MHz at Industrial Temp available * If you are currently using an EM/EMLV or ES/ESLV and need to upgrade to a higher frequency industrial grade device (3.3V), consider the ER AMD Embedded Processor Division, Am186ER Technical Overview Am186ER/188ER Feature Set Systems in Silicon - - - - - - - - 32K Bytes of integrated RAM Asynchronous and synchronous serial ports Glueless interface to ROM, SRAM, PSRAM and FLASH 32 programmable I/Os Interrupt controller with 13 interrupt sources 3 timers (with pulse width modulation) 2 DMA channels and 13 chip selects Integrated PLL * two clockouts * system frequency is /2, 1x, and 4x the input frequency - Am188ER gives 60% of the performance of Am186ER AMD Embedded Processor Division, Am186ER Technical Overview On-Board RAM Systems in Silicon * 16Kx16 for Am186ER and 32Kx8 for Am188ER * Same performance as no-wait state external RAM * Locatable on any 32 Kbytes Boundary * Show reads on the address bus for easier debugging - Externally displays data from internal RAM reads - Show reads enabled in hardware or software * Internal memory disable - Disable with hardware or software AMD Embedded Processor Division, Am186ER Technical Overview Diagram of the Show Reads Systems in Silicon Internal RAM Show Read Cycle Waveform t1 t2 t3 t4 CLKOUTA 68 68 A19-A0 Address AD15-AD0 Address 5 Data 7 5 ALE 9 11 RD LCS, UCS MCS3-MCS0, PCS6-PCS5, PCS3-PCS0 25 AMD Embedded Processor Division, Am186ER Technical Overview 27 5V Tolerant I/Os Systems in Silicon * Vcc on the Am186ER and Am188ER is 3.3V - Inputs are 5V tolerant * up to 2.6V over Vcc on inputs - Outputs drive TTL Logic * logic one to 2.4V * Allows mixed voltage system - Supports legacy 5V components AMD Embedded Processor Division, Am186ER Technical Overview Clock and Power Management Unit Systems in Silicon * Up to 50 MHz speeds * Clock options - /2 for systems running lower than 20MHz - 1x for systems running between 16 and 40MHz - 4x for systems running between 16 and 50MHz * 2 CLKOUT pins - program options: - Normal operating frequency - Power save frequency - Can be disabled * Power save mode AMD Embedded Processor Division, Am186ER Technical Overview PRL Register Systems in Silicon * Used for code to identify product and revision - Indicates the current release level of the processor - Specifies either the 8 bit or 16 bit controller * Revision B - Am186ER = 28h - Am188ER = 29h AMD Embedded Processor Division, Am186ER Technical Overview Systems in Silicon ER and EM Family: Common Features AMD Embedded Processor Division, Am186ER Technical Overview Demultiplexed Bus Systems in Silicon * Am186ER demultiplexed address & data bus yields: - Higher performance * Address available time increased * No ALE required * Data setup time decreased - Lower system cost * Eliminates glue logic needed to latch memory address * Using commodity memory reduces cost - Multiplexed bus still supported for peripherals AMD Embedded Processor Division, Am186ER Technical Overview Demultiplexed Bus Interface Systems in Silicon t4 t1 t2 t3 t4 t1 CLKOUT 80C186 Address Multiplexed Address/Data Bus Data Address tCLAV tDVCL tlatch taccess 186 Am186ER Multiplexed Address/Data Bus Dat a Addres s t CLAV tlatch t Address DVCL taccessAm186/Am186EM Am186ER Non-Multiplexed Address Bus Address tCLAV taccess Am186EM AMD Embedded Processor Division, Am186ER Technical Overview Address Asynchronous Serial Port Systems in Silicon * Asynchronous protocol - Full duplex, 7 or 8 bit - Odd/even/no parity, 1 or 2 stop bits * Interrupts - Tx, Rx, Break - Framing, parity, & overrun errors * Baud rate generator - div = (CLK Freq) / (32 * Baud rate) - 1 AMD Embedded Processor Division, Am186ER Technical Overview Synchronous Serial Interface Systems in Silicon * High speed serial transfers - - - - Up to 25 Mbits/s at 50MHz Half-duplex bi-directional ASIC or MachTM control Master with up to 2 slaves directly supported with enables * more than 2 slaves supported with PIOs - Operates in polled mode only - SCLK at 1/2, 1/4, 1/8 and 1/16 CPU clock AMD Embedded Processor Division, Am186ER Technical Overview 32 Programmable I/O Pins Systems in Silicon * Up to 32 PIO pins are available for I/O if their alternate functions are unused - Input - Input with weak internal pull-up/pull-down * polarity depends on original pin - Output - Open-drain output * Multiplexed with other signals - Default depends on pin * Read or written through the peripheral control block AMD Embedded Processor Division, Am186ER Technical Overview 16-Bit Reset Configuration Register Systems in Silicon The reset configuration register function is to store data from the AD bus at reset. The illustration below demonstrates this. Vcc AD0 Vcc AD15 Vss Vss AMD Embedded Processor Division, Am186ER Technical Overview Systems in Silicon 80C186, EM, and ER Family: Common Features AMD Embedded Processor Division, Am186ER Technical Overview Three 16-bit Timers Systems in Silicon * * * * * * * Same as the 80C186 Watchdog timer functionality added to timer 1 Supports pulse width modulation Can re-trigger on external events Continuous or one-shot count Can generate interrupt on terminal count Chainable interrupts AMD Embedded Processor Division, Am186ER Technical Overview Three 16-bit Timers(cont.) Systems in Silicon Inside the line indicates I/Os internal to the timers Am186EM Features AMD Embedded Processor Division, Am186ER Technical Overview Chip Selects Systems in Silicon * 6 chip-selects (PCS) with a range of 256 bytes for use with peripheral devices - Mapped to memory or I/O space * 4 chip-selects (MCS) with a range of 2K to 128Kbytes * 2 chip select outputs (UCS and LCS) for use in the top and bottom of memory map - Good for system code and external RAM - UCS is initial chip select after reset AMD Embedded Processor Division, Am186ER Technical Overview Two DMA Channels Systems in Silicon * Same as 80C186 * DMA options - - - - - - - Mem-mem, mem-I/O, I/O-I/O byte or word 2 Bus cycles per transfer (read followed by a write) Interrupt after last transfer DMA channel priority DMA pointer increment/decrement/static Synchronization - source/destination/none AMD Embedded Processor Division, Am186ER Technical Overview DRAM Refresh Control Systems in Silicon * Simplifies DRAM control logic * Options - Refresh request rate - Enable/Disable refresh - PSRAM refresh handled with separate pin AMD Embedded Processor Division, Am186ER Technical Overview PIC - Peripheral Interrupt Controller Systems in Silicon * Total of 13 interrupts - 7 internal interrupts * * * * 3 timer interrupts 2 DMA interrupts asynchronous serial port interrupt watchdog timer interrupt - 6 external interrupts * 5 maskable interrupt pins * 1 nonmaskable interrupt pin * Edge or level sensitive * Masked or slave mode options AMD Embedded Processor Division, Am186ER Technical Overview Hardware Watchdog Timer Systems in Silicon * Recover from software hangs * Generates NMI or system reset * 1.34 ns timeout at 50 MHz AMD Embedded Processor Division, Am186ER Technical Overview PCB - Peripheral Control Block Systems in Silicon * 128 - contiguous 16-bit register * Provides access to all internal peripherals * Mapped anywhere in memory or I/O space AMD Embedded Processor Division, Am186ER Technical Overview Systems in Silicon ONCE Mode "On Circuit Emulation" * * * * Can be used for board testing Useful in debugging Tri-states all pins Activated by tying UCS & LCS low at reset AMD Embedded Processor Division, Am186ER Technical Overview Systems in Silicon Options and Timeline for the Am186ER and Am188ER Revision B AMD Embedded Processor Division, Am186ER Technical Overview Schedule Am186/188 (Rev B) Systems in Silicon * * * * * * Announcement: Data Sheet (printed) : User's manual (printed): General Samples Available: Demo Boards Available: Production Starts: March 31, 1998 March 31, 1998 March 31, 1998 May 1998 May 1998 3Q98 AMD Embedded Processor Division, Am186ER Technical Overview Am186/Am188ER Notes Systems in Silicon * * * * The existing Am186/188ER is in full production. Rev B yields higher performance and more features. Design-ins should occur with Rev B silicon. Rev B is backward compatible with Rev A with only 1 exception. - In external clocking configuration for an oscillator, X2 pin should float instead of being grounded as in Rev A. For a crystal configuration, no changes are required. - This change was required to improve the oscillator. AMD Embedded Processor Division, Am186ER Technical Overview Options -50 Systems in Silicon V C \W Am186ER LEAD FORMING \W = Trimmed and Formed TEMPERATURE RANGE C = Commercial(Tc = 0 to 100 C) Tc = Case temperature DEVICE NUMBER/DESCRIPTION Am186ER = High-Performance, 10C186Compatible 16-Bit Embedded Microcontroller with 16Kx16 Internal RAM Am188ER = High-Performance, 80C188Compatible 16-Bit Embedded Microcontroller with 32Kx8 Internal RAM PACKAGE TYPE V=100-pin thin quad flat pack (TQFP) K=100-pin plastic quad flat pack(PQFP) SPEED OPTION -25=25MHz -33=33MHz -40=40MHz -50=50MHz AMD Embedded Processor Division, Am186ER Technical Overview