TECHNICAL NOTE Single-chip built-in FET type Switching Regulator Series High Efficiency Step-down Switching Regulator with Built-in Power MOSFET BD9106FVM, BD9107FVM, BD9109FVM, BD9110NV, BD9120HFN Description ROHM's high efficiency step-down switching regulator (BD91FVM) is a power supply designed to produce a low voltage including 1 volts from 5/3.3 volts power supply line. Offers high efficiency with our original pulse skip control technology and synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change in load. Features 1) Offers fast transient response with current mode PWM control system. 2) Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET) and SLLM (Simple Light Load Mode) 3) Incorporates soft-start function. 4) Incorporates thermal protection and ULVO functions. 5) Incorporates short-current protection circuit with time delay function. 6) Incorporates shutdown function 7) Employs small surface mount package MSOP8 (BD9106/9107/9109FVN), HSON8 (BD9120HFN), SON008V5060 (BD9110NV) Use Power supply for LSI including DSP, Micro computer and ASIC Line up Parameter Input Voltage Output Voltage Output Current UVLO threshold Voltage Short-current protection with time delay function Soft start function Standby current Operating Temperature Range Package BD9106FVM 4.05.5V Adjustable BD9107FVM 4.05.5V Adjustable (1.02.5V) (1.01.8V) 0.8A Max. 3.4V Typ. 1.2A Max. 2.7V Typ. BD9109FVM 4.55.5V 3.302% 0.8A Max. 3.8V Typ. BD9110NV 4.55.5V Adjustable BD9120HFN 2.74.5V Adjustable (1.02.5V) (1.01.5V) 2.0A Max. 3.7V Typ. 0.8A Max. 2.5V Typ. -25+105 SON008V5060 -25+85 HSON8 built-in -25+85 -25+85 MSOP8 built-in 0A Typ. -25+85 Operating Conditions (Ta=25) Parameter VCC voltage PVCC voltage EN voltage SW average output current 1 Symbol *1 VCC PVCC *1 EN Isw *1 BD9106FVM Min. Max. 4.0 5.5 4.0 5.5 0 VCC 0.8 BD9107FVM Min. Max. 4.0 5.5 4.0 5.5 0 VCC 1.2 BD9109FVM Min. Max. 4.5 5.5 4.5 5.5 0 VCC 0.8 BD9110NV Min. Max. 4.5 5.5 4.5 5.5 0 VCC 2.0 BD9120HFN Min. Max. 2.7 4.5 2.7 4.5 0 VCC 0.8 Unit V V V A Pd should not be exceeded. Sep. 2008 Absolute Maximum Rating (Ta=25) Parameter Symbol VCC voltage PVCC voltage EN voltage SW,ITH voltage Power dissipation 1 Power dissipation 2 Operating temperature range Storage temperature range Maximum junction temperature VCC PVCC EN SW,ITH Pd1 Pd2 Topr Tstg Tjmax 2 3 4 5 6 7 8 Limits BD910FVM -0.3+7 2 -0.3+7 2 -0.3+7 -0.3+7 387.53 587.44 -25+85 -55+150 +150 BD9110NV -0.3+7 2 -0.3+7 2 -0.3+7 -0.3+7 9005 39006 -25+105 -55+150 +150 Conditions EN=GND Standby mode Active mode VEN=5V PVCC=5V PVCC=5V ADJ=H ADJ=L VCC=HL Design GuaranteeOutgoing inspection is not done on all products BD9107FVM (Ta=25, VCC=5V, EN=VCC, R1=20k, R2=10k unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Standby current ISTB 0 10 A Bias current ICC 250 400 A EN Low voltage VENL GND 0.8 V EN High voltage VENH 2.0 VCC V EN input current IEN 1 10 A Oscillation frequency FOSC 0.8 1 1.2 MHz Pch FET ON resistance 9 RONP 0.35 0.60 Nch FET ON resistance 9 RONN 0.25 0.50 ADJ Voltage VADJ 0.780 0.800 0.820 V 9 Output voltage VOUT 1.200 V ITH SInk current ITHSI 10 20 A ITH Source Current ITHSO 10 20 A UVLO threshold voltage VUVLOTh 2.6 2.7 2.8 V UVLO hysteresis voltage VUVLOHys 150 300 600 mV Soft start time TSS 0.5 1 2 ms Timer latch time TLATCH 0.5 1 2 ms 9 Unit V V V V mW mW Pd should not be exceeded. Derating in done 3.1mW/ for temperatures above Ta=25. Derating in done 4.7mW/ for temperatures above Ta=25, Mounted on 70mmx70mmx1.6mm Glass Epoxy PCB. Derating in done 7.2mW/ for temperatures above Ta=25, Mounted on 70mmx70mmx1.6mm Glass Epoxy PCB which has 1 layer (3%) of copper on the back side). Derating in done 31.2mW/ for temperatures above Ta=25, Mounted on a board according to JESD51-7. Derating in done 10.8mW/ for temperatures above Ta=25, Mounted on 70mmx70mmx1.6mm Glass Epoxy PCB which has 1 layer (7%) of copper on the back side). Derating in done 14mW/ for temperatures above Ta=25, Mounted on 70mmx70mmx1.6mm Glass Epoxy PCB which has 1 layer (65%) of copper on the back side). Electrical Characteristics BD9106FVM (Ta=25, VCC=5V, EN=VCC, R1=20k, R2=10k unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Standby current ISTB 0 10 A Bias current ICC 250 400 A EN Low voltage VENL GND 0.8 V EN High voltage VENH 2.0 VCC V EN input current IEN 1 10 A Oscillation frequency FOSC 0.8 1 1.2 MHz Pch FET ON resistance 9 RONP 0.35 0.60 Nch FET ON resistance 9 RONN 0.25 0.50 ADJ Voltage VADJ 0.780 0.800 0.820 V 9 Output voltage VOUT 1.200 V ITH SInk current ITHSI 10 20 A ITH Source Current ITHSO 10 20 A UVLO threshold voltage VUVLOTh 3.2 3.4 3.6 V UVLO hysteresis voltage VUVLOHys 50 100 200 mV Soft start time TSS 1.5 3 6 ms Timer latch time TLATCH 0.5 1 2 ms 9 BD9120HFN -0.3+7 2 -0.3+7 2 -0.3+7 -0.3+7 13507 17508 -25+85 -55+150 +150 Design GuaranteeOutgoing inspection is not done on all products 2/24 Conditions EN=GND Standby mode Active mode VEN=5V PVCC=5V PVCC=5V VOUT =H VOUT =L VCC=HL Electrical Characteristics BD9109FVM (Ta=25, VCC=PVCC=5V, EN= VCC unless otherwise specified.) Parameter Symbol Min. Typ. Max. Standby current ISTB 0 10 Bias current ICC 250 400 EN Low voltage VENL GND 0.8 EN High voltage VENH 2.0 VCC EN input current IEN 1 10 Oscillation frequency FOSC 0.8 1 1.2 Pch FET ON resistance 9 RONP 0.35 0.60 Nch FET ON resistance 9 RONN 0.25 0.50 Output voltage VOUT 3.234 3.300 3.366 ITH SInk current ITHSI 10 20 ITH Source Current ITHSO 10 20 UVLO threshold voltage VUVLO1 3.6 3.8 4.0 UVLO hysteresis voltage VUVLO2 3.65 3.9 4.2 Soft start time TSS 0.5 1 2 Timer latch time TLATCH 1 2 3 Output Short circuit VSCP 2 2.7 Threshold Voltage 9 Unit A A V V A MHz V A A V V ms ms V Standby mode Active mode VEN=5V PVCC=5V PVCC=5V VOUT =H VOUT =L VCC=HL VCC=LH SCP/TSD operated VOUT =HL Design GuaranteeOutgoing inspection is not done on all products BD9110NV (Ta=25, VCC=PVCC=5V, EN=VCC, R1=10k,R2=5k unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Standby current ISTB 0 10 A Bias current ICC 250 350 A EN Low voltage VENL GND 0.8 V EN High voltage VENH 2.0 VCC V EN input current IEN 1 10 A Oscillation frequency FOSC 0.8 1 1.2 MHz Pch FET ON resistance 9 RONP 200 320 m Nch FET ON resistance 9 RONN 150 270 m ADJ Voltage VADJ 0.780 0.800 0.820 V 9 Output voltage VOUT 1.200 V ITH SInk current ITHSI 10 20 A ITH Source Current ITHSO 10 20 A UVLO threshold voltage VUVLOTh 3.5 3.7 3.9 V UVLO hysteresis voltage VUVLOHys 50 100 200 mV Soft start time TSS 2.5 5 10 ms Timer latch time TLATCH 0.5 1 2 ms 9 Conditions EN=GND Conditions EN=GND Standby mode Active mode VEN=5V PVCC=5V PVCC=5V VOUT =H VOUT =L VCC=HL Design GuaranteeOutgoing inspection is not done on all products BD9120HFN (Ta=25, VCC=PVCC=3.3V, EN=VCC, R1=20k, R2=10k unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Conditions Standby current ISTB 0 10 A EN=GND Bias current ICC 200 400 A EN Low voltage VENL GND 0.8 V Standby mode EN High voltage VENH 2.0 VCC V Active mode EN input current IEN 1 10 A VEN=3.3V Oscillation frequency FOSC 0.8 1 1.2 MHz Pch FET ON resistance 9 RONP 0.35 0.60 PVCC=3.3V Nch FET ON resistance 9 RONN 0.25 0.50 PVCC=3.3V ADJ Voltage VADJ 0.780 0.800 0.820 V 9 Output voltage VOUT 1.200 V ITH SInk current ITHSI 10 20 A VOUT =H ITH Source Current ITHSO 10 20 A VOUT =L UVLO threshold voltage VUVLO1 2.400 2.500 2.600 V VCC=HL UVLO hysteresis voltage VUVLO2 2.425 2.550 2.700 V VCC=LH Soft start time TSS 0.5 1 2 ms Timer latch time TLATCH 1 2 3 ms SCP/TSD operated Output Short circuit VOUTx0.5 VOUTx0.7 V VOUT =HL VSCP Threshold Voltage 9 Design GuaranteeOutgoing inspection is not done on all products 3/24 Characteristics dataBD9106FVM 2.0 1.5 1.0 0.5 1.5 1.0 VCC=5V Ta=25 Io=0A 0.5 0.0 1 2 3 4 INPUT VOLTAGE:VCC[V] 5 0 Fig.1 VCC-VOUT 3 4 1.80 1.79 1.78 0 VOUT=1.8V 1.15 50 40 30 1.76 10 1.75 0 25 35 45 55 65 75 VCC=5V Ta=25 TEMPERATURE:Ta[] Fig.4 Ta-VOUT 1.10 1.05 1.00 0.95 0.90 10 100 OUTPUT CURRENT:IOUT[mA] -25 -15 1000 0.20 NMOS 0.15 0.10 1.4 1.2 1.0 0.8 0.6 0.4 0.05 VCC=5V 5 15 25 35 45 55 65 75 65 75 5 150 100 50 -25 -15 -5 15 25 35 45 55 65 75 85 5 Fig.9 Ta-ICC VOUT=1.8V VCC=PVCC =EN 15 25 35 45 55 65 75 85 TEMPERATURE:Ta[] Fig.8 Ta-VEN Fig.7 Ta-RONN, RONP 1.2 SLLM control VOUT=1.8V SW 1 VOUT VOUT 0.9 VCC=5V Ta=25 Io=0A 0.8 4 4.5 5 INPUT VOLTAGE:VCC[V] VCC=5V Ta=25 5.5 Fig.11 Soft start waveform Fig.10 VCC-FOSC PWM control VOUT=1.8V Fig.12 SW waveform Io=10mA VOUT=1.8V VOUT=1.8V VOUT VOUT SW VOUT IOUT IOUT VCC=5V Ta=25 VCC=5V Ta=25 Fig.13 SW waveform Io=200mA 85 200 TEMPERATURE:Ta[] TEMPERATURE:Ta[] 1.1 55 0 -25 -15 -5 85 45 250 0.0 -5 35 300 0.2 0.00 25 VCC=5V VCC=5V CIRCUIT CURRENT:ICC[A] EN VOLTAGE:VEN[V] PMOS 15 Fig.6 Ta-FOSC 1.6 0.25 5 TEMPERATURE:Ta[] 350 1.8 -25 -15 -5 Fig.5 Efficiency 0.35 0.30 VCC=5V 0.85 2.0 0.40 3 0.80 1 85 2 Fig.3 IOUT-VOUT 60 20 15 1 OUTPUT CURRENT:IOUT[A] 70 1.77 5 VCC=5V Ta=25 5 FREQUENCY:FOSC[MHz] EFFICIENCY:[%] OUTPUT VOLTAGE:VOUT[V] 2 80 1.81 -5 0.5 1.20 90 VCC=5V Io=0A 1.82 1.0 Fig.2 VEN-VOUT VOUT=1.8V -25 -15 ON RESISTANCE:RON[] 1 100 1.83 1.5 EN VOLTAGE:VEN[V] 1.85 1.84 VOUT=1.8V 0.0 0.0 0 FREQUENCY:FOSC[MHz] 2.0 VOUT=1.8V OUTPUT VOLTAGE:VOUT[V] VOUT=1.8V Ta=25 Io=0A OUTPUT VOLTAGE:VOUT[V] OUTPUT VOLTAGE:VOUT[V] 2.0 Fig. 14 Transient response Io=100600mA(10s) 4/24 VCC=5V Ta=25 Fig.15 Transient response Io=600100mA(10s) Characteristics dataBD9107FVM 2.0 1.5 1.0 0.5 0.0 1.5 1.0 0.5 VCC=5V Ta=25 Io=0A 1 2 3 4 INPUT VOLTAGE:VCC[V] 5 0 1 Fig.16 VCC-VOUT 100 1.51 1.50 1.49 1.48 40 30 1.46 1.45 0 25 35 45 55 65 75 VCC=5V Ta=25 10 100 1000 OUTPUT CURRENT:IOUT[mA] 1.00 0.95 0.90 -25 -15 -5 EN VOLTAGE:VEN[V] PMOS 0.25 NMOS 0.15 0.10 -5 5 15 25 35 45 55 65 TEMPERATURE:Ta[ ] Fig.22 -NMOS FET ON Fig.22 Ta-RONN, RONP 75 1.4 1.2 1.0 0.8 0.6 45 55 65 75 300 250 200 150 100 50 5 15 25 35 45 55 65 75 85 -25 -15 -5 TEMPERATURE:Ta[] 1.2 15 25 35 45 55 65 75 85 Fig.24 Ta-ICC VOUT=1.5V VCC=PVCC =EN 5 TEMPERATURE:Ta[] Fig.23 Ta-VEN 1.1 SLLM control VOUT=1.5V SW 1 VOUT VOUT 0.9 VCC=5V Ta=25 Io=0A VCC=5V Ta=25 0.8 4 4.5 5 INPUT VOLTAGE:VCC[V] 5.5 PWM control Fig.27 SW waveform Io=10mA Fig.26 Soft start waveform Fig.25 VCC-FOSC VOUT=1.5V VOUT=1.5V VOUT=1.5V VOUT VOUT SW VOUT IOUT IOUT VCC=5V Ta=25 VCC=5V Ta=25 Fig.28 SW waveform Io=500mA 85 0 -25 -15 -5 85 35 Fig.21 Ta-FOSC 0.0 0.00 25 VCC=5V 0.2 VCC=5V 15 350 0.4 -25 -15 5 TEMPERATURE:Ta[] VCC=5V 1.6 0.05 1.05 10000 CIRCUIT CURRENT:ICC[A] 1.8 0.35 0.20 1.10 0.85 2.0 0.40 3 VCC=5V Fig.20 Efficiency Fig.19 Ta-VOUT 0.30 1 2 OUTPUT CURRENT:IOUT[A] 0.80 1 85 TEMPERATURE:Ta[] ON RESISTANCE:RON[] 1.15 50 10 15 0 1.20 60 20 5 0.5 Fig.18 IOUT-VOUT 70 1.47 -5 1.0 5 80 1.52 -25 -15 4 VOUT=1.5V 90 EFFICIENCY:[%] OUTPUT VOLTAGE:VOUT[V] 1.53 1.5 Fig.17 VEN-VOUT VOUT=1.5V VCC=5V Io=0A 1.54 2 3 EN VOLTAGE:VEN[V] FREQUENCY:FOSC[MHz] 1.55 VCC=5V Ta=25 VOUT=1.5V 0.0 0.0 0 FREQUENCY:FOSC[MHz] 2.0 VOUT=1.5V OUTPUT VOLTAGE:VOUT[V] VOUT=1.5V Ta=25 Io=0A OUTPUT VOLTAGE:VOUT[V] OUTPUT VOLTAGE:VOUT[V] 2.0 Fig. 29 Transient response Io=100600mA(10s) 5/24 VCC=5V Ta=25 Fig.30 Transient response Io=600100mA(10s) Characteristics dataBD9109FVM 4.0 3.0 2.0 1.0 0.0 3.0 2.0 1.0 VCC=5V Ta=25 Io=0A 0.0 0 1 2 3 4 INPUT VOLTAGE:VCC[V] 5 0 1 Fig.31 VCC-VOUT 0 3.25 3.20 3.15 1.15 70 60 50 40 30 3.10 20 3.05 10 3.00 0 5 15 25 35 45 55 65 75 VCC=5V Ta=25 10 100 OUTPUT CURRENT:IOUT[mA] 0.35 EN VOLTAGE:VEN[V] 0.25 NMOS 0.15 0.10 0.95 0.90 1.4 1.2 1.0 0.8 0.6 0.2 VCC=5V 0.0 0.00 TEMPERATURE:Ta[] Fig.37 Ta-RONN, RONP 15 25 35 45 55 65 75 85 300 VCC=5V 250 200 150 100 50 0 -25 -15 -5 15 25 35 45 55 65 75 85 5 TEMPERATURE:Ta[] Fig.36 Ta-FOSC 350 0.4 5 1.00 -25 -15 -5 VCC=5V 1.6 PMOS -25 -15 -5 1.05 1000 CIRCUIT CURRENT:ICC[A] 1.8 0.05 1.10 0.85 2.0 0.40 0.20 VCC=5V Fig.35 Efficiency Fig. 34 Ta-VOUT 3 0.80 1 85 TEMPERATURE:Ta[] 0.30 1 2 OUTPUT CURRENT:IOUT[A] 1.20 FREQUENCY:FOSC[MHz] 3.30 -5 VCC=5V Ta=25 Fig.33 IOUT-VOUT 80 3.35 -25 -15 1.0 0.0 90 EFFICIENCY:[%] 3.40 2.0 5 100 VCC=5V Io=0A 3.45 OUTPUT VOLTAGE:VOUT[V] 2 3 4 EN VOLTAGE:VEN[V] 3.0 Fig.32 VEN-VOUT 3.50 ON RESISTANCE:RON[] OUTPUT VOLTAGE:VOUT[V] 4.0 Ta=25 Io=0A OUTPUT VOLTAGE:VOUT[V] OUTPUT VOLTAGE:VOUT[V] 4.0 5 15 25 35 45 55 65 75 85 -25 -15 -5 5 15 25 35 45 55 65 75 85 TEMPERATURE:Ta[] TEMPERATURE:Ta[] Fig.38 Ta-VEN Fig.39 Ta-ICC FREQUENCY:FOSC[MHz] 1.2 SLLM control VCC=PVCC =EN 1.1 SW 1 VOUT VOUT 0.9 VCC=5V Ta=25 Io=0A 0.8 4 4.5 5 INPUT VOLTAGE:VCC[V] VCC=5V Ta=25 5.5 Fig.40 VCC-FOSC Fig.42 SW waveform Io=10mA Fig.41 Soft start waveform PWM control VOUT VOUT SW IOUT VOUT VCC=5V Ta=25 Fig.43 SW waveform Io=500mA IOUT VCC=5V Ta=25 Fig. 44 Transient response Io=100600mA(10s) 6/24 VCC=5V Ta=25 Fig.45 Transient response Io=600100mA(10s) Characteristics dataBD9110NV 2.0 1.5 1.0 0.5 0.0 VCC=5V Ta=25 Io=0A 1.5 1.0 0.5 1 2 3 4 INPUT VOLTAGE:VCC[V] 5 1 2 3 EN VOLTAGE:VEN[V] EFFICIENCY:[%] 1.40 1.39 1.38 1.15 60 50 40 30 20 1.36 10 1.35 0 100 1000 OUTPUT CURRENT:IOUT[mA] TEMPERATURE:Ta[] 1.10 1.05 1.00 0.95 0.90 10000 0.80 -25 -15 -5 1.8 EN VOLTAGE:VEN[V] 0.25 PMOS NMOS 0.10 350 1.4 1.2 1.0 0.8 0.6 0.4 0.05 25 35 45 55 65 75 85 5 15 25 95 105 85 95 105 200 150 100 -25 -15 -5 15 25 35 45 55 65 75 Fig.54 Ta-ICC VOUT=1.4V VCC=PVCC =EN 5 TEMPERATURE:Ta[] Fig.53 Ta-VEN 1.1 85 250 35 45 55 65 75 85 95 105 1.2 Ta=25 75 VCC=5V TEMPERATURE:Ta[] Fig.52 Ta-RONN, RONP 65 0 -25 -15 -5 95 105 55 300 0.0 15 TEMPERATURE:Ta[] 45 50 0.2 0.00 35 400 VCC=5V 1.6 0.30 25 Fig.51 Ta-FOSC CIRCUIT CURRENT:ICC[A] VCC=5V 5 15 TEMPERATURE:Ta[] 2.0 0.40 -25 -15 -5 5 Fig.50 Efficiency Fig. 49 Ta-VOUT 0.15 VCC=5V 0.85 10 15 25 35 45 55 65 75 85 95 105 4 Fig.48 IOUT-VOUT 70 1.37 0.20 1 2 3 OUTPUT CURRENT:IOUT[A] 1.20 FREQUENCY:FOSC[MHz] OUTPUT VOLTAGE:VOUT[V] 1.41 ON RESISTANCE:RON[] 0 90 VCC=5V Io=0A 0.35 0.5 5 VOUT=1.4V VCC=5V 80 Ta=25 VOUT=1.4V 1.42 FREQUENCY:FOSC[MHz] 4 100 5 1.0 Fig.47 VEN-VOUT 1.45 -25 -15 -5 1.5 0.0 0 Fig.46 VCC-VOUT 1.43 VOUT=1.4V VCC=5V Ta=25 0.0 0 1.44 2.0 VOUT=1.4V OUTPUT VOLTAGE:VOUT[V] VOUT=1.4V Ta=25 Io=0A OUTPUT VOLTAGE:VOUT[V] OUTPUT VOLTAGE:VOUT[V] 2.0 SLLM control VOUT=1.4V SW 1 VOUT VOUT 0.9 VCC=5V Ta=25 Io=0A VCC=5V Ta=25 0.8 4.5 5 INPUT VOLTAGE:VCC[V] 5.5 PWM control Fig.57 SW waveform Io=10mA Fig.56 Soft start waveform Fig.55 VCC-FOSC VOUT=1.4V VOUT=1.4V VOUT=1.4V VOUT VOUT SW IOUT VOUT VCC=5V Ta=25 Fig.58 SW waveform Io=500mA IOUT VCC=5V Ta=25 Fig. 59 Transient response Io=100600mA(10s) 7/24 VCC=5V Ta=25 Fig.60 Transient response Io=600100mA(10s) Characteristics dataBD9120HFN 1.0 0.5 0.0 1.5 1.0 0.5 VCC=3.3V Ta=25 Io=0A 1 2 3 4 INPUT VOLTAGE:VCC[V] 5 0 1 Fig.61 VCC-VOUT VOUT=1.5V VCC=3.3V Io=0A 0 VOUT=1.5V 1.50 1.49 1.48 70 60 50 40 30 1.47 20 1.46 10 1.45 VCC=3.3V Ta=25 15 25 35 45 55 65 75 10 100 OUTPUT CURRENT:IOUT[mA] TEMPERATURE:Ta[] 2.0 VCC=3.3V 1.8 0.35 0.90 -25 -15 NMOS 0.10 0.00 VCC=3.3V 270 1.4 15 25 35 45 55 65 75 1.2 1.0 0.8 0.6 85 65 75 85 VCC=3.3V 180 150 120 90 60 5 15 25 35 45 55 65 75 -25 -15 85 -5 5 25 35 45 55 65 75 85 Fig.69 Ta-ICC VOUT=1.5V VCC=PVCC =EN 15 TEMPERATURE:Ta[] Fig.68 Ta-VEN 1.1 55 0 -5 1.2 Ta=25 45 210 TEMPERATURE:Ta[] Fig.67 Ta-RONN, RONP 35 30 -25 -15 TEMPERATURE:Ta[] 25 240 0.0 5 15 Fig.66 Ta-FOSC 0.2 -5 5 300 0.4 0.05 -25 -15 -5 TEMPERATURE:Ta[] CIRCUIT CURRENT:I CC [A] EN VOLTAGE:VEN[V] PMOS 0.20 0.15 0.95 1000 1.6 0.30 0.25 1.00 Fig.65 Efficiency Fig. 64 Ta-VOUT 0.40 1.05 0.80 1 85 1.10 0.85 0 5 3 VCC=3.3V 1.15 FREQUENCY:FOSC[MHz] 1.51 -5 1 2 OUTPUT CURRENT:IOUT[A] Fig.63 IOUT-VOUT 80 1.52 -25 -15 VCC=3.3V Ta=25 1.20 90 EFFICIENCY:[%] OUTPUT VOLTAGE:VOUT[V] 1.53 0.5 5 100 1.54 FREQUENCY:FOSC[MHz] 4 1.0 Fig.62 VEN-VOUT 1.55 ON [] 2 3 EN VOLTAGE:VEN[V] 1.5 0.0 0.0 0 ON RESISTANCE:R VOUT=1.5V VOUT=1.5V OUTPUT VOLTAGE:VOUT[V] 1.5 2.0 2.0 VOUT=1.5V Ta=25 Io=0A OUTPUT VOLTAGE:VOUT[V] OUTPUT VOLTAGE:VOUT[V] 2.0 SLLM control VOUT=1.5V SW 1 VOUT 0.9 VOUT VCC=3.3V Ta=25 Io=0A 0.8 2.7 3.6 4.5 VCC=3.3V Ta=25 INPUT VOLTAGE:VCC[V] Fig.70 VCC-FOSC PWM control Fig.72 SW waveform Io=10mA Fig.71 Soft start waveform VOUT=1.5V VOUT=1.5V VOUT=1.5V VOUT VOUT SW IOUT IOUT VOUT VCC=3.3V Ta=25 Fig.73 SW waveform Io=200mA VCC=3.3V Ta=25 Fig. 74 Transient response Io=100600mA(10s) 8/24 VCC=3.3V Ta=25 Fig.75 Transient response Io=600100mA(10s) Block Diagram, Application Circuit VCC EN BD9106FVM BD9107FVM 1 2 3 8 VREF VCC ADJ ITH PVCC 7 8 Current Comp. R Q 7 Gm Amp. 3 EN SW OSC VCC 4 GND PGND S CLK SLOPE 6 5 10F SW 10F 5 TSD 2 ADJ Output 6 4 1 PVCC 4.7H + TOP View Fig.76 BD9106FVM BD9107FVM TOP View 5V Input Current Sense/ Protect Driver Logic UVLO Soft Start VCC PGND GND ITH Fig.77 BD9106FVM BD9107FVM Block Diagram VCC BD9109FVM EN 3 8 VREF VCC 8 ITH PVCC 7 EN SW 6 1 VOUT 2 3 7 Current Comp. S SLOPE VCC 4 GND PGND 5 OSC 6 SW Driver Logic 1 VOUT 2 4 PGND GND ITH Fig.79. BD9109FVM Block Diagram PIN function Output voltage detect pin/ ADJ for BD910607FVM GmAmp output pin/Connected phase compensation capacitor Enable pin(Active High) Ground Nch FET source pin Pch/Nch FET drain output pin Pch FET source pin VCC power supply input pin 9/24 10F 5 SCP Fig.78 BD9109FVM TOP View Pin No. & function table Pin No. Pin name 1 ADJ/VOUT 2 ITH 3 EN 4 GND 5 PGND 6 SW 7 PVCC 8 VCC 4.7H + TSD TOP View PVCC Current Sense/ Protect CLK UVLO Soft Start 5V Input 10F R Q Gm Amp. VCC Output Block Diagram, Application Circuit VCC BD9110NV EN ADJ 1 8 EN VCC 2 7 PVCC ITH 3 8 Current Comp 6 SW GND 4 Fig.80 R Q + 5 PGND SLOPE Gm Amp. TOP View VCC 2 VREF + CLK Driver Logic OSC + 7 PVCC Current Sense/ Protect S 10F Output 2.2H 6 SW VCC BD9110NV TOP View 5V Input 22F UVLO Soft Start 5 TSD PGND 4 1 GND 3 ADJ ITH RITH R1 CITH R2 Fig.81 BD9110NV Block Diagram VCC BD9120HFN EN 3 8 VREF 1 ADJ VCC 8 2 ITH PVCC 7 3 EN SW 6 4 GND PGND 5 BD9120HFN TOP View 3.3V Input PVCC 7 Current Comp + TOP View Fig.82 VCC 10F R S SLOPE Gm Amp. CLK OSC + VCC Q Current Sense/ Protect + 6 Driver Logic 4.7H SW 10F UVLO Soft Start 5 TSD PGND SCP 4 GND 1 2 ADJ ITH RITH R1 R2 CITH Fig.83 BD9120HFN Block Diagram Pin No. & function table Pin No. 1 Pin name ADJ BD9110NV PIN function Output voltage adjust pin Pin name ADJ 2 VCC VCC power supply input pin ITH 3 ITH 4 5 6 7 8 GND PGND SW PVCC EN GmAmp output pin/Connected phase compensation capacitor Ground Nch FET source pin Pch/Nch FET drain output pin Pch FET source pin Enable pin(Active High) EN GND PGND SW PVCC VCC 10/24 BD9120HFN PIN function Output voltage adjust pin GmAmp output pin/Connected phase compensation capacitor Enable pin(Active High) Ground Nch FET source pin Pch/Nch FET drain output pin Pch FET source pin VCC power supply input pin Output Information on advantages Advantage 1Offers fast transient response with current mode control system. Conventional product (VOUT of which is 3.3 volts) BD9109FVM (Load response IO=100mA600mA) VOUT VOUT 228mV 140mV IOUT IOUT Voltage drop due to sudden change in load was reduced by about 40%. Fig.84 Comparison of transient response Advantage 2 Offers high efficiency for all load range. For lighter load: Utilizes the current mode control mode called SLLM for lighter load, which reduces various dissipation such as switching dissipation (PSW), gate charge/discharge dissipation, ESR dissipation of output capacitor (PESR) and on-resistance dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load. Achieves efficiency improvement for lighter load. For heavier load: Utilizes the synchronous rectifying mode and the low on-resistance MOS FETs incorporated as power transistor. 100 Efficiency [%] ON resistance of P-channel MOS FET: 0.20.35 (Typ.) ON resistance of N-channel MOS FET: 0.150.25 (Typ.) Achieves efficiency improvement for heavier load. SLLM 50 PWM inprovement by SLLM system improvement by synchronous rectifier 0 0.001 0.01 0.1 Output current Io[A] 1 Fig.85 Efficiency Offers high efficiency for all load range with the improvements mentioned above. Advantage 3Supplied in smaller package due to small-sized power MOS FET incorporated. (3 package like MOSP8, HSON8, SON008V5060) Allows reduction in size of application products Output capacitor Co required for current mode control: 10 F ceramic capacitor Inductance L required for the operating frequency of 1 MHz: 4.7 H inductor (BD9110NV:Co=22F, L=2.2H) Reduces a mounting area required. VCC 15mm Cin CIN RITH DC/DC Convertor Controller L RITH L VOUT 10mm CITH Co CO CITH Fig.86 Example application 11/24 Operation BD91FVM/NV/HFN is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load, while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency. Synchronous rectifier It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. Current mode PWM control Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback. PWM (Pulse Width Modulation) control The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a N-channel MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation. SLLM (Simple Light Load Mode) control When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa. Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching dissipation and improves the efficiency. SENSE Current Comp VOUT Level Shift FB RESET SET Gm Amp. ITH R Q S IL Driver Logic VOUT SW Load OSC Fig.87 Diagram of current mode PWM control PVCC Current Comp SENSE PVCC SENSE Current Comp FB SET FB GND SET GND RESET GND RESET GND SW GND SW IL GND IL(AVE) IL 0A VOUT VOUT VOUT(AVE) VOUT(AVE) Not switching Fig.88 PWM switching timing chart Fig.89 SLLM switching timing chart 12/24 Description of operations Soft-start function EN terminal shifted to "High" activates a soft-starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. Shutdown function With EN terminal shifted to "Low", the device turns to Standby Mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0 F (Typ.). UVLO function Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of 50300 mV (Typ.) is provided to prevent output chattering. Hysteresis 50300mV VCC EN VOUT Tss Tss Tss Soft start Standby mode Standby mode Operating mode Operating mode UVLO UVLO Standby mode Operating mode EN Standby mode UVLO Fig.90 Soft start, Shutdown, UVLO timing chart *Soft Start time(typ.) Tss BD9106FVM BD9107FVM BD9109FVM BD9110NV BD9120HFN Unit 3 1 1 5 1 msec 13/24 Short-current protection circuit with time delay function Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO. EN Output OFF latch VOUT Limit IL 1msec Standby mode Standby mode Operating mode EN Operating mode Timer latch EN Fig.91 Short-current protection circuit with time delay timing chart *Timer Latch time (typ.) BD9106FVM BD9107FVM BD9109FVM BD9110NV BD9120HFN Unit 1 1 2 1 2 msec TLATCH In addition to current limit circuit, output short detect circuit is built in on BD9109FVM and BD9120HFN. If output voltage fall below 2V(typ, BD9109FVM) or Voutx0.5(typ,BD9120HFN), output voltage will hold turned OFF. Switching regulator efficiency Efficiency may be expressed by the equation shown below: = VOUTxIOUT VinxIin x100[%]= POUT Pin x100[%]= POUT POUT+PD x100[%] Efficiency may be improved by reducing the switching regulator power dissipation factors PD as follows: Dissipation factors: 2 1) ON resistance dissipation of inductor and FETPD(I R) 2) Gate charge/discharge dissipationPD(Gate) 3) Switching dissipationPD(SW) 4) ESR dissipation of capacitorPD(ESR) 5) Operating current dissipation of ICPD(IC) 2 2 1)PD(I R)=IOUT x(RCOIL+RON) (RCOIL[]DC resistance of inductor, RON[]ON resistance of FET IOUT[A]Output current.) 2)PD(Gate)=CgsxfxV (Cgs[F]Gate capacitance of FET,f[H]Switching frequency,V[V]Gate driving voltage of FET) 2 Vin xCRSSxIOUTxf 3)PD(SW)= (CRSS[F]Reverse transfer capacitance of FETIDRIVE[A]Peak current of gate.) IDRIVE 2 4)PD(ESR)=IRMS xESR (IRMS[A]Ripple current of capacitor,ESR[]Equivalent series resistance.) 5)PD(IC)=VinxICC (ICC[A]Circuit current.) 14/24 Consideration on permissible dissipation and heat generation As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be carefully considered. For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered. Because the conduction losses are considered to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation. 400 587.4mW 387.5mW 1.5 mounted on glass epoxy PCB j-a=133.0/W Using an IC alone j-a=195.3/W 1.15W Power dissipation:Pd [W] 800 600 1.5 mounted on glass epoxy PCB j-a=212.8/W Using an IC alone j-a=322.6/W Power dissipation:Pd [W] Power dissipation:Pd [mW] 1000 1.0 0.63W 0.5 for SON008V5060 ROHM standard 1layer board j-a=138.9/W Using an IC alone j-a=195.3/W 0.90W 1.0 0.64W 0.5 200 0 0 0 25 50 75 85 100 125 150 0 0 Ambient temperature:Ta [] Fig.92 Thermal derating curve (MSOP8) 25 50 75 85 100 125 150 Ambient temperature:Ta [] Fig.93 Thermal derating curve (HSON8) 0 25 50 75 100105 125 150 Ambient temperature:Ta [] Fig.94 Thermal derating curve (SON008V5060) 2 P=IOUT x(RCOIL+RON) RON=DxRONP+(1-D)xRONN DON duty (=VOUT/VCC) RCOILDC resistance of coil RONPON resistance of P-channel MOS FET RONNON resistance of N-channel MOS FET IOUTOutput current If VCC=5V, VOUT=3.3V, RCOIL=0.15, RONP=0.35, RONN=0.25 IOUT=0.8A, for example, D=VOUT/VCC=3.3/5=0.66 RON=0.66x0.35+(1-0.66)x0.25 =0.231+0.085 =0.316[] 2 P=0.8 x(0.15+0.316) 298[mV] As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed. 15/24 Selection of components externally connected 1. Selection of inductor (L) IL The inductance significantly depends on output ripple current. As seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. (VCC-VOUT)xVOUT IL= [A](1) LxVCCxf Appropriate ripple current at output should be 30% more or less of the maximum output current. IL=0.3xIOUTmax. [A](2) IL VCC IL VOUT L Co L= Fig.95 Output ripple current (VCC-VOUT)xVOUT ILxVCCxf [H](3) (IL: Output ripple current, and f: Switching frequency) *Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency. The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. If VCC=5V, VOUT=3.3V, f=1MHz, IL=0.3x0.8A=0.24A, for example,(BD9109FVM) (5-3.3)x3.3 L= =4.675 4.7[H] 0.24x5x1M *Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better efficiency. 2. Selection of output capacitor (CO) VCC Output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage. Output ripple voltage is determined by the equation (4) VOUT L ESR VOUT=ILxESR [V](4) Co (IL: Output ripple current, ESR: Equivalent series resistance of output capacitor) Fig.96 Output capacitor *Rating of the capacitor should be determined allowing sufficient margin against output voltage. Less ESR allows reduction in output ripple voltage. As the output rise time must be designed to fall within the soft-start time, the capacitance of output capacitor should be determined with consideration on the requirements of equation (5): TSSx(Ilimit-IOUT) Tss: Soft-start time (5) Ilimit: Over current detection level, 2A(Typ) VOUT In case of BD9109FVM, for instance, and if VOUT=3.3V, IOUT=0.8A, and TSS=1ms, 1mx(2-0.8) Co 364 [F] 3.3 Inappropriate capacitance may cause problem in startup. A 10 F to 100 F ceramic capacitor is recommended. Co 16/24 3. Selection of input capacitor (Cin) VCC Input capacitor to select must be a low ESR capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. The ripple current IRMS is given by the equation (6): Cin VOUT L IRMS=IOUTx Co VOUT(VCC-VOUT) VCC [A](6) < Worst case > IRMS(max.) When VCC is twice the Vout, IRMS= IOUT 2 Fig.97 Input capacitor If VCC=5V, VOUT=3.3V, and IOUTmax.=0.8A, (BD9109FVM) 3.3(5-3.3) IRMS=0.8x =0.38[ARMS] 5 A low ESR 10F/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency. 4. Determination of RITH, CITH that works as a phase compensator As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output with C and R as described below to cancel a pole at the power amplifier. fp(Min.) A Gain [dB] 0 fz(ESR) IOUTMin. Phase [deg] 1 2xROxCO 1 fz(ESR)= 2xESRxCO fp= fp(Max.) IOUTMax. Pole at power amplifier When the output current decreases, the load resistance Ro increases and the pole frequency lowers. 0 -90 fp(Min.)= 1 [Hz]with lighter load 2xROMax.xCO fp(Max.)= 1 2xROMin.xCO Fig.98 Open loop gain characteristics A fz(Amp.) Gain [dB] [Hz]with heavier load Zero at power amplifier Increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (This is because when the capacitance is doubled, the capacitor ESR reduces to half.) 1 fz(Amp.)= 2xRITH.xCITH 0 0 Phase [deg] -90 Fig.99 Error amp phase compensation characteristics 17/24 VCC Cin EN VOUT L VCC,PVCC SW VOUT ITH VOUT RO ESR GND,PGND CO RITH CITH Fig.100 Typical application Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load resistance with CR zero correction by the error amplifier. fz(Amp.)= fp(Min.) 1 2xRITHxCITH = 1 2xROMax.xCO 5. Determination of output voltage The output voltage VOUT is determined by the equation (7): VOUT=(R2/R1+1)xVADJ(7) VADJ: Voltage at ADJ terminal (0.8V Typ.) With R1 and R2 adjusted, the output voltage may be determined as required. Adjustable output voltage range 1.0V1.5V/ BD9107FVM, BD9120HFN 1.0V2.5V/BD106FVM, BD9110NV Use 1 k100 k resistor for R1. If a resistor of the resistance higher than 100 k is used, check the assembled set carefully for ripple voltage etc. L 6 Output SW Co R2 1 ADJ R1 Fig.101 Determination of output voltage 18/24 BD9106FVM, BD9107FVM, BD9109FVM, BD9120HFN 1 VOUT/ADJ 2 ITH Cautions on PC Board layout VCC 8 PVCC 7 VCC RITH CIN EN 3 EN 4 GND SW 6 PGND 5 L VOUT CITH CO GND Fig.102 Layout diagram BD9110NV Cautions on PC Board layout VCC R2 1 2 R1 3 RITH CITH 4 ADJ EN VCC PVCC ITH SW GND PGND 8 EN 7 L 6 5 VOUT CIN Co GND Fig.103 Layout diagram For the sections drawn with heavy line, use thick conductor pattern as short as possible. Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the pin PGND. Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring. The package of HSON8 (BD9120HFN) and SON008V5050 (BD9110NV) has thermal FIN on the reverse of the package. The package thermal performance may be enhanced by bonding the FIN to GND plane which take a large area of PCB. Table1. [BD9106FVM] Symbol L CIN CO CITH RITH Part Coil Ceramic capacitor Ceramic capacitor Ceramic capacitor Resistance Value Manufacturer Sumida TDK 4.7H Series CMD6D11B VLF5014AT-4R7M1R1 10F Kyocera CM316X5R106K10A 10F Kyocera CM316X5R106K10A 750pF VOUT=1.0V VOUT=1.2V VOUT=1.5V VOUT=1.8V VOUT=2.5V murata 18k 22k 22k 27k 36k 19/24 ROHM ROHM ROHM ROHM ROHM GRM18series MCR10 1802 MCR10 2202 MCR10 2202 MCR10 2702 MCR10 3602 Table2. [BD9107FVM] Symbol L CIN CO CITH RITH Part Coil Value Manufacturer Sumida TDK 4.7H Ceramic capacitor Ceramic capacitor Ceramic capacitor Resistance Series CMD6D11B VLF5014AT-4R7M1R1 10F Kyocera CM316X5R106K10A 10F Kyocera CM316X5R106K10A 1000pF murata GRM18series ROHM ROHM ROHM ROHM MCR10 4301 MCR10 6801 MCR10 9101 MCR10 1202 VOUT=1.0V VOUT=1.2V VOUT=1.5V VOUT=1.8V 4.3k 6.8k 9.1k 12k Table3. [BD9109VM] Symbol L CIN CO Part Coil Value Manufacturer Sumida 4.7H Ceramic capacitor Ceramic capacitor TDK Series CMD6D11B VLF5014AT-4R7M1R1 10F Kyocera CM316X5R106K10A 10F Kyocera CM316X5R106K10A CITH Ceramic capacitor 330pF murata GRM18series RITH Resistance 30k ROHM MCR10 3002 Table4. [BD9110NV] Symbol L Coil Part Value 2.2H Manufacturer TDK Series LTF5022T-2R2N3R2 CIN Ceramic capacitor 10F Kyocera CM316X5R106K10A CO Ceramic capacitor 22F Kyocera CM316B226K06A CITH Ceramic capacitor murata GRM18series RITH Resistance ROHM MCR10 1202 1000pF VOUT=1.0V VOUT=1.2V VOUT=1.5V VOUT=1.8V VOUT=2.5V 12k Table5. [BD9120HFN] Symbol L Part Value Manufacturer Sumida Series CMD6D11B Coil 4.7H CIN Ceramic capacitor 10F Kyocera CM316X5R106K10A CO Ceramic capacitor 10F Kyocera CM316X5R106K10A CITH Ceramic capacitor RITH Resistance 680pF VOUT=1.0V VOUT=1.2V VOUT=1.5V murata ROHM ROHM ROHM GRM18series MCR10 8201 MCR10 8201 MCR10 4701 TDK 8.2k 8.2k 4.7k VLF5014AT-4R7M1R1 *The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode established between the SW and PGND pins. 20/24 I/O equivalence circuit BD9106FVM, BD9107FVM, BD9109FVM EN pin PVCC SW pin VCC PVCC PVCC 10k EN SW VOUT pin (BD9109FVM) ADJ pin (BD9106FVM, BD9107FVM) VCC VCC 10k 10k VOUT ADJ ITH pin VCC VCC ITH BD9110NV, BD9120HFN EN pin PVCC SW pin PVCC PVCC 10k EN SW ITH pin (BD9120HFN) ITH pin (BD9110NV) VCC VCC ITH ITH ADJ pin 10k ADJ Fig.104 I/O equivalence circuit 21/24 Cautions on use 1. Absolute Maximum Ratings While utmost care is taken to quality control of this product, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken, short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses. 2. Electrical potential at GND GND must be designed to have the lowest electrical potential In any operating conditions. 3. Short-circuiting between terminals, and mismounting When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and power supply or GND may also cause breakdown. 4.Operation in Strong electromagnetic field Be noted that using the IC in the strong electromagnetic radiation can cause operation failures. 5. Thermal shutdown protection circuit Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 6. Inspection with the IC set to a pc board If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the inspection process, be sure to turn OFF the power supply before it is connected and removed. 7. Input to IC terminals + This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and the N-layer of each element form a P-N junction, and various parasitic element are formed. If a resistor is joined to a transistor terminal as shown in Fig 59: P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or GND>Terminal B (at transistor side); and if GND>Terminal B (at NPN transistor side), a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode. The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in activation of parasitic elements. Resistance (Pin A) Transistor (NPN) B (Pin B) (Pin A) Parasitic diode E C GND GND N P+ P+ P N P+ N N P substrate (Pin B) P P+ N N Parasitic diode GND C N P substrate Parasitic diode or transistor GND B E GND Parasitic diode or transistor Fig.105 Simplified structure of monorisic IC 8. Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. 22/24 Ordering part number B D 9 ROHM part number 1 F V M T Package Type 06 : Adjustable (12.5V) 07 : Adjustable (11.5V) 09 : 3.3V 10 : Adjustable (12.5V) 20 : Adjustable (11.5V) R Package specification FVM : MSOP8 HFN : HSON8 NV : SON008V5060 TR : Embossed taping E2 : Embossed taping MSOP8 <Dimension> <Tape and Reel information> Tape Embossed carrier tape 5 1 4 0.29 0.15 0.6 0.2 8 2.8 0.1 4.0 0.2 2.9 0.1 3000pcs Direction of feed TR (The direction is the 1pin of product is at the upper light when you hold reel on the left hand and you pull out the tape on the right hand) 0.145 +0.05 -0.03 0.475 0.9Max. 0.75 0.05 0.08 0.05 Quantity 0.22 +0.05 -0.04 0.08 M X X X X XX X 0.08 S 0.65 X X X X XX X X X X X XX X X X X X XX X X X X X XX X Direction of feed 1Pin Reel (Unit:mm) When you order , please order in times the amount of package quantity. HSON8 <Dimension> <Tape and Reel information> 2.900.2 (0.2) 0.475 (1.8) 5 6 7 8 (0.2) 0.6Max. 3.000.2 2.800.2 8 7 6 5 1 2 3 4 (0.30) (0.15) (0.45) (2.2) (0.05) Tape Embossed carrier tape Quantity 3000pcs Direction of feed TR (The direction is the 1pin of product is at the upper light when you hold reel on the left hand and you pull out the tape on the right hand) 0.13 +0.1 -0.05 4 3 2 1 0.320.10 X X X X X X X 0.65 X X X X X X X X X X X X X X X X X X X X X X X X X X X X Direction of feed 1Pin Reel (Unit:mm) When you order , please order in times the amount of package quantity. SON008V5060 5.0 0.15 <Tape and Reel information> 6.0 0.15 <Dimension> Embossed carrier tape Quantity 2000pcs E2 Direction of feed 1PIN MARK 1.0MAX Tape (The direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand) 0.02 -0.02 (0.22) +0.03 S 0.08 S 4.2 0.1 1.27 C0.25 7 6 5 0.8 0.1 3.6 0.1 1234 8 1234 0.59 1234 4 1234 3 1234 2 1234 1 +0.05 0.4 -0.04 (Unit:mm) Reel 1Pin Direction of feed When you order , please order in times the amount of package quantity. 23/24 Catalog No.08T659A '08.9 ROHM (c) Appendix Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM CO.,LTD. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact your nearest sales office. ROHM Customer Support System www.rohm.com Copyright (c) 2009 ROHM CO.,LTD. THE AMERICAS / EUROPE / ASIA / JAPAN Contact us : webmaster @ rohm.co. jp 21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan TEL : +81-75-311-2121 FAX : +81-75-315-0172 Appendix-Rev4.0