TECHNICAL NOTE
Single-chip built-in FET type Switching Regulator Series
High Efficiency
Step-down Switching Regulator
with Built-in Power MOSFET
BD9106FVM, BD9107FVM, BD9109FVM, BD9110NV, BD9120HFN
Description
ROHM’s high efficiency step-down switching regulator (BD91□□FVM) is a power supply designed to produce a low
voltage including 1 volts from 5/3.3 volts power supply line. Offers high efficiency with our original pulse skip control
technology and synchronous rectifier. Employs a current mode control system to provide faster transient response to
sudden change in load.
Features
1) Offers fast transient response with current mode PWM control system.
2) Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET) and SLLM (Simple Light Load Mode)
3) Incorporates soft-start function.
4) Incorporates thermal protection and ULVO functions.
5) Incorporates short-current protection circuit with time delay function.
6) Incorporates shutdown function
7) Employs small surface mount package
MSOP8 (BD9106/9107/9109FVN), HSON8 (BD9120HFN), SON008V5060 (BD9110NV)
Use
Power supply for LSI including DSP, Micro computer and ASIC
Line up
Parameter BD9106FVM BD9107FVM BD9109FVM BD9110NV BD9120HFN
Input Voltage 4.05.5V 4.05.5V 4.55.5V 4.55.5V 2.74.5V
Output Voltage Adjustable
(1.02.5V)
Adjustable
(1.01.8V) 3.30±2% Adjustable
(1.02.5V)
Adjustable
(1.01.5V)
Output Current 0.8A Max. 1.2A Max. 0.8A Max. 2.0A Max. 0.8A Max.
UVLO threshold Voltage 3.4V Typ. 2.7V Typ. 3.8V Typ. 3.7V Typ. 2.5V Typ.
Short-current protection
with time delay function built-in
Soft start function built-in
Standby current 0μA Typ.
Operating Temperature Range -25+85 -25+85 -25+85 -25+105 -25+85
Package MSOP8 SON008V5060 HSON8
Operating Conditions (Ta=25)
Parameter Symbol
BD9106FVM BD9107FVM BD9109FVM BD9110NV BD9120HFN Unit
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
VCC voltage VCC
*
1 4.0 5.5 4.0 5.5 4.5 5.5 4.5 5.5 2.7 4.5 V
PVCC voltage PVCC
*
1 4.0 5.5 4.0 5.5 4.5 5.5 4.5 5.5 2.7 4.5 V
EN voltage EN 0 VCC 0 VCC 0 VCC 0 VCC 0 VCC V
SW average output current Isw
*
1 - 0.8 - 1.2 - 0.8 - 2.0 - 0.8 A
1 Pd should not be exceeded.
Sep. 2008
2/24
Absolute Maximum Rating (Ta=25)
Parameter Symbol Limits Unit
BD910FVM BD9110NV BD9120HFN
VCC voltage VCC -0.3+7 2 -0.3+7 2 -0.3+7 2 V
PVCC voltage PVCC -0.3+7 2 -0.3+7 2 -0.3+7 2 V
EN voltage EN -0.3+7 -0.3+7 -0.3+7 V
SW,ITH voltage SW,ITH -0.3+7 -0.3+7 -0.3+7 V
Power dissipation 1 Pd1 387.53 9005 13507 mW
Power dissipation 2 Pd2 587.44 39006 17508 mW
Operating temperature range Topr -25+85 -25+105 -25+85
Storage temperature range Tstg -55+150 -55+150 -55+150
Maximum junction temperature Tjmax +150 +150 +150
2 Pd should not be exceeded.
3 Derating in done 3.1mW/ for temperatures above Ta=25.
4 Derating in done 4.7mW/ for temperatures above Ta=25, Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB.
5 Derating in done 7.2mW/ for temperatures above Ta=25, Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB which has 1 layer (3%) of copper on
the back side).
6 Derating in done 31.2mW/ for temperatures above Ta=25, Mounted on a board according to JESD51-7.
7 Derating in done 10.8mW/ for temperatures above Ta=25, Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB which has 1 layer (7%) of copper
on the back side).
8 Derating in done 14mW/ for temperatures above Ta=25, Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB which has 1 layer (65%) of copper
on the back side).
Electrical Characteristics
BD9106FVM (Ta=25, VCC=5V, EN=VCC, R1=20kΩ, R2=10kΩ unless otherwise specified.)
Parameter Symbol Min. Typ. Max. Unit Conditions
Standby current ISTB - 0 10 μA EN=GND
Bias current ICC - 250 400 μA
EN Low voltage VENL - GND 0.8 V Standby mode
EN High voltage VENH 2.0 VCC - V Active mode
EN input current IEN - 1 10 μA VEN=5V
Oscillation frequency FOSC 0.8 1 1.2 MHz
Pch FET ON resistance 9 RONP - 0.35 0.60 Ω PVCC=5V
Nch FET ON resistance 9 RONN - 0.25 0.50 Ω PVCC=5V
ADJ Voltage VADJ 0.780 0.800 0.820 V
Output voltage 9 VOUT - 1.200 - V
ITH SInk current ITHSI 10 20 - μA ADJ=H
ITH Source Current ITHSO 10 20 - μA ADJ=L
UVLO threshold voltage VUVLOTh 3.2 3.4 3.6 V VCC=HL
UVLO hysteresis voltage VUVLOHys 50 100 200 mV
Soft start time TSS 1.5 3 6 ms
Timer latch time TLATCH 0.5 1 2 ms
9 Design GuaranteeOutgoing inspection is not done on all products
BD9107FVM (Ta=25, VCC=5V, EN=VCC, R1=20kΩ, R2=10kΩ unless otherwise specified.)
Parameter Symbol Min. Typ. Max. Unit Conditions
Standby current ISTB - 0 10 μA EN=GND
Bias current ICC - 250 400 μA
EN Low voltage VENL - GND 0.8 V Standby mode
EN High voltage VENH 2.0 VCC - V Active mode
EN input current IEN - 1 10 μA VEN=5V
Oscillation frequency FOSC 0.8 1 1.2 MHz
Pch FET ON resistance 9 RONP - 0.35 0.60 Ω PVCC=5V
Nch FET ON resistance 9 RONN - 0.25 0.50 Ω PVCC=5V
ADJ Voltage VADJ 0.780 0.800 0.820 V
Output voltage 9 VOUT - 1.200 - V
ITH SInk current ITHSI 10 20 - μA VOUT =H
ITH Source Current ITHSO 10 20 - μA VOUT =L
UVLO threshold voltage VUVLOTh 2.6 2.7 2.8 V VCC=HL
UVLO hysteresis voltage VUVLOHys 150 300 600 mV
Soft start time TSS 0.5 1 2 ms
Timer latch time TLATCH 0.5 1 2 ms
9 Design GuaranteeOutgoing inspection is not done on all products
3/24
Electrical Characteristics
BD9109FVM (Ta=25, VCC=PVCC=5V, EN= VCC unless otherwise specified.)
Parameter Symbol Min. Typ. Max. Unit Conditions
Standby current ISTB - 0 10 μA EN=GND
Bias current ICC - 250 400 μA
EN Low voltage VENL - GND 0.8 V Standby mode
EN High voltage VENH 2.0 VCC - V Active mode
EN input current IEN - 1 10 μA VEN=5V
Oscillation frequency FOSC 0.8 1 1.2 MHz
Pch FET ON resistance 9 RONP - 0.35 0.60 Ω PVCC=5V
Nch FET ON resistance 9 RONN - 0.25 0.50 Ω PVCC=5V
Output voltage VOUT 3.234 3.300 3.366 V
ITH SInk current ITHSI 10 20 - μA VOUT =H
ITH Source Current ITHSO 10 20 - μA VOUT =L
UVLO threshold voltage VUVLO1 3.6 3.8 4.0 V VCC=HL
UVLO hysteresis voltage VUVLO2 3.65 3.9 4.2 V VCC=LH
Soft start time TSS 0.5 1 2 ms
Timer latch time TLATCH 1 2 3 ms SCP/TSD operated
Output Short circuit
Threshold Voltage VSCP - 2 2.7 V VOUT =HL
9 Design GuaranteeOutgoing inspection is not done on all products
BD9110NV (Ta=25, VCC=PVCC=5V, EN=VCC, R1=10kΩ,R2=5kΩ unless otherwise specified.)
Parameter Symbol Min. Typ. Max. Unit Conditions
Standby current ISTB - 0 10 μA EN=GND
Bias current ICC - 250 350 μA
EN Low voltage VENL - GND 0.8 V Standby mode
EN High voltage VENH 2.0 VCC - V Active mode
EN input current IEN - 1 10 μA VEN=5V
Oscillation frequency FOSC 0.8 1 1.2 MHz
Pch FET ON resistance 9 RONP - 200 320 mΩ PVCC=5V
Nch FET ON resistance 9 RONN - 150 270 mΩ PVCC=5V
ADJ Voltage VADJ 0.780 0.800 0.820 V
Output voltage 9 VOUT - 1.200 - V
ITH SInk current ITHSI 10 20 - μA VOUT =H
ITH Source Current ITHSO 10 20 - μA VOUT =L
UVLO threshold voltage VUVLOTh 3.5 3.7 3.9 V VCC=HL
UVLO hysteresis voltage VUVLOHys 50 100 200 mV
Soft start time TSS 2.5 5 10 ms
Timer latch time TLATCH 0.5 1 2 ms
9 Design GuaranteeOutgoing inspection is not done on all products
BD9120HFN (Ta=25, VCC=PVCC=3.3V, EN=VCC, R1=20kΩ, R2=10kΩ unless otherwise specified.)
Parameter Symbol Min. Typ. Max. Unit Conditions
Standby current ISTB - 0 10 μA EN=GND
Bias current ICC - 200 400 μA
EN Low voltage VENL - GND 0.8 V Standby mode
EN High voltage VENH 2.0 VCC - V Active mode
EN input current IEN - 1 10 μA VEN=3.3V
Oscillation frequency FOSC 0.8 1 1.2 MHz
Pch FET ON resistance 9 RONP - 0.35 0.60 Ω PVCC=3.3V
Nch FET ON resistance 9 RONN - 0.25 0.50 Ω PVCC=3.3V
ADJ Voltage VADJ 0.780 0.800 0.820 V
Output voltage 9 VOUT - 1.200 - V
ITH SInk current ITHSI 10 20 - μA VOUT =H
ITH Source Current ITHSO 10 20 - μA VOUT =L
UVLO threshold voltage VUVLO1 2.400 2.500 2.600 V VCC=HL
UVLO hysteresis voltage VUVLO2 2.425 2.550 2.700 V VCC=LH
Soft start time TSS 0.5 1 2 ms
Timer latch time TLATCH 1 2 3 ms SCP/TSD operated
Output Short circuit
Threshold Voltage VSCP - VOUT×0.5 VOUT×0.7 V VOUT =HL
9 Design GuaranteeOutgoing inspection is not done on all products
4/24
Characteristics dataBD9106FVM
0.0
0.5
1.0
1.5
2.0
0123
OUTPUT CURRENT:IOUT[A]
OUTPUT VOLTAGE:VOUT[V]
VCC=5V
Ta= 2 5
VOUT=1.8V
1.75
1.76
1.77
1.78
1.79
1.80
1.81
1.82
1.83
1.84
1.85
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TEMPERATURE:Ta[]
OUTPUT VOLTAGE:VOUT[V]
Fig.4 Ta-VOUT
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
OUTPUT CURRENT:IOUT[mA]
EFFICIENCY:
η[%]
Fig.5 Efficiency
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
FREQUENCY:FOSC[MHz]
Fig.6 Ta-FOSC
0.8
0.9
1
1.1
1.2
44.555.5
INPUT VOLTAGE:VCC[V]
FREQUENCY:FOSC[MHz]
Fig.10 VCC-FOSC Fig.11 Soft start waveform
VOUT
VCC=PVCC
=EN
SW
VOUT
VCC=5V
Ta= 2 5
SLLM control VOUT=1.8V
VOUT=1.8V
Fig.12 SW waveform Io=10mA
Fig. 14 Transient response
Io=100600mA
(
10
μ
s
)
VOUT
IOUT
VCC=5V
Ta= 2 5
VOUT=1.8V
Fig.15 Transient response
Io=600100mA(10μs)
VOUT
IOUT
VCC=5V
Ta= 2 5
VOUT=1.8V
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
EN VOLTAGE:VEN[V]
Fig.8 Ta-VEN
0
50
100
150
200
250
300
350
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
CIRCUIT CURRENT:ICC[μA]
Fig.9 Ta-ICC
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
ON RESISTANCE:RON[Ω]
Fig.7 Ta-RONN, RONP
PMOS
NMOS
VCC=5V
VCC=5V
Ta= 2 5
Io=0A
VOUT
Fig.13 SW waveform Io=200mA
VCC=5V
Ta= 2 5
SW
PWM control V
OUT=1.8V
0.0
0.5
1.0
1.5
2.0
012345
INPUT VOLTAGE:VCC[V]
OUTPUT VOLTAGE:VOUT[V]
Ta= 2 5
Io=0A
Fig.1 VCC-VOUT
VOUT=1.8V
0.0
0.5
1.0
1.5
2.0
012345
EN VOLTAGE:VEN[V]
OUTPUT VOLTAGE:VOUT[V]
VCC=5V
Ta= 2 5
Io=0A
Fig.2 VEN-VOUT
VOUT=1.8V
VCC=5V
Io=0A
VOUT=1.8V
VCC=5V
Ta= 2 5
VOUT=1.8V
VCC=5V VCC=5V
Fig.3 IOUT-VOUT
VCC=5V
5/24
Characteristics dataBD9107FVM
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
FREQUENCY:FOSC[MHz]
Fig.21 Ta-FOSC
1.45
1.46
1.47
1.48
1.49
1.50
1.51
1.52
1.53
1.54
1.55
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
OUTPUT VOLTAGE:VOUT[V]
Fig.19 Ta-VOUT
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000 10000
OUTPUT CURRENT:IOUT[mA]
EFFICIENCY:η[%]
Fig.20 Efficiency
0.8
0.9
1
1.1
1.2
44.555.5
INPUT VOLTAGE:VCC[V]
FREQUENCY:FOSC[MHz]
Fig.25 VCC-FOSC
Fig.22 温度-NMOS FET ON 抵抗
Fig.30 Transient response
Io=600100mA(10μs)
VOUT
IOUT
VCC=5V
Ta= 2 5
VOUT=1.5V
0.0
0.5
1.0
1.5
2.0
012345
INPUT VOLTAGE:VCC[V]
OUTPUT VOLTAGE:VOUT[V]
Ta= 2 5
Io=0A
Fig.16 VCC-VOUT
0.0
0.5
1.0
1.5
2.0
0123
OUTPUT CURRENT:IOUT[A]
OUTPUT VOLTAGE:VOUT[V]
VCC=5V
Ta= 2 5
Fig.18 IOUT-VOUT
0.0
0.5
1.0
1.5
2.0
012345
EN VOLTAGE:VEN[V]
OUTPUT VOLTAGE:VOUT[V]
Fig.17 VEN-VOUT
VCC=5V
Ta= 2 5
Io=0A
0
50
100
150
200
250
300
350
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
CIRCUIT CURRENT:ICC[μA]
Fig.24 Ta-ICC
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
EN VOLTAGE:VEN[V]
Fig.23 Ta-VEN
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
ON RESISTANCE:RON[Ω]
PMOS
NMOS
Fig.22 Ta-RONN, RONP
VCC=5V
SW
VOUT
VCC=5V
Ta= 2 5
Fi
g
.27 SW wavefo
r
m Io=10mA
SLLM control VOUT=1.5V
SW
VOUT
Fig.28 SW waveform Io=500mA
VCC=5V
Ta= 2 5
PWM control V
OUT=1.5V
Fig. 29 Transient response
Io=100600mA(10μs)
VCC=5V
Ta= 2 5
VOUT=1.5V
Fig.26 Soft start waveform
VOUT
VCC=PVCC
=EN
VOUT=1.5V
VCC=5V
Ta= 2 5
Io=0
A
VOUT
IOUT
VOUT=1.5V VOUT=1.5V
VOUT=1.5V VOUT=1.5V
VOUT=1.5V
VCC=5V
Io=0A
VCC=5V
Ta= 2 5
VCC=5V VCC=5V
VCC=5V
6/24
Characteristics dataBD9109FVM
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
OUTPUT CURRENT:IOUT[mA]
EFFICIENCY:η[%]
3.00
3.05
3.10
3.15
3.20
3.25
3.30
3.35
3.40
3.45
3.50
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
OUTPUT VOLTAGE:VOUT[V]
Fig. 34 Ta-VOUT
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
FREQUENCY:FOSC[MHz]
Fig.36 Ta-FOSC Fig.35 Efficiency
0.0
1.0
2.0
3.0
4.0
0123
OUTPUT CURRENT:IOUT[A]
OUTPUT VOLTAGE:VOUT[V]
VCC=5V
Ta= 2 5
Fig.33 IOUT-VOUT
0.0
1.0
2.0
3.0
4.0
012345
EN VOLTAGE:VEN[V]
OUTPUT VOLTAGE:VOUT[V]
VCC=5V
Ta= 2 5
Io=0
A
Fig.32 VEN-VOUT
0.0
1.0
2.0
3.0
4.0
012345
INPUT VOLTAGE:VCC[V]
OUTPUT VOLTAGE:VOUT[V]
Fig.31 VCC-VOUT
0.8
0.9
1
1.1
1.2
44.555.5
INPUT VOLTAGE:VCC[V]
FREQUENCY:FOSC[MHz]
Fig.40 VCC-FOSC
Fig. 44 Transient response
Io=100600mA(10μs)
VOUT
IOUT
VCC=5V
Ta= 2 5
Fig.45 Transient response
Io=600100mA(10μs)
VCC=5V
Ta= 2 5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
EN VOLTAGE:VEN[V]
Fig.38 Ta-VEN
0
50
100
150
200
250
300
350
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
CIRCUIT CURRENT:ICC[μA]
Fig.39 Ta-ICC
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
ON RESISTANCE:RON[Ω]
PMOS
NMOS
Fig.37 Ta-RONN, RONP
VCC=5V
Fig.41 Soft start waveform
VOUT
VCC=PVCC
=EN
VCC=5V
Ta= 2 5
Io=0
A
SW
VOUT
VCC=5V
Ta= 2 5
Fig.42 SW waveform Io=10mA
SLLM control
SW
VOUT
Fig.43 SW waveform Io=500mA
VCC=5V
Ta= 2 5
PWM control
Ta= 2 5
Io=0A
VCC=5V
Io=0A
VCC=5V
Ta= 2 5
VCC=5V VCC=5V
IOUT
VOUT
VCC=5V
7/24
Characteristics dataBD9110NV
0
10
20
30
40
50
60
70
80
90
100
10 100 1000 10000
OUTPUT CURRENT:IOUT[mA]
EFFICIENCY:η[%]
0.8
0.9
1
1.1
1.2
4.5 5 5.5
INPUT VOLTAGE:VCC[V]
FREQUENCY:FOSC[MHz]
Fig.55 VCC-FOSC
Ta= 2 5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-25-15-5 5 152535455565758595105
TEMPERATURE:Ta[]
EN VOLTAGE:VEN[V]
Fig.53 Ta-VEN
VCC=5V
0
50
100
150
200
250
300
350
400
-25-15-5 5 152535455565758595105
TEMPERATURE:Ta[]
CIRCUIT CURRENT:ICC[μA]
Fig.54 Ta-ICC
VCC=5V
Fig.50 Efficiency
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
-25-15-5 5 152535455565758595105
TEMPERATURE:Ta[]
FREQUENCY:FOSC[MHz]
Fig.51 Ta-FOSC
1.35
1.36
1.37
1.38
1.39
1.40
1.41
1.42
1.43
1.44
1.45
-25-15-5 5 152535455565758595105
TEMPERATURE:Ta[]
OUTPUT VOLTAGE:VOUT[V]
Fig. 49 Ta-VOUT
VCC=5V
Io=0A
0.0
0.5
1.0
1.5
2.0
01234
OUTPUT CURRENT:IOUT[A]
OUTPUT VOLTAGE:VOUT[V]
VCC=5V
Ta= 2 5
Fig.48 IOUT-VOUT
VOUT
IOUT VCC=5V
Ta= 2 5
VOUT=1.4V
Fig. 59 Transient response
Io=100600mA(10μs)
VOUT
IOUT
VCC=5V
Ta= 2 5
VOUT=1.4V
Fig.60 Transient response
Io=600100mA(10μs)
0.0
0.5
1.0
1.5
2.0
012345
INPUT VOLTAGE:VCC[V]
OUTPUT VOLTAGE:VOUT[V]
Ta= 2 5
Io=0A
Fig.46 VCC-VOUT
0.0
0.5
1.0
1.5
2.0
012345
EN VOLTAGE:VEN[V]
OUTPUT VOLTAGE:VOUT[V]
Fig.47 VEN-VOUT
VCC=5V
Ta= 2 5
Io=0A
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
-25-15-5 5 152535455565758595105
TEMPERATURE:Ta[]
ON RESISTANCE:RON[Ω]
Fig.52 Ta-RONN, RONP
PMOS
NMOS
VCC=5V
Fig.56 Soft start waveform
VOUT
VCC=PVCC
=EN
VCC=5V
Ta= 2 5
Io=0A
SW
VOUT
VCC=5V
Ta= 2 5
Fig.57 SW waveform Io=10mA
SW
VOUT
Fig.58 SW waveform Io=500mA
VCC=5V
Ta= 2 5
PWM control V
OUT=1.4V
VOUT=1.4V VOUT=1.4V VOUT=1.4V
VOUT=1.4V
VCC=5V
Ta= 2 5
VOUT=1.4V
SLLM control VOUT=1.4V
VCC=5V
VOUT=1.4V
8/24
Characteristics dataBD9120HFN
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
ON RESISTANCE:R ON [Ω]
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
EN VOLTAGE:VEN[V]
Fig.68 Ta-VEN
0
30
60
90
120
150
180
210
240
270
300
-25-15 -5 5 1525 35455565 7585
TEMPERATURE:Ta[]
CIRCUIT CURRENT:ICC [μA]
PMOS
NMOS
VCC=3.3V VCC=3.3V VCC=3.3V
1.45
1.46
1.47
1.48
1.49
1.50
1.51
1.52
1.53
1.54
1.55
-25-15-5 5 1525 3545 55 6575 85
TEMPERATURE:Ta[]
OUTPUT VOLTAGE:VOUT[V]
Fig. 64 Ta-VOUT
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
-25-15-5 5 1525354555657585
TEMPERATURE:Ta[]
FREQUENCY:FOSC[MHz]
Fig.66 Ta-FOSC
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
OUTPUT CURRENT:IOUT[mA]
EFFICIENCY:
η[%]
Fig.65 Efficiency
VCC=3.3V
Io=0A
VOUT=1.5V
VCC=3.3V
Ta= 2 5
VOUT=1.5V VCC=3.3V
0.8
0.9
1
1.1
1.2
2.7 3.6 4.5
INPUT VOLTAGE:VCC[V]
FREQUENCY:FOSC[MHz]
Fig.70 VCC-FOSC
Ta= 2 5
Fig.67 Ta-RONN, RONP Fig.69 Ta-ICC
VOUT
IOUT
VOUT
IOUT
VCC=3.3
V
Ta= 2 5
VOUT=1.5V
Fig. 74 Transient response
Io=100600mA(10μs)
VCC=3.3V
Ta= 2 5
VOUT=1.5V
Fig.75 Transient response
Io=600100mA(10μs)
Fig.71 Soft start waveform
VOUT
VCC=PVCC
=EN
VCC=3.3
Ta= 2 5
Io=0
A
SW
VOUT
VCC=3.3
V
Ta= 2 5
Fig.72 SW waveform Io=10mA
SLLM control VOUT=1.5V
SW
VOUT
Fig.73 SW waveform Io=200mA
VCC=3.3V
Ta= 2 5
PWM control VOUT=1.5V
0.0
0.5
1.0
1.5
2.0
012345
INPUT VOLTAGE:VCC[V]
OUTPUT VOLTAGE:VOUT[V]
Ta= 2 5
Io=0A
Fig.61 VCC-VOUT
0.0
0.5
1.0
1.5
2.0
012345
EN VOLTAGE:VEN[V]
OUTPUT VOLTAGE:VOUT[V]
VCC=3.3V
Fig.62 VEN-VOUT
0.0
0.5
1.0
1.5
2.0
0123
OUTPUT CURRENT:IOUT[A]
OUTPUT VOLTAGE:VOUT[V]
Fig.63 IOUT-VOUT
VOUT=1.5V
Ta= 2 5
Io=0A
VOUT=1.5V VOUT=1.5V
VCC=3.3V
Ta= 2 5
VOUT=1.5V
9/24
Block Diagram, Application Circuit
BD9106FVM
BD9107FVM
BD9109FVM
Pin No. & function table
Pin No. Pin name PIN function
1 ADJ/VOUT Output voltage detect pin/ ADJ for BD910607FVM
2 ITH GmAmp output pin/Connected phase compensation capacitor
3 EN Enable pin(Active High)
4 GND Ground
5 PGND Nch FET source pin
6 SW Pch/Nch FET drain output pin
7 PVCC Pch FET source pin
8 VCC VCC power supply input pin
8
VCC
7
PVCC
6
SW
5
PGND
1
A
DJ
2 ITH
3 EN
4 GND
Fi
g.7
6
BD9106FVM
BD9107FVM TOP Vie
w
TOP View
Fi
g.77
BD9106FVM
BD9107FVM Block Diagram
VREF
OSC
UVLO
TSD
Current
Sense/
Protect
Driver
Logic
+
Soft
Start
8
7
6
5
4
21
3
RQ
S
EN
VCC
PVCC
10μF
5V
Input
4.7μH
SW
10μF
Output
PGND
GND
ITH
A
DJ
VCC
SLOPE
Current
Comp.
Gm Amp.
CLK
8
VCC
7
PVCC
6
SW
5
PGND
1 VOUT
2 ITH
3 EN
4 GND
Fi
g.7
8
BD9109FVM
TOP
Vi
e
w
TOP View
VREF
OSC
UVLO
TSD
Current
Sense/
Protect
Driver
Logic
+
Soft
Start
8
7
6
5
4
21
3
RQ
S
EN
VCC
PVCC
10μF
5V
Input
4.7μH
SW
10μF
Output
PGND
GND
ITH VOUT
VCC
SLOPE
Current
Comp.
Gm Amp.
CLK
VCC
Fi
g.7
9
.
BD9109FVM
Bl
oc
k
Di
agram
VCC
SCP
10/24
Block Diagram, Application Circuit
BD9110NV
BD9120HFN
Pin No. & function table
Pin
No.
BD9110NV BD9120HFN
Pin name PIN function Pin name PIN function
1 ADJ Output voltage adjust pin ADJ Output voltage adjust pin
2 VCC VCC power supply input pin ITH GmAmp output pin/Connected
phase compensation capacitor
3 ITH
GmAmp output pin/Connected
phase compensation capacitor EN Enable pin(Active High)
4 GND Ground GND Ground
5 PGND Nch FET source pin PGND Nch FET source pin
6 SW Pch/Nch FET drain output pin SW Pch/Nch FET drain output pin
7 PVCC Pch FET source pin PVCC Pch FET source pin
8 EN Enable pin(Active High) VCC VCC power supply input pin
ADJ 1
VCC 2
ITH 3
GND 4
8 EN
7 PVCC
6 SW
5 PGND
Fig.80 BD9110NV TOP View
TOP View
Output
5V
Input
PVCC
PGND
SW
GND
Gm Amp. 2.2μH
VCC
R
S
Q
OSC
UVLO
TSD
+
22μF
VCC
VCC
CLK
SLOPE
EN
Current
Comp 10μ
F
8
7
2
6
5
4
Soft
Start
Current
Sense/
Protect
+
Driver
Logic
+
VREF
ITH
A
DJ
RITH CITH
3
1
R1 R2
Fig.81 BD9110NV Block Diagram
ADJ
ITH
EN
GND
VCC
PVCC
SW
PGND
8
1
2
3
45
6
7
Fig.82 BD9120HFN TOP View
TOP View
3.3V
Input
PVCC
PGND
SW
GND
Output
Gm Amp. 4.7μH
VCC
R
S
Q
OSC
UVLO
TSD
+
10μF
VCC
VCC
CLK
SLOPE
EN
Current
Comp 10μF
Soft
Start
Current
Sense/
Protect
+
Driver
Logic
+
VREF
ITH
A
DJ
RITH CITH
R1 R2
3
8
7
6
5
4
12
SCP
Fig.83 BD9120HFN Block Diagram
11/24
Information on advantages
Advantage 1Offers fast transient response with current mode control system.
Voltage drop due to sudden change in load was reduced by about 40%.
Fig.84 Comparison of transient response
Advantage 2 Offers high efficiency for all load range.
For lighter load:
Utilizes the current mode control mode called SLLM for lighter load, which reduces various dissipation such as
switching dissipation (PSW), gate charge/discharge dissipation, ESR dissipation of output capacitor (PESR) and
on-resistance dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load.
Achieves efficiency improvement for lighter load.
For heavier load:
Utilizes the synchronous rectifying mode and the low on-resistance MOS FETs incorporated as power transistor.
ON resistance of P-channel MOS FET: 0.20.35 (Typ.)
ON resistance of N-channel MOS FET: 0.150.25 (Typ.)
Achieves efficiency improvement for heavier load.
Offers high efficiency for all load range with the improvements mentioned above.
Advantage 3:・Supplied in smaller package due to small-sized power MOS FET incorporated.
(3 package like MOSP8, HSON8, SON008V5060)
Allows reduction in size of application products
Reduces a mounting area required.
Fig.86 Example application
Output capacitor Co required for current mode control: 10 μF ceramic capacitor
Inductance L required for the operating frequency of 1 MHz: 4.7 μH inductor
(BD9110NV:Co=22μF, L=2.2μH)
DC/DC
Convertor
Controller
RITH
L
Co
VOUT
CITH
VCC
Cin
10mm
15mm
RITH
CITH
CIN
CO
L
VOUT
IOUT
228mV
VOUT
IOUT
140mV
Conventional product (VOUT of which is 3.3 volts) BD9109FVM (Load response IO=100mA600mA)
0.001 0.01 0.1 1
0
50
100
PWM
SLLM
inprovement by SLLM system
improvement by synchronous rectifier
Efficiency η[%]
Output current Io[A]
Fig.85 Efficiency
12/24
Operation
BD91□□FVM/NV/HFN is a synchronous rectifying step-down switching regulator that achieves faster transient response
by employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode
for heavier load, while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency.
Synchronous rectifier
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and
its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power
dissipation of the set is reduced.
Current mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
PWM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a N-channel
MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two
signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback control signal (FB),
and issues a RESET signal if both input signals are identical to each other, and turns OFF the P-channel MOS FET (while
a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation.
SLLM (Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is
designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without
voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp,
it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned
OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching
dissipation and improves the efficiency.
Fig.87 Diagram of current mode PWM control
OSC
Level
Shift Driver
Logic
RQ
S
IL
SW
ITH
Current
Comp
Gm Amp.
SET
RESET
FB
Load
SENSE
VOUT
VOUT
Fi
g.
88
PWM
sw
i
tc
hi
ng t
i
m
i
ng c
h
art
Fi
g.
89
SLLM
sw
i
tc
hi
ng t
i
m
i
ng c
h
art
Curren
t
Comp
SET
RESET
SW
VOUT
PVCC
GND
GND
GND
IL(AVE)
VOUT(AVE)
SENSE
FB
Curren
t
Comp
SET
RESET
SW
VOUT
PVCC
GND
GND
GND
0A
VOUT(AVE)
SENSE
FB
IL
Not switching
IL
13/24
Description of operations
Soft-start function
EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited during
startup, by which it is possible to prevent an overshoot of output voltage and an inrush current.
Shutdown function
With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference
voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0 μF (Typ.).
UVLO function
Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of
50300 mV (Typ.) is provided to prevent output chattering.
Fig.90 Soft start, Shutdown, UVLO timing chart
*Soft Start time(typ.)
BD9106FVM BD9107FVM BD9109FVM BD9110NV BD9120HFN Unit
Tss 3 1 1 5 1 msec
Hysteresis 50300mV
Ts s Ts s Ts s
Soft start
Standby mode Operating mode
Standby
mode Operating mode
Standby
mode Operating mode Standby mode
UVLO
EN UVLO
UVLO
VCC
EN
VOU
T
14/24
Short-current protection circuit with time delay function
Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for
the fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking
UVLO.
Fig.91 Short-current protection circuit with time delay timing chart
*Timer Latch time (typ.)
BD9106FVM BD9107FVM BD9109FVM BD9110NV BD9120HFN Unit
TLATCH 1 1 2 1 2 msec
In addition to current limit circuit, output short detect circuit is built in on BD9109FVM and BD9120HFN. If output
voltage fall below 2V(typ, BD9109FVM) or Vout×0.5(typ,BD9120HFN), output voltage will hold turned OFF.
Switching regulator efficiency
Efficiency ŋ may be expressed by the equation shown below:
Efficiency may be improved by reducing the switching regulator power dissipation factors PDα as follows:
Dissipation factors:
1) ON resistance dissipation of inductor and FETPD(I2R)
2) Gate charge/discharge dissipationPD(Gate)
3) Switching dissipationPD(SW)
4) ESR dissipation of capacitorPD(ESR)
5) Operating current dissipation of ICPD(IC)
1)PD(I2R)=IOUT2×(RCOIL+RON) (RCOIL[Ω]DC resistance of inductor, RON[Ω]ON resistance of FET
IOUT[A]Output current.)
2)PD(Gate)=Cgs×f×V (Cgs[F]Gate capacitance of FET
,f[H]Switching frequency,V[V]Gate driving voltage of FET)
4)PD(ESR)=IRMS2×ESR (IRMS[A]Ripple current of capacitor,ESR[Ω]Equivalent series resistance.)
5)PD(IC)=Vin×ICC (ICC[A]Circuit current.)
η= VOUT×IOUT
Vin×Iin ×100[%]= POUT
Pin ×100[%]= POUT
POUT+PDα ×100[%]
Vin2×CRSS×IOUT×f
IDRIVE
3)PD(SW)= (CRSS[F]Reverse transfer capacitance of FETIDRIVE[A]Peak current of gate.)
1msec
Output OFF
latch
EN
VOUT
Limi
t
IL
Standby
mode Operating mode
Standby
mode Operating mode
EN Timer latch EN
15/24
Consideration on permissible dissipation and heat generation
As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is
needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input voltage,
higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be
carefully considered.
For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered.
Because the conduction losses are considered to play the leading role among other dissipation mentioned above including
gate charge/discharge dissipation and switching dissipation.
P=IOUT2×(RCOIL+RON)
RON=D×RONP+(1-D)×RONN
DON duty (=VOUT/VCC)
RCOILDC resistance of coil
RONPON resistance of P-channel MOS FET
RONNON resistance of N-channel MOS FET
IOUTOutput current
If VCC=5V, VOUT=3.3V, RCOIL=0.15Ω, RONP=0.35Ω, RONN=0.25Ω
IOUT=0.8A, for example,
D=VOUT/VCC=3.3/5=0.66
RON=0.66×0.35+(1-0.66)×0.25
=0.231+0.085
=0.316[Ω]
P=0.82×(0.15+0.316)
298[mV]
As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration on
the dissipation as above, thermal design must be carried out with sufficient margin allowed.
0 25 50 75 100 125 150
0
200
400
600
800
1000
85
387.5mW
587.4mW
mounted on glass epoxy PCB
θj-a=212.8/W
Using an IC alone
θj-a=322.6/W
Power dissipation:Pd [mW]
Ambient temperature:Ta []
Fig.92 Thermal derating curve
(MSOP8)
Ambient temperature:Ta []
0 25 50 75 100 125 150
0
0.5
1.0
1.5
0.64W
0.90W
Power dissipation:Pd [W]
Ambient temperature:Ta []
Fig.94 Thermal derating curve
(SON008V5060)
for SON008V5060
ROHM standard 1layer board
θj-a=138.9/W
Using an IC alone
θj-a=195.3/W
0 25 50 75 100 125 150
0
0.5
1.0
1.5
0.63W
1.15W
Power dissipation:Pd [W]
Fig.93 Thermal derating curve
(HSON8)
mounted on glass epoxy PCB
θj-a=133.0/W
Using an IC alone
θj-a=195.3/W
85 105
16/24
Selection of components externally connected
1. Selection of inductor (L)
*Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases
efficiency. The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current
rating.
If VCC=5V, VOUT=3.3V, f=1MHz, ΔIL=0.3×0.8A=0.24A, for example,(BD9109FVM)
*Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better
efficiency.
2. Selection of output capacitor (CO)
As the output rise time must be designed to fall within the soft-start time, the capacitance of output capacitor should be
determined with consideration on the requirements of equation (5):
In case of BD9109FVM, for instance, and if VOUT=3.3V, IOUT=0.8A, and TSS=1ms,
Inappropriate capacitance may cause problem in startup. A 10 μF to 100 μF ceramic capacitor is recommended.
The inductance significantly depends on output ripple current.
A
s seen in the equation (1), the ripple current decreases as the
inductor and/or switching frequency increases.
ΔIL=
(VCC-VOUT)×VOUT
L×VCC×f
[
A
]
・・・
(
1
)
A
ppropriate ripple current at output should be 30% more or less of the
maximum output current.
ΔIL=0.3×IOUTmax. [A]・・・(2)
L=
(VCC-VOUT)×VOUT
ΔIL×VCC×f
[
H
]
・・・
(
3
)
(ΔIL: Output ripple current, and f: Switching frequency)
Output capacitor should be selected with the consideration on the stability region
and the equivalent series resistance required to smooth ripple voltage.
Output ripple voltage is determined by the equation (4)
ΔVOUT=ΔIL×ESR [V]・・・(4)
(ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor)
*Rating of the capacitor should be determined allowing sufficient margin against
output voltage. Less ESR allows reduction in output ripple voltage.
Fig.96 Output capacitor
(
5-3.3
)
×3.3
0.24×5×1M
L= =4.675μ 4.7[μH]
Co TSS×(Ilimit-IOUT)
VOUT ・・・
(
5
)
Tss: Soft-start time
Ilimit: Over current detection level, 2A(Typ)
ΔIL
Fig.95 Output ripple current
IL
VCC
IL
L
Co
VOUT
VCC
L
Co
VOUT
ESR
Co 1m×(2-0.8)
3.3 364 [μF]
17/24
3. Selection of input capacitor (Cin)
A low ESR 10μF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency.
4. Determination of RITH, CITH that works as a phase compensator
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area
due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high
frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the
power amplifier output with C and R as described below to cancel a pole at the power amplifier.
Gain
[dB]
Phase
[deg]
Fig.98 Open loop gain characteristics
A
0
0
-90
A
0
0
-90
fz(Amp.)
Fig.99 Error amp phase compensation characteristics
fp=
2π×RO×CO
1
fz(ESR)=2π×ESR×CO
1
Pole at power amplifie
r
When the output current decreases, the load resistance Ro
increases and the pole frequency lowers.
fp(Min.)=2π×ROMax.×CO
1[Hz]with lighter load
fp(Max.)=2π×ROMin.×CO
1[Hz]with heavier load
Zero at power amplifie
r
Increasing capacitance of the output capacitor lowers the pole
frequency while the zero frequency does not change. (This
is because when the capacitance is doubled, the capacito
r
ESR reduces to half.)
fz(Amp.)=2π×RITH.×CITH
1
fp(Min.)
fp(Max.)
fz(ESR)
IOUTMin. IOUTMax.
Gain
[dB]
Phase
[deg]
Input capacitor to select must be a low ESR capacitor of the capacitance
sufficient to cope with high ripple current to prevent high transient voltage. The
ripple current IRMS is given by the equation (6):
IRMS=IOUT×
VOUT
(
VCC-VOUT
)
VCC
[
A
]
・・・
(
6
)
When VCC is twice the Vout, IRMS=
IOUT
2
< Worst case > IRMS(max.)
If VCC=5V, VOUT=3.3V, and IOUTmax.=0.8A, (BD9109FVM)
IRMS=0.8×
3.3
(
5-3.3
)
5=0.38
[
ARMS
]
Fig.97 Input capacitor
VCC
L Co
VOUT
Cin
18/24
Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load
resistance with CR zero correction by the error amplifier.
5. Determination of output voltage
The output voltage VOUT is determined by the equation (7):
VOUT=(R2/R1+1)×VADJ・・・(7) VADJ: Voltage at ADJ terminal (0.8V Typ.)
With R1 and R2 adjusted, the output voltage may be determined as required.
Adjustable output voltage range 1.0V1.5V/ BD9107FVM, BD9120HFN
1.0V2.5V/BD106FVM, BD9110NV
Use 1 k100 k resistor for R1. If a resistor of the resistance higher than
100 k is used, check the assembled set carefully for ripple voltage etc.
Fig.101 Determination of output voltage
GND,PGND
SW
VCC,PVCC
EN
VOUT
ITH
VCC
VOUT
Cin
RITH
CITH
L
ESR
CO
RO
VOUT
Fig.100 Typical application
fz(Amp.)= fp(Min.)
2π×RITH×CITH
1 = 2π×ROMax.×CO
1
SW
6
1
A
DJ
L
Co R2
R1
Output
19/24
BD9106FVM, BD9107FVM, BD9109FVM, BD9120HFN Cautions on PC Board layout
Fig.102 Layout diagram
BD9110NV Cautions on PC Board layout
Fig.103 Layout diagram
For the sections drawn with heavy line, use thick conductor pattern as short as possible.
Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the
pin PGND.
Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring.
The package of HSON8 (BD9120HFN) and SON008V5050 (BD9110NV) has thermal FIN on the reverse of
the package. The package thermal performance may be enhanced by bonding the FIN to GND plane
which take a large area of PCB.
Table1. [BD9106FVM]
Symbol Part Value Manufacturer Series
L Coil 4.7μH Sumida CMD6D11B
TDK VLF5014AT-4R7M1R1
CIN Ceramic capacitor 10μF Kyocera CM316X5R106K10A
CO Ceramic capacitor 10μF Kyocera CM316X5R106K10A
CITH Ceramic capacitor 750pF murata GRM18series
RITH Resistance
VOUT=1.0V 18kΩ ROHM MCR10 1802
VOUT=1.2V 22kΩ ROHM MCR10 2202
VOUT=1.5V 22kΩ ROHM MCR10 2202
VOUT=1.8V 27kΩ ROHM MCR10 2702
VOUT=2.5V 36kΩ ROHM MCR10 3602
8
7
6
5
VOUT/ADJ
ITH
EN
GND
VCC
PVCC
SW
PGND
CO
GND
VOUT
VCC
L
EN
RITH
CITH
CIN
1
2
3
4
A
DJ
VCC
ITH
GND
EN
PVCC
SW
PGND
VCC
RITH
GND
Co
CIN
VOUT
EN
L
CITH
1
2
3
4
8
7
6
5
R2
R1
20/24
Table2. [BD9107FVM]
Symbol Part Value Manufacturer Series
L Coil 4.7μH Sumida CMD6D11B
TDK VLF5014AT-4R7M1R1
CIN Ceramic capacitor 10μF Kyocera CM316X5R106K10A
CO Ceramic capacitor 10μF Kyocera CM316X5R106K10A
CITH Ceramic capacitor 1000pF murata GRM18series
RITH Resistance
VOUT=1.0V 4.3kΩ ROHM MCR10 4301
VOUT=1.2V 6.8kΩ ROHM MCR10 6801
VOUT=1.5V 9.1kΩ ROHM MCR10 9101
VOUT=1.8V 12kΩ ROHM MCR10 1202
Table3. [BD9109VM]
Symbol Part Value Manufacturer Series
L Coil 4.7μH Sumida CMD6D11B
TDK VLF5014AT-4R7M1R1
CIN Ceramic capacitor 10μF Kyocera CM316X5R106K10A
CO Ceramic capacitor 10μF Kyocera CM316X5R106K10A
CITH Ceramic capacitor 330pF murata GRM18series
RITH Resistance 30kΩ ROHM MCR10 3002
Table4. [BD9110NV]
Symbol Part Value Manufacturer Series
L Coil 2.2μH TDK LTF5022T-2R2N3R2
CIN Ceramic capacitor 10μF Kyocera CM316X5R106K10A
CO Ceramic capacitor 22μF Kyocera CM316B226K06A
CITH Ceramic capacitor 1000pF murata GRM18series
RITH Resistance
VOUT=1.0V
12kΩ ROHM MCR10 1202
VOUT=1.2V
VOUT=1.5V
VOUT=1.8V
VOUT=2.5V
Table5. [BD9120HFN]
Symbol Part Value Manufacturer Series
L Coil 4.7μH Sumida CMD6D11B
TDK VLF5014AT-4R7M1R1
CIN Ceramic capacitor 10μF Kyocera CM316X5R106K10A
CO Ceramic capacitor 10μF Kyocera CM316X5R106K10A
CITH Ceramic capacitor 680pF murata GRM18series
RITH Resistance
VOUT=1.0V 8.2kΩ ROHM MCR10 8201
VOUT=1.2V 8.2kΩ ROHM MCR10 8201
VOUT=1.5V 4.7kΩ ROHM MCR10 4701
*The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on
your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing
the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When
switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier
diode established between the SW and PGND pins.
21/24
I/O equivalence circuit
BD9106FVM, BD9107FVM, BD9109FVM
BD9110NV, BD9120HFN
Fig.104 I/O equivalence circuit
VCC
EN
10kΩ
EN pin SW pin PVCC
SW
PVCC PVCC
VCC
A
DJ
10kΩ
ADJ pin (BD9106FVM, BD9107FVM)
VCC
VOUT
10kΩ
VOUT pin (BD9109FVM)
VCC
ITH
VCC
ITH pin
EN
10kΩ
EN pin SW pin PVCC
SW
PVCC PVCC
ITH
ITH pin (BD9120HFN)
VCC
ITH
ITH pin (BD9110NV)
VCC
ADJ pin
A
DJ
10kΩ
22/24
Cautions on use
1. Absolute Maximum Ratings
While utmost care is taken to quality control of this product, any application that may exceed some of the absolute
maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken,
short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the
absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses.
2. Electrical potential at GND
GND must be designed to have the lowest electrical potential In any operating conditions.
3. Short-circuiting between terminals, and mismounting
When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may
result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and
power supply or GND may also cause breakdown.
4.Operation in Strong electromagnetic field
Be noted that using the IC in the strong electromagnetic radiation can cause operation failures.
5. Thermal shutdown protection circuit
Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to
protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be
used thereafter for any operation originally intended.
6. Inspection with the IC set to a pc board
If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the
capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper
grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the
inspection process, be sure to turn OFF the power supply before it is connected and removed.
7. Input to IC terminals
This is a monolithic IC with P+ isolation between P-substrate and each element as illustrated below. This P-layer and the
N-layer of each element form a P-N junction, and various parasitic element are formed.
If a resistor is joined to a transistor terminal as shown in Fig 59:
P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or
GND>Terminal B (at transistor side); and
if GND>Terminal B (at NPN transistor side),
a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode.
The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits,
and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such
manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in
activation of parasitic elements.
Fig.105 Simplified structure of monorisic IC
8. Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from
the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring
pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay
attention not to cause fluctuations in the GND wiring pattern of external parts as well.
(Pin A)
P+ P+
N N
N
P
P substrate Parasitic diode
GND GND
Parasitic diode or transistor
N
P
N
C
(Pin B) B
E
GND
P+ P+
N
N
Resistance Transistor (NPN)
(Pin B)
C
E
B
GND
(Pin A)
GND
P substrate
Parasitic diode
Parasitic diode or transistor
23/24
Ordering part number
B D 91
V
T R F
ROHM part number Type
TR : Embossed taping
E2 : Embossed taping
M
Packa
g
e s
p
ecification
Packa
g
e
<Tape and Reel information>
Embossed carrier tape
TR
(The direction is the 1pin of product is at the upper light when you hold
reel on the left hand and you pull out the tape on the right hand)
Tape
Quantity
Direction
of feed
3000
p
cs
Reel
1Pin
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
MSOP8
<Dimension>
(
Unit:mm
)
41
58
2.9 ± 0.1
0.475
0.22
0.65
4.0 ± 0.2
0.6 ± 0.2
0.29 ± 0.15
2.8
±
0.1
0.75 ± 0.05
0.08 ± 0.05
0.9Max.
0.08 S
+0.05
0.04
0.145
+0.05
0.03
0.08
M
Direction of feed
When you order , please order in times the amount of package quantity.
(Unit:mm)
<Tape and Reel information>
Embossed carrier tape
TR
(The direction is the 1pin of product is at the upper light when you hold
reel on the left hand and you pull out the tape on the right hand)
Tape
Quantity
Direction
of feed
3000
p
cs
Reel
1Pin
X X
XX
X
XX
X X
XX
X
XX
X X
XX
X
XX
X X
XX
X
XX
X X
X X
X
X X
HSON8
<Dimension>
0.13
+0.1
0.05
4321
5678
3.00
±
0.2
2.80
±
0.2
2.90
±
0.2
0.475
0.32
±
0.10
0.65
0.6Max.
1234
(0.2) (1.8) (0.2)
(0.30)
(0.05)(2.2)
(0.15)
(0.45)
8765
Direction of feed
When you order , please order in times the amount of package quantity.
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
Tape
Quantity
Direction
of feed
Embossed carrier tape
2000pcs
E2
<Tape and Reel information>
When you order , please order in times the amount of package quantity.
Reel Direction of feed
1Pin
1234
1234
1234
1234
1234
1234
SON008V5060
<Dimension>
(Unit:mm)
5.0
±
0.15
6.0
±
0.15
1PIN MARK
765
4321
8
1.27
0.8
±
0.1
3.6
±
0.1
C0.25
0.4
+0.05
-
0.04
4.2
±
0.1
0.59
1.0MAX
+0.03
-
0.02
0.02
S
0.08
(0.22)
S
FVM : MSOP8
HFN : HSON8
NV : SON008V5060
06 : Adjustable (12.5V)
07 : Adjustable (11.5V)
09 : 3.3V
10 : Adjustable (12.5V)
20 : Adjustable (11.5V)
Catalog No.08T659A '08.9 ROHM ©
Appendix-Rev4.0
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Appendix
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM
CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account
when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no re-
sponsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples
of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to
use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no re-
sponsibility whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment
or devices (such as audio visual equipment, office-automation equipment, communication devices, elec-
tronic appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct
threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment,
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear
no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intend-
ed to be used for any such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may be controlled under
the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.