SEMICONDUCTOR
13-84
August 1997
HI-300 thru HI-307
CMOS Analog Switches
Features
• Analog Signal Range (±15V Supplies) . . . . . . . . ±15V
• Low Leakage at 25oC (Typ) . . . . . . . . . . . . . . . . . .40pA
• Low Leakage at 125oC (Typ) . . . . . . . . . . . . . . . . . .1nA
• Low On Resistance at 25oC (Typ) . . . . . . . . . . . . . .35Ω
• Break-Before-Make Delay (Typ) . . . . . . . . . . . . . . .60ns
• Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . .30pC
• TTL, CMOS Compatible
• Symmetrical Switch Elements
• Low Operating Power (Typ for Hl-300 - 303) . . . 1.0mW
Applications
• Sample and Hold (i.e., Low Leakage Switching)
• Op Amp Gain Switching (i.e., Low On Resistance)
• Portable, Battery Operated Circuits
• Low Level Switching Circuits
• Dual or Single Supply Systems
Description
The Hl-300 thru Hl-307 series of switches are monolithic
devices fabricated using CMOS technology and the Harris
dielectric isolation process. These switches feature break-
before-make switching, (Hl-301, HI-303, HI-305 and HI-307
only), low and nearly constant ON resistance over the full ana-
log signal range, and low power dissipation, (a few mW for the
Hl-300 thru HI-303, a few hundred mW for the HI-304 thru
HI-307).
The HI-300 thru HI-303 are TTL compatible and have a logic
“0” condition with an input less than 0.8V and a logic “1” condi-
tion with an input greater than 4V. The Hl-304 thru HI-307
switches are CMOS compatible and have a low state with an
input less than 3.5V and a high state with an input greater than
11V. (See pinouts f or s witch conditions with a logic “1” input.)
Pinouts
(Switch States are for a Logic “1” Input)
DUAL SPST HI-300 AND HI-304
TOP VIEWS SPST HI-301 AND HI-305
TOP VIEWS
(CERDIP, PDIP, SOIC) (METAL CAN)
† The substrate and case are
internally tied to V-. (The case
should not be used as the V-
connection, however.)
(CERDIP, PDIP, SOIC) (METAL CAN)
† The substrate and case are
internally tied to V-. (The case
should not be used as the V-
connection, however.)
DUAL DPST HI-302 AND HI-306 (PDIP, CERDIP, SOIC)
TOP VIEW DUAL SPDT HI-303 AND HI-307 (PDIP, CERDIP, SOIC)
TOP VIEW
NC
D1
NC
S1
NC
IN1
GND
V+
D2
NC
S2
NC
IN2
V-
1
2
3
4
5
6
7
14
13
12
11
10
9
8
LOGIC SWITCH
0 OFF
1ON
V+
S2
GND
NC
S1
5
3
10
4
8
6
D2
IN2
V-†
IN1
D1
2
1 9
7
LOGIC SW1 SW2
0 OFF ON
1 ON OFF
NC
D1
NC
S1
NC
IN
GND
V+
D2
NC
S2
NC
NC
V-
1
2
3
4
5
6
7
14
13
12
11
10
9
8
2
5
1
3
10
4
8
9
7
6
D2
NC
V-†
IN
D1
V+
S2
GND
NC
S1
1
2
3
4
5
6
7
14
13
12
10
9
8
NC
S3
D3
D1
S1
IN1
GND
V+
S4
D4
D2
S2
IN2
V-
11
LOGIC SWITCH
0 OFF
1ON
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
S3
D3
D1
S1
IN1
GND
V+
S4
D4
D2
S2
IN2
V-
LOGIC SW1
SW2 SW3
SW4
0 OFF ON
1 ON OFF
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1997 File Number 3125.1
13-85
Ordering Information
Functional Block Diagram
TYPICAL SWITCH HI-300 SERIES
PART
NUMBER TEMP.
RANGE (oC) PACKAGE PKG. NO.
HI1-0300-2 -55 to 125 14 Ld CERDIP F14.3
HI1-0300-5 0 to 75 14 Ld CERDIP F14.3
HI2-0300-2 -55 to 125 10 Pin Metal Can
(TO-100) T10.B
HI2-0300-5 0 to 75 10 Pin Metal Can
(TO-100) T10.B
HI3-0300-5 0 to 75 14 Ld PDIP E14.3
HI1-0301-2 -55 to 125 14 Ld CERDIP F14.3
HI1-0301-5 0 to 75 14 Ld CERDIP F14.3
HI2-0301-2 -55 to 125 10 Pin Metal Can
(TO-100) T10.B
HI2-0301-5 0 to 75 10 Pin Metal Can
(TO-100) T10.B
HI3-0301-5 0 to 75 14 Ld PDIP E14.3
HI9P0301-5 0 to 75 14 Ld SOIC M14.15
HI1-0302-2 -55 to 125 14 Ld CERDIP F14.3
HI1-0302-5 0 to 75 14 Ld CERDIP F14.3
HI3-0302-5 0 to 75 14 Ld PDIP E14.3
HI9P0302-5 0 to 75 14 Ld SOIC M14.15
HI1-0303-2 -55 to 125 14 Ld CERDIP F14.3
HI1-0303-5 0 to 75 14 Ld CERDIP F14.3
HI3-0303-5 0 to 75 14 Ld PDIP E14.3
HI9P0303-5 0 to 75 14 Ld SOIC M14.15
HI9P0303-9 -40 to 85 14 Ld SOIC M14.15
HI1-0304-2 -55 to 125 14 Ld CERDIP F14.3
HI1-0304-5 0 to 75 14 Ld CERDIP F14.3
HI2-0304-2 -55 to 125 10 Pin Metal Can
(TO-100) T10.B
HI2-0304-5 0 to 75 10 Pin Metal Can
(TO-100) T10.B
HI3-0304-5 0 to 75 14 Ld PDIP E14.3
HI1-0305-2 -55 to 125 14 Ld CERDIP F14.3
HI1-0305-5 0 to 75 14 Ld CERDIP F14.3
HI2-0305-2 -55 to 125 10 Pin Metal Can
(TO-100) T10.B
HI2-0305-5 0 to 75 10 Pin Metal Can
(TO-100) T10.B
HI3-0305-5 0 to 75 14 Ld PDIP E14.3
HI9P0305-5 0 to 75 14 Ld SOIC M14.15
HI1-0306-5 0 to 75 14 Ld CERDIP F14.3
HI3-0306-5 0 to 75 14 Ld PDIP E14.3
HI1-0307-2 -55 to 125 14 Ld CERDIP F14.3
HI1-0307-5 0 to 75 14 Ld CERDIP F14.3
HI3-0307-5 0 to 75 14 Ld PDIP E14.3
HI9P0307-5 0 to 75 14 Ld SOIC M14.15
PART
NUMBER TEMP.
RANGE (oC) PACKAGE PKG. NO.
S
N
IN P
D
HI-300 thru HI-307
13-86
Schematic Diagrams
SWITCH CELL
DIGITAL INPUT BUFFER AND LEVEL SHIFTER
MN2B
IN
MN3B
A
MP4B
MP3B MP2B
MN4B
MP5B
V+
MN6B
V-
OUT
MP1B
A
MN1B
MP3A
MN3A
MP4A
MN4A
MP2A
MN2A
MP1A
MN1A
D2A
200Ω
V+
LOGIC
GND
V-
IN
MP5A
MN5A
MP6A
MN6A
MP7A
MN7A
MP8A
MN8A
A
A
SWITCH CELL DRIVER
(ONE PER SWITCH CELL)
D1A
HI-300 thru HI-307
13-87
Absolute Maximum Ratings Thermal Information
Voltage Between Supplies . . . . . . . . . . . . . . . . . . . . . . . 44V (±22V)
Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . +VSUPPLY +4V
-VSUPPLY -4V
Analog Input Voltage . . . . . . . . . . . . . . . . . . . . . . .+VSUPPLY +1.5V
-VSUPPLY -1.5V
Typical Derating Factor. . . . . . . . . . 1.5mA/MHz Increase in ICCOP
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Temperature Range
HI-3XX-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
HI-3XX-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 75oC
Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . . 95 40
PDIP Package . . . . . . . . . . . . . . . . . . . 100 N/A
SOIC Package. . . . . . . . . . . . . . . . . . . 120 N/A
10 Pin TO-100 Metal Can Package. . . 160 75
Maximum Junction Temperature
CERDIP, TO-Can Packages . . . . . . . . . . . . . . . . . . . . . . . . 175oC
PDIP, SOIC Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Supplies = +15V, -15V; VIN = Logic Input. HI-300-303: VIN - for Logic “1” = 4V, for Logic “0” = 0.8V.
HI-304-307: VIN - for Logic “1” = 11V, for Logic “0” = 3.5V, Unless Otherwise Specified
PARAMETER TEMP
(oC)
-55oC TO 125oC0
o
C TO 75oC
UNITSMIN TYP MAX MIN TYP MAX
SWITCHING CHARACTERISTICS
Break-Before-Make Delay, tOPEN (Note 15) 25 - 60 - - 60 - ns
Switch On Time, tON (Note 13) 25 - 210 300 - 210 300 ns
Switch Off Time, tOFF (Note 13) 25 - 160 250 - 160 250 ns
Switch Off Time, tON (Note 14) 25 - 160 250 - 160 250 ns
Switch Off Time, tOFF (Note 14) 25 - 100 150 - 100 150 ns
“Off Isolation” (Note 6) 25 - 60 - - 60 - dB
Charge Injection (Note 7) 25 - 3 - - 3 - mV
Input Switch Capacitance, CS(OFF) 25 -16- -16-pF
Output Switch Capacitance, CD(OFF) 25 -14- -14-pF
Output Switch Capacitance, CD(ON) 25 -35- -35-pF
(High) Digital Input Capacitance, CIN 25 - 5 - - 5 - pF
(Low) Digital Input Capacitance, CIN 25 - 5 - - 5 - pF
DIGITAL INPUT CHARACTERISTICS
Input Low Level, VINL (Note 13) Full - - 0.8 - - 0.8 V
Input High Level, VINH (Note 13) Full 4 - - 4 - - V
Input Low Level, VINL (Note 14) Full - - 3.5 - - 3.5 V
Input High Level, VINH (Note 14) Full 11 - - 11 - - V
Input Leakage Current (Low), IINL (Note 5) Full - - 1 - - 1 µA
Input Leakage Current (High), IINH (Note 5) Full - - 1 - - 1 µA
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range Full -15 - +15 -15 - +15 V
On Resistance, rON (Note 2) 25 - 35 50 - 35 50 Ω
Full - 40 75 - 40 75 Ω
Off Input Leakage Current, IS(OFF) (Note 3) 25 - 0.04 1 - 0.04 5 nA
Full - 1 100 - 0.2 100 nA
HI-300 thru HI-307
13-88
Off Output Leakage Current, ID(OFF) (Note 3) 25 - 0.04 1 - 0.04 5 nA
Full - 1 100 - 0.2 100 nA
On Leakage Current, ID(ON) (Note 4) 25 - 0.03 1 - 0.03 5 nA
Full - 0.5 100 - 0.2 100 nA
POWER SUPPLY CHARACTERISTICS
Current, I+ (Notes 8, 13) 25 - 0.09 0.5 - 0.09 0.5 mA
Full - - 1 - - 1 mA
Current, I- (Notes 8, 13) 25 - 0.01 10 - 0.01 100 µA
Full - - 100 - - - µA
Current, I+ (Notes 9, 13) 25 - 0.01 10 - 0.01 100 µA
Full - - 100 - - - µA
Current, I- (Notes 9, 13) 25 - 0.01 10 - 0.01 100 µA
Full - - 100 - - - µA
Current, I+ (Notes 10, 14) 25 - 0.01 10 - 0.01 100 µA
Full - - 100 - - - µA
Current, I- (Notes 10, 14) 25 - 0.01 10 - 0.01 100 µA
Full - - 100 - - - µA
Current, I+ (Notes 11, 14) 25 - 0.01 10 - 0.01 100 µA
Full - - 100 - - - µA
Current, I- (Notes 11, 14) 25 - 0.01 10 - 0.01 100 µA
Full - - 100 - - - µA
NOTES:
1. As with all semiconductors, stresses listed under “Absolute Maximum Ratings” ma y be applied to devices (one at a time) without resulting
in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability. The conditions listed under “Electrical Specifications” are the only conditions recommended for satisfactory operation.
2. VS = ±10V, IOUT = 10mA. On resistance derived from the voltage measured across the switch under the above conditions.
3. VS = ±14V, VD = 14V.
4. VS = VD = ±14V.
5. The digital inputs are diode protected MOS gates and typical leakages of 1nA or less can be expected.
6. VS = 1VRMS, f = 500kHz, CL = 15pF, RL = 1K.
7. VS = 0V, CL = 10,000pF, Logic Drive = 5V pulse. (HI-300 - 303) Switches are symmetrical; S and D may be interchanged.
Logic Drive = 15V (HI-304 - 307).
8. VIN = 4V (one input) (all other inputs = 0V).
9. VIN = 0.8V (all inputs).
10. VIN = 15V (all inputs).
11. VIN = 0V (all inputs).
12. To drive from DTL/TTL circuits, pullup resistors to +5V supply are recommended.
13. HI-300 thru HI-303 only.
14. HI-304 thru HI-307 only.
15. HI-301, HI-303, HI-305, HI-307 only.
Electrical Specifications Supplies = +15V, -15V; VIN = Logic Input. HI-300-303: VIN - for Logic “1” = 4V, for Logic “0” = 0.8V.
HI-304-307: VIN - for Logic “1” = 11V, for Logic “0” = 3.5V, Unless Otherwise Specified (Continued)
PARAMETER TEMP
(oC)
-55oC TO 125oC0
o
C TO 75oC
UNITSMIN TYP MAX MIN TYP MAX
HI-300 thru HI-307
13-89
Typical Performance Curves
FIGURE 1. RDS(ON) vs VD AND TEMPERATURE FIGURE 2. rDS(ON) vs VD AND POWER SUPPLY VOLTAGE
FIGURE 3. DEVICE POWER DISSIPATION vs SWITCHING
FREQUENCY SINGLE LOGIC INPUT FIGURE 4. OFF ISOLATION vs FREQUENCY
FIGURE 5. IS(OFF) OR ID(OFF) vs TEMPERATURE†FIGURE 6. ID(ON) vs TEMPERATURE†
†The net leakage into the source or drain is the N-Channel leakage minus the P-Channel leakage . This difference can be positiv e , negativ e
or zero depending on the analog voltage and temperature, and will vary greatly from unit to unit.
DRAIN VOLTAGE (V)
DRAIN TO SOURCE ON RESISTANCE (Ω)
80
60
40
20
0
-15 -10 -5 0 5 10 15
V+ = +15V, V- = -15V
125oC
25oC
-55oC
DRAIN VOLTAGE (V)
DRAIN TO SOURCE ON RESISTANCE (Ω)
80
60
40
20
0-15 -10 -5 0 5 10 15
TA = 25oC
A V+ = +15V, V- = -15V
B V+ = +10V, V- = -10V
C V+ = +7.5V, V- = -7.5V
D V+ = +5V, V- = -5V
A
B
C
D
V+ = +15V, V- = -15V
TA = 25oC, VS = 15V, RL = 2K
HI-300 THRU HI-303
HI-304 THRU HI-307
110
LOGIC SWITCHING FREQUENCY (50% DUTY CYCLE) (Hz)
100 1K 10K 100K 1M
0.1
1.0
10
100
POWER DISSIPATION (mW)
RL = 100Ω
V+ = +15V, V- = -15V
CLOAD = 30pF, VS = 1VRMS
105
RL = 1kΩ
FREQUENCY (Hz)
106107108
100
80
60
40
20
0
OFF ISOLATION (dB)
TEMPERATURE (oC)
V+ = +15V, V- = -15V
10.0
1.0
0.1
0.0125 75 125
SOURCE OR DRAIN OFF
LEAKA GE CURRENT (nA)
TEMPERATURE (oC)
V+ = +15V, V- = -15V
10.0
1.0
0.1
0.0125 75 125
ID(ON) CHANNEL LEAKAGE (nA)
| VD | = | VS | = 14V
HI-300 thru HI-307
13-90
FIGURE 7A. TEST CIRCUIT FIGURE 7B. VIN(LOGIC) vs TIME
FIGURE 7C. VIN(LOGIC) vs TIME FIGURE 7D. VOUT vs TIME
FIGURE 7E. VOUT vs TIME FIGURE 7F. VOUT vs TIME
FIGURE 7G. VOUT vs TIME FIGURE 7H. VOUT vs TIME
NOTE: If RGEN, RL or CL is increased, there will be proportional increases in rise and/or fall RC times.
FIGURE 7. TYPICAL DELAY, RISE, FALL, SETTLING TIMES AND SWITCHING TRANSIENTS
Typical Performance Curves
(Continued)
+15V V+
D
RL
10kΩCL
10pF
V-
-15V
GND
VLOGIC
VGEN
RGEN = 0 S
IN
HI-300 THRU HI-303
TIME (µs)
6
4
2
0
0 0.4 0.8 1.2 1.6
LOGIC INPUT (V)
LOGIC INPUT
HI-304 THRU HI-307
TIME (µs)
15
10
5
0
0 0.4 0.8 1.2 1.6
LOGIC INPUT (V)
LOGIC INPUT
TIME (µs)
+10
+5
0
0 0.4 0.8 1.2 1.6
OUTPUT VOLTAGE (V)
VGEN = 10V
(SEE NOTE)
TIME (µs)
+5
0
0 0.4 0.8 1.2 1.6
OUTPUT VOLTAGE (V)
VGEN = 5V
TIME (µs)
+5
0
0 0.4 0.8 1.2 1.6
OUTPUT VOLTAGE (V)
VGEN = 0V
-5
TIME (µs)
0
0 0.4 0.8 1.2 1.6
OUTPUT VOLTAGE (V)
VGEN = -5V
-5
TIME (µs)
0
0 0.4 0.8 1.2 1.6
OUTPUT VOLTAGE (V)
VGEN = -10V
-5
-10
HI-300 thru HI-307
13-91
FIGURE 8. OUTPUT ON CAPACITANCE vs DRAIN VOLTAGE FIGURE 9. DIGITAL INPUT CAPACITANCE vs INPUT VOLTAGE
FIGURE 10. SWITCHING TIME vs TEMPERA TURE, HI-300 THRU
HI-303 FIGURE 11. SWITCHING TIME vs TEMPERA TURE, HI-304 THRU
HI-307
FIGURE 12. SWITCHING TIME vs NEGATIVE SUPPLY
VOLTAGE, HI-300 THRU HI-303 FIGURE 13. SWITCHING TIME vs NEGATIVE SUPPLY
VOLTAGE, HI-304 THRU HI-307
Typical Performance Curves
(Continued)
DRAIN VOLTAGE (V)
10 12 14 1686420
60
50
40
30
20
OUTPUT ON CAPACITANCE (pF)
INPUT VOLTAGE (V)
10 12 14 1686420
16
12
8
4
INPUT ON CAPACITANCE (pF)
TRANSITION
TRANSITION (INDETERMINATE
DUE TO ACTIVE INPUT) HI-300 THRU HI-303
HI-304 THRU HI-307
TEMPERATURE (oC)
65 85 105 12545255-35-55
300
200
100
SWITCHING TIME (ns)
-15
tON
tOFF
V+ = +15V, V- = -15V
VINH = 4.0V, VINL = 0V
tON
tOFF
TEMPERATURE (oC)
65 85 105 12545255-35-55
300
200
100
SWITCHING TIME (ns)
-15
V+ = +15V, V- = -15V
VINH = 15V, VINL = 0V
NEGATIVE SUPPLY (V)
10 1550
300
200
100
SWITCHING TIME (µs)
V+ = +15V, TA = 25oC
VINH = 4V, VINL = 0V
tON
tOFF
NEGATIVE SUPPLY (V)
10 1550
300
200
100
SWITCHING TIME (µs)
V+ = +15V, TA = 25oC
VINH = 15V, VINL = 0V
tON
tOFF
HI-300 thru HI-307
13-92
FIGURE 14. SWITCHING TIME vs POSITIVE SUPPLY VOLT A GE,
HI-304 THRU HI-307 FIGURE 15. SWITCHING TIME AND BREAK-BEFORE-MAKE
TIME vs POSITIVE SUPPLY VOLTAGE, HI-300
THRU HI-303
FIGURE 16. INPUT SWITCHING THRESHOLD vs POSITIVE SUPPLY VOLTAGE, HI-300 THRU HI-307
Typical Performance Curves
(Continued)
POSITIVE SUPPLY VOLTAGE (V)
10 1550
1.8
0.6
SWITCHING TIME (µs)
V- = -15V, TA = 25oC
VINH = 15V, VINL = 0V
tON
tOFF
1.6
1.4
1.2
1.0
0.8
0.4
0.2
0
POSITIVE SUPPLY VOLTAGE (V)
10 1550
1.8
0.6
SWITCHING TIME/BREAK-BEFORE-MAKE TIME (µs)
V- = -15V, TA = 25oC
VINH = 4.0V, VINL = 0V
tON
tOFF
1.6
1.4
1.2
1.0
0.8
0.4
0.2
0
tBBM
HI-301/303 ONLY
POSITIVE SUPPLY VOLTAGE (V)
10 1550
7
1
INPUT SWITCHING THRESHOLD V OLTAGE (V)
6
5
4
3
2
0
HI-304 THRU 307
HI-300 THRU 303
V- = -15V, TA = 25oC
HI-300 thru HI-307
13-93
All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Harris Semiconductor products are sold by description only. Harr is Semiconductor reserves the right to make changes in circuit design and/or specifications at
any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is
believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other
rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
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FAX: (65) 748-0400
SEMICONDUCTOR
Test Circuits and Waveforms
SWITCH TYPE VINH
HI-300 thru HI-303 4V
HI-304 thru HI-307 15V
SWITCH TYPE VINH
HI-301, HI-303 5V
HI-305, HI-307 15V
FIGURE 17. SWITCHING TEST CIRCUIT (tON, tOFF) FIGURE 18. BREAK-BEFORE-MAKE TEST CIRCUIT (tBBM
+15V V+
D
RL
300ΩCL
33pF
V-
-15V
GND
LOGIC
VS = +3V S
INPUT
VOSWITCH
OUTPUT
LOGIC “1” = SWITCH ON
LOGIC
INPUT
0V
VS
0V
SWITCH
OUTPUT
VINH 50% 50%
10%
90%
tON
tOFF
+15V V+
D2
RL2 CL2
V-
-15V
GND
LOGIC
VS2 = +3V S2
INPUT
OUT 1
OUT 2
D1
S1
VS1 = +3V
RL1 CL1
LOGIC “1” = SWITCH ON
LOGIC
INPUT
0V
0V
SWITCH
OUTPUT
VINH
50% 50%
tBBM
50% 50%
0V
OUT 1
OUT 2
RL1 = RL2 = 300Ω
CL1 = CL2 = 33pF
tBBM
HI-300 thru HI-307
