HMDL-2416 Four Character 3.8 mm (0.15 in.) Glass/Ceramic Smart Alphanumeric Display Data Sheet Description Features The HMDL-2416 is a smart 3.8 mm (0.15 in.) four character, sixteen segment red GaAsP display. It is sealed in a glass/ceramic 18 pin dual-in-line package. The on-board CMOS IC contains memory, ASCII decoder, multiplexing circuitry, and drivers. It has a wide operating temperature range, and is fully TTL compatible, wave solderable, and highly reliable. This display is ideally suited for military and high reliability industrial applications where a rugged, reliable, easyto-use alphanumeric display is required. * Wide operating temperature range -55C to +100C * CMOS IC for low power consumption * Smart alphanumeric display Built-in RAM, ASCII decoder, and LED drive circuitry * Very fast access time, 160 ns * Excellent ESD protection Built-in protective diodes * Full TTL compatibility over operating temperature range * End-stackable * Wide viewing angle * Wave solderable Applications * Military equipment * Avionics * High reliability industrial equipment Absolute Maximum Ratings Supply Voltage, VCC to Ground ...................................... -0.5 V to 7.0 V Input Voltage, Any Pin to Ground ........................ -0.5 V to VCC + 0.5 V Free Air Operating Temperature Range, TA ................ -55C to +100C Storage Temperature, TS ............................................ -65C to +125C Maximum Solder Temperature, 1.59 mm (0.063 in.) Below Seating Plane, t < 5 sec. ............................................... 260C ESD WARNING: THE HMDL-2416 IS IMPLEMENTED IN A STANDARD CMOS PROCESS WITH DIODE PROTECTION OF ALL INPUTS. STANDARD PRECAUTIONS FOR HANDLING CMOS DEVICES SHOULD BE OBSERVED. Package Dimensions Recommended Operating Conditions Parameter Supply Voltage Input Voltage High Input Voltage Low 2 Symbol VCC VIH VIL Min. 4.5 2.0 Nom. 5.0 Max. 5.5 0.8 Units V V V DC Electrical Characteristics over Operating Temperature Range Typical Values Parameter ICC 4 Digits ON (10 Seg/Digit)[1,2] ICC Cursor[2,3,4] ICC Blank Symbol ICC Units mA -55C 120 25C 85 +100C 70 Test Conditions VCC = 5.0 V ICC(CU) ICC(BL) mA mA 170 1.8 125 1.5 105 1.3 Input Current, Max. IIL A 22 17 12 VCC = 5.0 V VCC = 5.0 V BL = 0.8 V VCC = 5.0 V VIN = 0.8 V Thermal Resistance Junction to Case RJ-C C/W/Device 20 Guaranteed Values Parameter ICC 4 Digits ON (10 Seg/Digit)[1,2] ICC Cursor[2,3,4] ICC Blank Input Current, Max. Power Dissipation[5] Leak Rate Symbol ICC ICC(CU) ICC(BL) IIL PD LR Units mA mA mA A mW cc/sec 25C VCC = 5.0 V 115 165 3.5 30 575 Maximum Over Operating Temperature Range VCC = 5.5 V 167 225 8.0 40 918 5 x 10-8 Notes: 1. "%" illuminated in all four characters. 2. Measured at five seconds. 3. Cursor character is sixteen segments and DP ON. 4. Cursor operates continuously over operating temperature range. 5. Power Dissipation = VCC * ICC (10 seg.). AC Timing Characteristics over Temperature at VCC = 4.5 V[1] Symbol 1 tAS 2 tWD 3 tW 4 tDS 5 tDH 6 tAH 7 tCEH 8 tCES 9 tCLR 10 tACC Parameter Address Setup Time Write Delay Time Write Time Data Setup Time Data Hold Time Address Hold Time Chip Enable Hold Time Chip Enable Setup Time Clear Time Access Time Refresh Rate Note: 1. These parameters are guaranteed by design but are not tested. 3 -20C tMIN 90 10 80 40 40 40 40 90 2.4 130 420-790 25C tMIN 115 15 100 60 45 45 45 115 3.5 160 310-630 70C tMIN 150 20 130 80 50 50 50 150 4.0 200 270-550 Units ns ns ns ns ns ns ns ns ms ns Hz Optical Characteristics Parameter Peak Luminous Intensity per Digit, 8 segments ON (character average) Peak Wavelength Dominant Wavelength Off Axis Viewing Angle Digit Size Symbol IV Peak Peak d Min. 0.2 Typ. 0.6 Units mcd 655 640 65 3.81 nm nm degrees mm Test Conditions VCC = 5.0 V, "*" illuminated in all 4 digits (25C) Timing Diagram Character Font Description 4 Relative Luminous Intensity vs. Temperature Electrical Description Display Internal Block Diagram Figure 1 shows the internal block diagram for the HMDL-2416 display. The CMOS IC consists of a four-word ASCII memory, a four-word cursor memory, a 64word character generator, 17 segment drivers, four digit drivers, and the scanning circuitry necessary to multiplex the four monolithic LED characters. In normal operation, the divide-byfour counter sequentially accesses each of the four RAM locations and simultaneously enables the appropriate display digit driver. The output of the RAM is decoded by the character generator which, in turn, enables the appropriate display segment drivers. For each display location, the cursor enable (CUE) selects whether the data from the ASCII RAM (CUE = 0) or the stored cursor (CUE = 1) is to be displayed. The cursor character is denoted by all sixteen segments and the DP ON. Seven-bit ASCII data is stored in RAM. Since the display uses a 64-character decoder, half of the possible 128 input combinations are invalid. For each display location where D5 = D6 in the ASCII RAM, the display character is blanked. The entire display is blanked when BL = 0. Data is loaded into the display through the data inputs (D6-D0), digit selects (A1, A0), chip enables (CE1, CE2), cursor select (CU), and write (WR). The cursor select (CU) determines whether data is stored in the ASCII RAM (CU = 1) or cursor memory (CU = 0). When CE1 = CE2 = WR = 0 and CU = 1, the informa- 5 tion on the data inputs is stored in the ASCII RAM at the location specified by the digit selects (A1, A0). When CE1 = CE2 = WR = 0 and CU = 0, the information on the data input, D0, is stored in the cursor at the location specified by the digit selects (A1, A0). If D0 = 1, a cursor character is stored in the cursor memory. If D0 = 0, a previously stored cursor character will be removed from the cursor memory. If the clear input (CLR) equals zero for one internal display cycle (4 ms minimum), the data in the ASCII RAM will be rewritten with zeroes and the display will be blanked. Note that the blanking input (BL) must be equal to logical one during this time. Data Entry Figure 2 shows a truth table for the HMDL-2416 display. Setting the chip enables (CE1, CE2) to their low state and the cursor select (CU) to its high state will enable data loading. The desired data inputs (D6-D0) and address inputs (A1, A0) as well as the chip enables (CE1, CE2) and cursor select (CU) must be held stable during the write cycle to ensure that the correct data is stored into the display. Valid ASCII data codes are shown in Figure 3. The display accepts standard sevenbit ASCII data. Note that D6 = D5 for the codes shown in Figure 2. If D6 = D5 during the write cycle, then a blank will be stored in the display. Data can be loaded into the display in any order. Note that when A1 = A0 = 0, data is stored in the furthest right-hand display location. Cursor Entry As shown in Figure 2, setting the chip enables (CE1, CE2) to their low state and the cursor select (CU) to its low state will enable cursor loading. The cursor character is indicated by the display symbol having all 16 segments and the DP ON. The least significant data input (D0), the digit selects (A1, A0), the chip enables (CE1, CE2), and the cursor select (CU) must be held stable during the write cycle to ensure that the correct data is stored in the display. If D0 is in a low state during the write cycle, then a cursor character will be removed at the indicated location. If D0 is in a high state during the write cycle, then a cursor character will be stored at the indicated location. The presence or absence of a cursor character does not affect the ASCII data stored at that location. Again, when A1 = A0 = 0, the cursor character is stored in the furthest right-hand display location. All stored cursor characters are displayed if the cursor enable (CUE) is high. Similarly, the stored ASCII data words are displayed, regardless of the cursor characters, if the cursor enable (CUE) is low. The cursor enable (CUE) has no effect on the storage or removal of the cursor characters within the display. A flashing cursor is displayed by pulsing the cursor enable (CUE). For applications not requiring a cursor, the cursor enable (CUE) can be connected to ground and the cursor select (CU) can be connected to VCC. This inhibits the cursor function and allows only ASCII data to be loaded into the display. Figure 1. HMDL-2416 Internal Block Diagram. 6 Display Clear As shown in Figure 2, the ASCII data stored in the display will be cleared if the clear (CLR) is held low and the blanking input (BL) is held high for 4 ms minimum. The cursor memory is not affected by the clear (CLR) input. Cursor characters can be stored or removed even while the clear (CLR) is low. Note that the display will be cleared regardless of the state of the chip enables (CE1, CE2). However, to ensure that all four display characters are cleared, CLR should be held low for 4 ms following the last write cycle. Function Write Data Memory BL CLR CUE CU L X X Display Blank As shown in Figure 2, the display will be blanked if the blanking input (BL) is held low. Note that the display will be blanked regardless of the state of the chip enables (CE1, CE2) or write (WR) inputs. The ASCII data stored in the display and the cursor memory are not affected by the blanking input. ASCII data and cursor data can be stored even while the blanking input (BL) is low. Note that while the blanking input (BL) is low, the clear (CLR) function is inhibited. A flashing display can be obtained by applying a low frequency square wave to the blanking input (BL). Because the blanking input (BL) also resets the internal display multiplex counter, the frequency applied to the blanking input (BL) should be much slower than the display multiplex rate. Finally, dimming of the display through the blanking input (BL) is not recommended. CE1 CE2 WR A1 A0 D6 D5 D4 D3 D2 D1 D0 DIG3 L L L L L H H L H L H a b c d a b c d a b c d a b c d a b c d a b c d a b c d NC NC NC H X X X X X X X X X H H H X X H X H X H X X X X X X X X X X X Write Cursor X X X L L L L L L H H L H L H X X X X X X X X X X X X X X X X X X X X X X X X H H H H NC NC NC L L H H L H L H X X X X X X X X X X X X X X X X X X X X X X X X L L L L NC NC NC X X X X X X X X X Disable Cursor Memory X X X X X X X X X L X X X L L L L L = LOGIC LOW INPUT H = LOGIC HIGH INPUT X = DON'T CARE L X X H L X H X H X X "a" = ASCII CODE CORRESPONDING TO SYMBOL " NC = NO CHANGE = CURSOR CHARACTER (ALL SEGMENTS ON) NC NC NC Disable Data Memory Write Clear Cursor DIG2 DIG1 DIG0 NC NC NC NC NC NC Previously Written Data NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC Previously Written Cursor " Figure 2a. Cursor/Data Memory Write Truth Table. Function BL CLR CUE CU CE1 CE2 WR DIG3 DIG2 DIG1 DIG0 CUE H H H H L H X X X X X X X X Display previously written data Display previously written cursor Clear H L X X X X X* Clear data memory, cursor memory unchanged *NOTE: CLR should be held low for 4 ms following the last WRITE cycle to ensure all data is cleared. Blanking L X X X X Figure 2b. Displayed Data Truth Table. 7 X X Blank display, data and cursor memories unchanged Figure 3. HPDL-2416 ASCII Character Set. Mechanical and Electrical Considerations The HMDL-2416 is an 18 pin dual-in-line package that can be stacked horizontally and vertically to create arrays of any size. The HMDL-2416 is designed to operate continuously between -55C to +100C for all possible input conditions including the illuminated cursor in all four character locations. The HMDL2416 is assembled by die attaching and wire bonding the four GaAsP/GaAs monolithic LED chips and the CMOS IC to a 18 lead ceramic-glass dual-in-line package. It is designed either to plug into DIP sockets or to solder into PC boards. The inputs to the CMOS IC are protected against static discharge and input current latchup. However, for best results standard CMOS handling precautions should be used. Prior to use, the HMDL-2416 should be stored in anti-static tubes or conductive material. During assembly, a grounded conductive work area should be used. The assembly personnel should use conductive wrist straps. Lab coats made of For product information and a complete list of distributors, please go to our website: synthetic materials should be avoided since they are prone to static charge build-up. Input current latchup is caused when the CMOS inputs are subjected either to a voltage below ground (VIN < ground) or to a voltage higher than VCC (VIN > VCC) and a high current is forced into the input. To prevent input current latchup and ESD damage, unused inputs should be connected either to ground or to VCC, voltages should not be applied to the inputs until VCC has been applied to the display, and transient input voltages should be eliminated. www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright (c) 2007 Avago Technologies Limited. All rights reserved. Obsoletes 5954-0931E 5964-9911E October 19, 2007