Description
The HMDL-2416 is a smart 3.8 mm (0.15 in.) four
character, sixteen segment red GaAsP display. It is
sealed in a glass/ceramic 18 pin dual-in-line package.
The on-board CMOS IC contains memory, ASCII
decoder, multiplexing circuitry, and drivers. It has a
wide operating temperature range, and is fully TTL
compatible, wave solderable, and highly reliable. This
display is ideally suited for military and high reliability
industrial applications where a rugged, reliable, easy-
to-use alphanumeric display is required.
ESD WARNING: THE HMDL-2416 IS IMPLEMENTED IN A STANDARD CMOS PROCESS
WITH DIODE PROTECTION OF ALL INPUTS. STANDARD PRECAUTIONS FOR HANDLING
CMOS DEVICES SHOULD BE OBSERVED.
Absolute Maximum Ratings
Supply Voltage, VCC to Ground ...................................... -0.5 V to 7.0 V
Input Voltage, Any Pin to Ground ........................ -0.5 V to VCC + 0.5 V
Free Air Operating Temperature Range, TA................ -55°C to +100°C
Storage Temperature, TS............................................ -65°C to +125°C
Maximum Solder Temperature, 1.59 mm (0.063 in.)
Below Seating Plane, t < 5 sec. ............................................... 260°C
HMDL-2416
F our Character 3.8 mm (0.15 in.) Glass/Ceramic
Smart Alphanumeric Display
Data Sheet
Features
• Wide operating temperature range
-55°C to +100°C
• CMOS IC for low power consumption
• Smart alphanumeric display
Built-in RAM, ASCII decoder, and LED drive circuitry
• Very fast access time, 160 ns
• Excellent ESD protection
Built-in protective diodes
• Full TTL compatibility over operating temperature range
• End-stackable
• Wide viewing angle
• Wave solderable
Applications
• Military equipment
• Avionics
• High reliability industrial equipment
2
Package Dimensions
Recommended Operating Conditions
Parameter Symbol Min. Nom. Max. Units
Supply Voltage VCC 4.5 5.0 5.5 V
Input V oltage High VIH 2.0 V
Input V oltage Low VIL 0.8 V
3
AC Timing Characteristics over Temperature at VCC = 4.5 V[1]
Symbol Parameter -20°C tMIN 25°C tMIN 70°C tMIN Units
1t
AS Address Setup Time 90 115 150 ns
2t
WD Write Delay Time 10 15 20 ns
3t
WWrite Time 80 100 130 ns
4t
DS Data Setup Time 40 60 80 ns
5t
DH Data Hold Time 40 45 50 ns
6t
AH Address Hold Time 40 45 50 ns
7t
CEH Chip Enable Hold Time 40 45 50 ns
8t
CES Chip Enable Setup Time 90 115 150 ns
9t
CLR Clear Time 2.4 3.5 4.0 ms
10 tACC Access Time 130 160 200 ns
Refresh Rate 420-790 310-630 270-550 Hz
Note:
1. These parameters are guaranteed by design but are not tested.
Guaranteed Values
Maximum Over Operating
25°C Temperature Range
Parameter Symbol Units VCC = 5.0 V VCC = 5.5 V
ICC 4 Digits ON (10 Seg/Digit)[1,2] ICC mA 115 167
ICC Cursor[2,3,4] ICC(CU) mA 165 225
ICC Blank ICC(BL) mA 3.5 8.0
Input Current, Max. IIL µA30 40
Power Dissipation[5] PDmW 575 918
Leak Rate LR cc/sec 5 x 10-8
Notes:
1. “%” illuminated in all four characters.
2. Measured at five seconds.
3. Cursor character is sixteen segments and DP ON.
4. Cursor operates continuously over operating temperature range.
5. Power Dissipation = VCC • ICC (10 seg.).
DC Electrical Characteristics over Operating Temperature Range
Typical Values
Parameter Symbol Units -55°C25°C +100°C Test Conditions
ICC 4 Digits ON I CC mA 120 85 70 VCC = 5.0 V
(10 Seg/Digit)[1,2]
ICC Cursor[2,3,4] ICC(CU) mA 170 125 105 VCC = 5.0 V
ICC Blank ICC(BL) mA 1.8 1.5 1.3 VCC = 5.0 V
BL = 0.8 V
Input Current, Max. IIL µA 221712 V
CC = 5.0 V
VIN = 0.8 V
Thermal Resistance RΘJ-C °C/W/Device 20
Junction to Case
4
Timing Diagram
Character Font Description Relative Luminous Intensity vs.
Temperature
Optical Characteristics
Parameter Symbol Min. Typ. Units Test Conditions
Peak Luminous Intensity per Digit, IV Peak 0.2 0.6 mcd VCC = 5.0 V,
8 segments ON (character average) “*” illuminated in all 4 digits
(25°C)
Peak Wavelength λ Peak 655 nm
Dominant Wavelength λd640 nm
Off Axis Viewing Angle ±65 degrees
Digit Size 3.81 mm
5
Electrical Description
Display Internal Block
Diagram
Figure 1 shows the internal block
diagram for the HMDL-2416
display. The CMOS IC consists of
a four-word ASCII memory, a
four-word cursor memory, a 64-
word character generator, 17
segment drivers, four digit drivers,
and the scanning circuitry
necessary to multiplex the four
monolithic LED characters. In
normal operation, the divide-by-
four counter sequentially
accesses each of the four RAM
locations and simultaneously
enables the appropriate display
digit driver. The output of the
RAM is decoded by the character
generator which, in turn, enables
the appropriate display segment
drivers. For each display location,
the cursor enable (CUE) selects
whether the data from the ASCII
RAM (CUE = 0) or the stored
cursor (CUE = 1) is to be
displayed. The cursor character is
denoted by all sixteen segments
and the DP ON. Seven-bit ASCII
data is stored in RAM. Since the
display uses a 64-character
decoder, half of the possible 128
input combinations are invalid.
For each display location where
D5 = D6 in the ASCII RAM, the
display character is blanked. The
entire display is blanked when
BL = 0.
Data is loaded into the display
through the data inputs (D6-D0),
digit selects (A1, A0), chip
enables (CE1, CE2), cursor select
(CU), and write (WR). The cursor
select (CU) determines whether
data is stored in the ASCII RAM
(CU = 1) or cursor memory
(CU = 0). When CE1 = CE2 =
WR = 0 and CU = 1, the informa-
tion on the data inputs is stored
in the ASCII RAM at the location
specified by the digit selects (A1,
A0). When CE1 = CE2 = WR = 0
and CU = 0, the information on
the data input, D0, is stored in
the cursor at the location speci-
fied by the digit selects (A1, A0).
If D0 = 1, a cursor character is
stored in the cursor memory. If
D0 = 0, a previously stored
cursor character will be removed
from the cursor memory.
If the clear input (CLR) equals
zero for one internal display
cycle (4 ms minimum), the data
in the ASCII RAM will be
rewritten with zeroes and the
display will be blanked. Note that
the blanking input (BL) must be
equal to logical one during this
time.
Data Entry
Figure 2 shows a truth table for
the HMDL-2416 display. Setting
the chip enables (CE1, CE2) to
their low state and the cursor
select (CU) to its high state will
enable data loading. The desired
data inputs (D6-D0) and address
inputs (A1, A0) as well as the chip
enables (CE1, CE2) and cursor
select (CU) must be held stable
during the write cycle to ensure
that the correct data is stored
into the display. Valid ASCII data
codes are shown in Figure 3. The
display accepts standard seven-
bit ASCII data. Note that D6 =D
5
for the codes shown in Figure 2.
If D6 = D5 during the write cycle,
then a blank will be stored in the
display. Data can be loaded into
the display in any order. Note
that when A1 = A0 = 0, data is
stored in the furthest right-hand
display location.
Cursor Entry
As shown in Figure 2, setting the
chip enables (CE1, CE2) to their
low state and the cursor select
(CU) to its low state will enable
cursor loading. The cursor
character is indicated by the
display symbol having all 16
segments and the DP ON. The
least significant data input (D0),
the digit selects (A1, A0), the chip
enables (CE1, CE2), and the
cursor select (CU) must be held
stable during the write cycle to
ensure that the correct data is
stored in the display. If D0 is in a
low state during the write cycle,
then a cursor character will be
removed at the indicated
location. If D0 is in a high state
during the write cycle, then a
cursor character will be stored at
the indicated location. The
presence or absence of a cursor
character does not affect the
ASCII data stored at that loca-
tion. Again, when A1 = A0 = 0,
the cursor character is stored in
the furthest right-hand display
location.
All stored cursor characters are
displayed if the cursor enable
(CUE) is high. Similarly, the
stored ASCII data words are
displayed, regardless of the
cursor characters, if the cursor
enable (CUE) is low. The cursor
enable (CUE) has no effect on
the storage or removal of the
cursor characters within the
display. A flashing cursor is
displayed by pulsing the cursor
enable (CUE). For applications
not requiring a cursor, the cursor
enable (CUE) can be connected
to ground and the cursor select
(CU) can be connected to VCC.
This inhibits the cursor function
and allows only ASCII data to be
loaded into the display.
6
Figure 1. HMDL-2416 Internal Block Diagram.
7
L = LOGIC LOW INPUT “a” = ASCII CODE CORRESPONDING TO SYMBOL “ ”
H = LOGIC HIGH INPUT NC = NO CHANGE
X = DON’T CARE = CURSOR CHARACTER (ALL SEGMENTS ON)
Display Blank
As shown in Figure 2, the display
will be blanked if the blanking
input (BL) is held low. Note that
the display will be blanked
regardless of the state of the chip
enables (CE1, CE2) or write (WR)
inputs. The ASCII data stored in
the display and the cursor
memory are not affected by the
blanking input. ASCII data and
cursor data can be stored even
while the blanking input (BL) is
low. Note that while the blanking
input (BL) is low, the clear (CLR)
function is inhibited. A flashing
display can be obtained by
Function BL CLR CUE CU CE1CE2WR DIG3DIG2DIG1DIG0
CUE HH LXXXX Display previously written data
HH HXXXX Display previously written cursor
Clear H L XXXXX Clear data memory, cursor memory
unchanged
*NOTE: CLR should be held low for 4 ms
following the last WRITE cycle to ensure
all data is cleared.
Blanking L X XXXXX Blank display, data and cursor
memories unchanged
Figure 2a. Cursor/Data Memory Write Truth Table.
Figure 2b. Displayed Data Truth Table.
*
Function BL CLR CUE CU CE1CE2WR A1A0D6D5D4D3D2D1D0DIG3DIG2DIG1DIG0
Write L X X H L L L L L a a aaaaaNCNCNC
Data L H b b bbbbbNCNC NC
Memory H L c c cccccNC NCNC
HHddddddd NCNCNC
Disable X X X H X X H X X X X XXXXX Previously Written
Data X X X H X H X Data
Memory X X X H H X X
Write
Write X X X L L L L L L X X XXXXHNCNCNC
Cursor L H X X XXXXHNCNC NC
HLXXXXXXHNC NCNC
HHXXXXXXH NCNCNC
Clear X X X L L L L L L X X XXXXLNCNCNC
Cursor L H X X XXXXLNCNC NC
HLXXXXXXLNC NCNC
HHXXXXXXL NCNCNC
Disable X X X L X X H X X X X XXXXX Previously Written
Cursor X X X L X H X Cursor
Memory X X X L H X X
Display Clear
As shown in Figure 2, the ASCII
data stored in the display will be
cleared if the clear (CLR) is held
low and the blanking input (BL)
is held high for 4 ms minimum.
The cursor memory is not
affected by the clear (CLR) input.
Cursor characters can be stored
or removed even while the clear
(CLR) is low. Note that the
display will be cleared regardless
of the state of the chip enables
(CE1, CE2). However, to ensure
that all four display characters
are cleared, CLR should be held
low for 4 ms following the last
write cycle.
applying a low frequency square
wave to the blanking input (BL).
Because the blanking input (BL)
also resets the internal display
multiplex counter, the frequency
applied to the blanking input
(BL) should be much slower than
the display multiplex rate. Finally,
dimming of the display through
the blanking input (BL) is not
recommended.
Figure 3. HPDL-2416 ASCII Character Set.
Mechanical and Electrical
Considerations
The HMDL-2416 is an 18 pin
dual-in-line package that can be
stacked horizontally and
vertically to create arrays of any
size. The HMDL-2416 is designed
to operate continuously between
-55°C to +100°C for all possible
input conditions including the
illuminated cursor in all four
character locations. The HMDL-
2416 is assembled by die attach-
ing and wire bonding the four
GaAsP/GaAs monolithic LED
chips and the CMOS IC to a 18
lead ceramic-glass dual-in-line
package. It is designed either to
plug into DIP sockets or to solder
into PC boards.
The inputs to the CMOS IC are
protected against static discharge
and input current latchup. How-
ever, for best results standard
CMOS handling precautions
should be used. Prior to use, the
HMDL-2416 should be stored in
anti-static tubes or conductive
material. During assembly, a
grounded conductive work area
should be used. The assembly
personnel should use conductive
wrist straps. Lab coats made of
synthetic materials should be
avoided since they are prone to
static charge build-up. Input
current latchup is caused when
the CMOS inputs are subjected
either to a voltage below ground
(VIN < ground) or to a voltage
higher than VCC (VIN > VCC) and a
high current is forced into the
input. To prevent input current
latchup and ESD damage, unused
inputs should be connected either
to ground or to VCC, voltages
should not be applied to the
inputs until VCC has been applied
to the display, and transient input
voltages should be eliminated.
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Obsoletes 5954-0931E
5964-9911E October 19, 2007
