Application Note 1607 ISL8120EVAL4Z Evaluation Board Setup Procedure Description Circuits Description The ISL8120 integrates two voltage-mode synchronous buck PWM controllers. It can be used either for dual independent outputs or a 2-phase single-output regulator. J1 and J2 are the input power terminals. The ISL8120EVAL4Z evaluation board is used for performance demo of 2/n-phase single-output applications. This application note introduces the setup procedure and performance of the ISL8120EVAL4Z evaluation board. The ISL8120EVAL3Z evaluation board is for performance demo of dual independent outputs and DDR applications. Refer to application note AN1528 "ISL8120EVAL3Z Evaluation Board Setup Procedure" for details of the ISL8120EVAL3Z board. References Ordering Information ISL8120EVAL4Z The input electrolytic capacitors are used to handle the input current ripples. Two upper and two lower Renesas "speed" series LFPAK MOSFETs are used for each phase. 320nH PULSE surface mount inductors are used for each phase. Under the 500kHz setup, the inductor current peak-to-peak ripple is 7.5A at 12V input and 1.2V output. Four SANYO POSCAP 2R5TPF470M7L (7m) are used as output E-caps. TP2 and TP3 are remote sense posts. These pins can be used to monitor and evaluate the system voltage regulations. If the user wants to use these test posts for remote sense, the R29 and R31 need to be changed to higher values, such as 10. Also, the related voltage sense divider needs to be increased to a higher resistance, such as 1k. * ISL8120 datasheet PART NUMBER J3 and J4 are output lugs for load connections. DESCRIPTION IISL8120EVAL4Z evaluation board Recommended Equipment * 0V to 22V power supply with at least 20A source current capability, battery, or notebook AC adapter. * Two electronic loads capable of sinking current up to 30A. * Digital multimeters (DMMs). TP1 is a test socket to hold the scope probe to check the output waveforms. JP9 is used to disable the part. JP6 is for connection of inputs of clock signal for the part to be synchronized with. JP5 is used for connection of ISHARE signals of multiple boards in parallel operation applications. JP3, JP4, R15 and R17 are used to set up the phase shift between the 2 phases of the IC. * 100MHz quad-trace oscilloscope. Quick Start 1. Ensure that the circuit is correctly connected to the supply and loads prior to applying any power. 2. Adjust the input supply to be 12V. Turn on the input power supply. 3. Verify the output voltage is 1.2V. If PGOOD is set high, the LED2 will be green. If PGOOD is set low, the LED2 will be red. TP4 is the test post to monitor PGOOD. R27 is used to isolate the noise at PVCC caused by driving. In 3.3V applications, it is recommended to short R27 to 0 in order to prevent VCC from dropping below POR under low input voltage. Evaluating the Other Output Voltage The ISL8120EVAL4Z kit output is preset to 1.2V/50A. VOUT1 can also be adjusted between 0.6V to 3V by changing the value of R26 and R6 for VOUT, as given by Equation 1. The same rule applies for VOUT2. R6 R 26 = ------------------------------------------------ V OUT V REF - 1 July 1, 2016 AN1607.2 1 where VREF = 0.6V (EQ. 1) CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2010, 2013, 2016. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1607 FIGURE 1. ISL8120EVAL4Z EVALUATION BOARD Programming the Input Voltage UVLO and its Hysteresis Parallel Operation for Current Sharing Application By programming the voltage divider at the EN/FF pin connected to the input rail, the input UVLO and its hysteresis can be programmed. The ISL8120EVAL4Z has R20 4.32k and R21 1.62k; the IC will be disabled when input voltage drops below 2.94V and will restart until VIN recovers to be above 3.2V. The ISL8120 regulator outputs can be paralleled with current sharing control capability. The configuration for parallel operation is shown in Typical Application VIII in the datasheet. For this evaluation board, follow these steps to set up the parallel operation of 2 boards: For 12V applications, it is suggested to have R20 24.9k and R21 2.43k, of which the IC is disabled when the input voltage drops below 9V and will restart until VIN recovers to be above 10.5V. 1. Change R5 to 100 for both boards. 2. Use 2 wires (ISHARE, GND) connecting the ISHARE signals of the 2 boards through JP5. Refer to the ISL8120 datasheet to program the UVLO falling threshold and hysteresis. The equations are restated here in Equations 2 and 3, where RUP and RDOWN are the upper and lower resistors of the voltage divider at EN/FF pin, VHYS is the desired UVLO hysteresis and VFTH is the desired UVLO falling threshold. 3. Use 2 wires (EN/FF, GND) connecting the EN/FF signals of the 2 boards through JP9. V HYS R UP = --------------I HYS where IHYS = 2x30A R UP V ENREF R DOWN = -------------------------------------------- where VENREF = 0.8V V FTH - V ENREF (EQ. 2) 4. Use 2 wires connecting from JP10 (CLKOUT, GND) of one board to JP6 (FSYNC, GND) of another board. 5. Connecting the power supply to the inputs of the 2 boards. 6. Connecting the output of the 2 boards together and apply the loads. Figure 2 shows the setup picture of 2 boards in parallel operation. (EQ. 3) Note the ISL8120 EN/FF pin is a triple function pin and the voltages applied to the EN/FF pins are also fed to adjust the amplitude of each channel's individual sawtooth. 2 AN1607.2 July 1, 2016 Application Note 1607 Board 1 Board 2 + P/S --- VIN VIN + - + ISHARE ISHARE ENABLE ENABLE CLKOUT SYNC + - + - - VOUT VOUT + ELECTRONIC LOAD FIGURE 2. PARALLEL OPERATION SETUP 3 AN1607.2 July 1, 2016 ISL8120EVAL4Z Schematic J2 TP9 'Vin+' 'VIN+' Vin+ 12V TYP C56 DNP C55 1500uF/25V TP10 'GND' J1 R6 200 1% 'GND' R13 0 VCC R26 200 1% VMON C25 1n 10V X5R R11 10k 1% ISHARE JP5 'GND' R12 76.8k 1% R22 0 C11 0.22u 10V X5R 33 1 COMP1 (I/O) UGATE1 (O) 24 2 ISET (O) PHASE1 (O) 23 3 ISHARE (O) 4 EN/FF1 (I/O) ISL8120IRZ Q3 RJK0305DPB Q4 RJK0305DPB Q5 RJK0301DPB Q6 RJK0301DPB 'FSYNC' C6 C1 C2 1u 22u 22u 25V X5R 25V X5R 25V X5R R4 6.49k 1% LGATE1 (O) 22 PVCC (I/O) 21 5 FSYNC (I/O) LGATE2 (O) 20 6 EN/FF2 (I/O) PHASE2 (O) 19 7 CLKOUT/REFIN (I/O) UGATE2 (O) 18 COMP R16 3.3k 1 R19 3.3k VIN (I) C21 10u 16V X5R TP2 'VREM+' R31 0 VOUT C23 10u 6V3 X5R R28 Q7 2k RJK0305DPB Q8 RJK0305DPB C12 DNP C5 1u C3 25V X5R 22u 25V X5R C13 DNP C14 DNP C15 DNP C17 DNP C33 DNP C22 1u 25V X5R C28 0.22u 10V X5R Q9 RJK0301DPB Q10 RJK0301DPB R25 DNP C40 1u 16V X5R +1.2V/50A OC=65A R1 6.49k 1% TP1 J3 GND C59 0.1u 10V X7R 1 C30 C31 2R5TPF470M7L 2R5TPF470M7L C16 10u 16V X5R R30 2k R78 2 J4 VOUT+ 1 C58 0.1u 16V X5R L2 320nH C42 DNP 16 ISEN2A (I) 15 VSEN2+ (I) ISEN2B (I) 14 13 VSEN2- (I) VMON2 (I/O) C20 10u 16V X5R C39 10u 16V X5R R29 0 TP3 'VREM-' JP2 R2 390 1% C29 4.7u 25V X5R VCC 3 JP9 'GND' 17 C26 C27 2R5TPF470M7L 2R5TPF470M7L C18 DNP Vin+ R17 10k 1% R15 10k 1% 'ENABLE' C7 DNP BOOT2 (I/O) VMON 9 VCC 12 R18 10k FB2 (I/O) JP10 11 PGOOD (O) 'CLKOUT' COMP2 (I/O) 8 CLOCKOUT C60 0.1u 10V X7R L1 320nH R14 DNP JP6 'GND' JP1 R27 5.1 PGND (PAD) BOOT1 (I/O) 26 25 27 VCC (I) ISEN1A (I) ISEN1B (I) 29 31 32 C19 2.2u 10V X5R C4 DNP FSYNC 'GND' C34 1n 10V X5R R3 390 1% U1 'ISHARE' R20 8.25k 1% R21 3.09k 1% VSEN1- (I) 'GND' FB1 (I/O) C24 1n 10V X5R R10 10k 1% JP7 VMON1 (I/O) 'COMP' 30 R7 1k 1% C9 2.2n 10V X7R COMP VCC R5 0 VSEN1+ (I) R8 10k 1% R9 45.3 1% 28 C8 15n 10V X7R LED2 JP3 JP4 34 'PGOOD' GREEN 2 RED TP4 Intersil Corporation Q1 2N7002LT1 1 Phase Decode 2 PGOOD 5% tolerance resistors can be used unless specified. FIGURE 3. ISL8120EVAL4Z SCHEMATIC Size B Title ISL8120EVAL4Z Industrial & Communication Products 1001 Murphy Ranch Road Milpitas, CA 95035 Rev A Application Note 1607 R20=8.25k, R21=3.09k: UVLO_HIGH=3.2V, UVLO_LOW= 2.94V R20=33k, R21=5.1k: UVLO_HIGH=7V, UVLO_LOW= 6V JP8 'GND' C10 150p 10V X7R C32 100p 10V X5R 10 4 'VMON' AN1607.2 July 1, 2016 Application Note 1607 ISL8120EVAL4Z Bill of Materials QTY UNITS REFERENCE DESIGNATOR 1 ea 1 ea C32 3 ea C24, C25, C34 3 ea C58-C60 1 ea 1 DESCRIPTION MANUFACTURER MANUFACTURER PART PWB-PCB, ISL8120EVAL4Z, REVA, QFN, ROHS TBD ISL8120EVAL4ZREVAPCB CAP, SMD, 0603, 100pF, 50V, 5%, C0G, ROHS PANASONIC ECJ-1VC1H101J CAP, SMD, 0603, 1000pF, 16V, 10%, X7R, ROHS C0603X7R160102KNE VENKEL CAP, SMD, 0603, 0.1F, 16V, 10%, X7R, ROHS MURATA GRM39X7R104K016AD C40 CAP, SMD, 0603, 1F, 16V, 10%, X5R, ROHS GRM188R61C105KA12D ea C23 CAP, SMD, 0603, 10F, 6.3V, 20%, X5R, ROHS TDK C1608X5R0J106M 1 ea C10 CAP, SMD, 0603, 150pF, 50V, 5%, NP0, ROHS PANASONIC ECJ-1VC1H151J 1 ea C8 CAP, SMD, 0603, 15000pF, 16V, 10%, X7R, ROHS VENKEL 0603X7R160-153KNE 1 ea C9 CAP, SMD, 0603, 2200pF, 50V, 5%, C0G, ROHS MURATA GRM1885C1H222JA01D 2 ea C11, C28 CAP, SMD, 0603, 0.22F, 10V, 10%, X7R, ROHS AVX 0603ZC224KAT2A 1 ea C19 0 ea C4, C7, C18, C42 3 ea C5, C6, C22 1 ea 4 MURATA CAP, SMD, 0603, 2.2F, 16V, 10%, X5R, ROHS MURATA GRM188R61C225KE15D CAP, SMD, 0603, DNP-PLACE HOLDER, ROHS CAP, SMD, 0805 , 1.0F, 25V, 10%, X5R, ROHS AVX 08053C105KAT2A C29 CAP, SMD, 0805, 4.7F, 25V, 10%, X5R, ROHS MURATA GRM21BR61E475KA12L ea C16, C20, C21, C39 CAP, SMD, 1206, 10F, 16V, 10%, X5R, ROHS VENKEL C1206X5R160-106KNE(Pb-FREE) 3 ea C1, C2, C3 0 ea 1 ea C55 CAP, RADIAL, 12.5x25, 1500F, 25V, 20%, ALUM.ELEC., ROHS RUBYCON 25ZL1500M12.5X25 0 ea DNP (C56) CAP, RADIAL, 12.5x25, 1500F, 25V, 20%, ALUM.ELEC., ROHS RUBYCON 25ZL1500M12.5X25 4 ea C26, C27, C30, C31 CAP, POSCAP, SMD, 7.3x4.3, 470F, 2.5V, 20%, 7m, ROHS SANYO 2R5TPF470M7L 2 ea L1, L2 COIL-PWR INDUCTOR, SMD, 13mm, 320nH, 20%, 45A, Pb-Free PULSE PA1513.321NLT 1 ea J2 (SEE ASSEMBLY INSTRUCTIONS) CONN-GEN, BIND.POST, INSUL-RED, THMBNUT-GND JOHNSON COMPONENTS 111-0702-001 1 ea J1 (SEE ASSEMBLY INSTRUCTIONS) CONN-GEN, BIND.POST, INSUL-BLK, THMBNUT-GND JOHNSON COMPONENTS 111-0703-001 1 ea TP1 CONN-SCOPE PROBE TEST PT, COMPACT, PCB TEKTRONIX MNT, ROHS 131-5031-00 1 ea TP10 CONN-TURRET, TERMINAL POST, TH, ROHS KEYSTONE 1514-2 4 ea TP2, TP3, TP4, TP9 CONN-COMPACT TEST PT, VERTICAL, WHT, ROHS KEYSTONE 5007 10 ea JP1-JP10 CONN-HEADER, 1x2, RETENTIVE, 2.54mm, 0.230x0.120, ROHS" BERG/FCI 69190-202HLF 1 ea LED2 LED, SMD, 3x2.5mm, 4P, RED/GREEN, 12/20MCD, 2V LUMEX SSL-LXA3025IGC-TR 1 ea U1 CAP, SMD, 1210, 22F, 25V, 10%, X5R, ROHS C12, C13, C14, C15, C17, C33 CAP, SMD, 1210, DNP-PLACE HOLDER, ROHS IC-DUAL PHASE PWM CONTROLLER, 32P, QFN, INTERSIL 5x5, ROHS 5 ISL8120IRZ AN1607.2 July 1, 2016 Application Note 1607 ISL8120EVAL4Z Bill of Materials QTY UNITS REFERENCE DESIGNATOR (Continued) DESCRIPTION MANUFACTURER TRANSISTOR, N-CHANNEL, 3LD, SOT-23, 60V, DIODES, INC. 115mA, ROHS MANUFACTURER PART 1 ea Q1 2N7002-7-F 4 ea Q5, Q6, Q9, Q10 TRANSISTOR, N-CHANNEL, 5P, LFPAK, 30V, 60A, ROHS RENESAS TECHNOLOGY RJK0301DPB 4 ea Q3, Q4, Q7, Q8 TRANSISTOR, N-CHANNEL, 5P, LFPAK, 30V, 30A, ROHS RENESAS TECHNOLOGY RJK0305DPB 1 ea R27 4 ea R5, R22, R29, R31 1 ea R7 6 ea 1 ea R21 2 ea 2 RES, SMD, 0603, 5.1, 1/10W, 1%, TF, ROHS VISHAY/DALE CRCW06035R10FNEA RES, SMD, 0603, 0, 1/10W, TF, ROHS VENKEL CR0603-10W-000T RES, SMD, 0603, 1k, 1/10W, 1%, TF, ROHS PANASONIC ERJ-3EKF1001V KOA RK73H1JT1002F R8, R10, R11, R15, R17, R18 RES, SMD, 0603, 10k, 1/10W, 1%, TF, ROHS RES, SMD, 0603, 1.62k, 1/10W, 1%, TF, ROHS PANASONIC ERJ-3EKF1621V R6, R26 RES, SMD, 0603, 200, 1/10W, 1%, TF, ROHS VENKEL CR0603-10W-2000FT ea R28, R30 RES, SMD, 0603, 2k, 1/10W, 1%, TF, ROHS RK73H1JTTD2001F 2 ea R16, R19 RES, SMD, 0603, 3.3k, 1/10W, 1%, TF, ROHS ROHM MCR03EZPFX3301 2 ea R2, R3 RES, SMD, 0603, 390, 1/10W, 1%, TF, ROHS PANASONIC ERJ-3EKF3900V 1 ea R20 RES, SMD, 0603, 4.32k, 1/10W, 1%, TF, ROHS 1 ea R9 RES, SMD, 0603, 45.3, 1/10W, 1%, TF, ROHS VENKEL CR0603-10W-45R3FT 2 ea R1, R4 RES, SMD, 0603, 6.49k, 1/10W, 1%, TF, ROHS PANASONIC ERJ-3EKF6491V 1 ea R12 RES, SMD, 0603, 76.8k, 1/10W, 1%, TF, ROHS VENKEL CR0603-10W-7682FT 0 ea R13 RES, SMD, 0603, DNP-PLACE HOLDER, ROHS 0 ea R14, R25 RES, SMD, 0805, DNP-PLACE HOLDER, ROHS 1 ea R78 2 ea J3, J4 4 ea 1 RES, SMD, 1206, 2, 1/4W, 1%, TF, ROHS KOA VENKEL CR1206-4W-02R0 HDWARE, MTG, CABLE TERMINAL, 6-14AWG, BERG/FCI LUG&SCREW, ROHS KPA8CTP Bottom four corners BUMPONS, 0.44inW x 0.20inH, DOMETOP, , BLACK 3M SJ-5003SPBL ea Place assy in bag BAG, STATIC, 5x8, ZIPLOC, ROHS INTERSIL 212403-013 1 ea a) J1, J2 - Studs from binding Instructions for assembly. posts INTERSIL ASSEMBLY INSTRUCTIONS 0 ea b) Should be cut with with appropriate Instructions for assembly. INTERSIL ASSEMBLY INSTRUCTIONS 0 ea c) Cutters and de-burred with Instructions for assembly. resin backed, INTERSIL ASSEMBLY INSTRUCTIONS 0 ea d) Aluminum oxide sander. Instructions for assembly. INTERSIL ASSEMBLY INSTRUCTIONS 1 ea LABEL-FOR SERIAL NUMBER AND BOM REV # INTERSIL LABEL-SERIAL NUMBER 6 AN1607.2 July 1, 2016 Application Note 1607 ISL8120EVAL4Z Board Layout FIGURE 4. TOP SILKSCREEN FIGURE 5. TOP LAYER FIGURE 6. 2nd LAYER FIGURE 7. 3rd LAYER 7 AN1607.2 July 1, 2016 Application Note 1607 ISL8120EVAL4Z Board Layout (Continued) FIGURE 8. 4th LAYER FIGURE 9. 5th LAYER FIGURE 10. BOTTOM LAYER FIGURE 11. BOTTOM SILKSCREEN (MIRRORED) 8 AN1607.2 July 1, 2016 Application Note 1607 ISL8120EVAL4Z Board Layout (Continued) FIGURE 12. BOTTOM SILKSCREEN 9 AN1607.2 July 1, 2016 Application Note 1607 90 100 80 90 70 80 60 EFFICIENCY (%) EFFICIENCY (%) Test Data for ISL8120EVAL4Z 50 40 30 20 70 60 50 40 30 20 10 10 0 0 5 10 15 20 25 30 35 40 45 50 0 55 0 5 10 OUTPUT CURRENT (A) 1.2075 1.208 VOLTAGE OUTPUT (VDC) 1.210 VOLTAGE OUTPUT 1.2060 1.2055 1.2050 1.2045 1.2040 25 30 35 40 45 50 55 FIGURE 14. EFFICIENCY (12V VIN AND 3.3V VOUT) 1.2080 1.2065 20 OUTPUT CURRENT (A) FIGURE 13. EFFICIENCY (12V VIN AND 1.2V VOUT) 1.2070 15 1.206 1.204 1.202 1.200 1.198 1.196 1.194 1.192 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 VOLTAGE INPUT 1.190 1 5 9 13 17 21 25 29 33 37 41 45 49 53 FIGURE 15. LINE REGULATION FIGURE 16. LOAD REGULATION FIGURE 17. OUTPUTS RIPPLE UNDER 0A LOAD FIGURE 18. OUTPUTS RIPPLE UNDER 50A LOAD 10 57 CURRENT OUTPUT (A) AN1607.2 July 1, 2016 Application Note 1607 Test Data for ISL8120EVAL4Z (Continued) FIGURE 19. LOAD TRANSIENT (0A TO 50A STEP, SLEW_RATE = 2.5A/s) FIGURE 20. LOAD TRANSIENT (50A TO 0A STEP, SLEW_RATE = 2.5A/s) VIN LGATE PGOOD VOUT FIGURE 21. POWER-UP UNDER 50A FULL LOAD Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 11 AN1607.2 July 1, 2016 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Intersil: ISL8120EVAL4Z