®
F ebruary 20 00 1/6
1
INTRODUCTION
Most power supplies and associated logic circuitry need a means of powering up the switching regulator ,
MOSFETs. This ap plication note describes a bias power supply to meet these needs and also provide
standby power when the main unit is off.
The VIP er20 A, a part of STMicro el ectro ni cs propr ie tary VIPow er (Vertical Int ellig ent Pow er), is a curre nt
mode P WM with a 700 v olt av alanche rugged M OSFET. It uses a fab rication proces s which allows th e
integration of analog control circuits with a vertical power device on the same chip. It can provide an
output with 10W power capability for wide range input, or 20W for single input voltage range.
KEY FEATURES OF THE VIPer20 A
n
Adjustable swi tching Frequency Up to 200KHz
n
Current mode Control
n
Burst Mode Operation in Stand-by Mode, Meets “Blue Angel” standards
n
Undervoltage Lock-out with Hysteresis
n
Integrated Start -up Suppl y
n
Avalanche Rugged
n
Overtemperature Protection
n
Primary or secondary Regulation
GE NERAL CIRCUIT DESCRIPTION
This demoboard (see schematic in Fig. 1) is a 110 to 375 Vdc inpu t discontinuous Flyback, working at
100 k Hz. Th e ou tput can d el iver 12 vo lts a t 0.5 amps co ntinuo us . T his c ircui t can be p ow ered fro m th e:
main bulk capacitors of an off-line power supply, power factor correction output stage, or the AC line with
the addition of a low current bridge rectifier. It benefits from the EMI filter present in a typical power
supply. The output us es a S chottky di o de for be tter e fficienc y. C 7 is a l ow ESR capaci tor to ma nage the
ripple current. IC2 provides the reference and the feedback to tightly regulate the output. CS5, CS6, and
RS3 form the feedback loop compensation to optimize stability during transients. The demoboard can be
tested with convection air. Depending on the final application, air flow might be needed to keep the
VIPer20A under the thermal shutdown limit.
AN1246
- APPLICATION NOTE
VIPower: AUXILIARY BIAS
POWER SUPPLY USING VIPer20A
J.S. Lo Giudice
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AN1246 - APPLICATION NOTE
Figure 1: Sche matic
ELECTRICAL SPECIFICATION FROM MEASURED RES U LTS
PARAMETER RESULTS
Input voltage range J1 110 to 375 VDC
Output J2 12V from 0 to 0.5A
Load re gulation (0 to 0. 5A) from set point +/- 2 5m V or +/- 0.2%
Line regulation (at max load) +/- 1mV
Effici ency 84% at 120VDC and 79 % at 375 VDC
Outpu t ripple voltage 35 m V MA X
Input power at no load 0. 65W MA X
Transient response, 50% load step +/-60 mV typical
C12
220pF
1KV
CS6
.47u
RS5
1.37k
R6
150
R7
5.23k
RS10
nu
F1
0.5 A Pico Fuse
16T
C3
120uF
16V
c9
2.2n
Y cap
128T
C7
680uF
16V
J1
CON
1
2
CS4
3.9nF
DS2
STPS1H100A
RS4
1.6
D4
NU
14T
R11
2.7k
J2
CON
1
2
R9
3.9
RS14
82K
CS11
47n
R8
1.2k
CS5
33n
C10
220pF
1KV
IC2
TL431
A C
R
DS3
LL4148
RS2
4.99K
C2
4.7uF
400V
L2
10uH
C8
330uF
16V
IC1
VIPer20ADIP
2
3
8
7
1
6
45
vdd
source
drain
drain
osc
drain
compdrain
D1
BYT11-600
RS3
5.1k
Cramer Coil CSM 1608-027
T1
3
2
4
1
6
7
IC3
H11A817A
12
43
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AN1246 - APPLICATION NOTE
PC BOARD TOP LEGEND BOT TOM FOI L AND SURFACE MOUNT CO MPONENTS
* Parts available from STMicroelectronics. “S” in legend denotes a surface moun t part.
QUANTITY REFERENCE DESCRIPTION VALUE
1C2 F4.7µF 400V
1C3 120µF 16V (low ESR)
1 CS 4 3.9nF 50 V
1 CS 5 33nF 50V
1CS6 47µF 25 V
1C7 680µF 16V (low ESR)
1C8 330µF 16V (low ESR)
1 C9 Y1 Rate d safe ty ca p 2.2 nF
1 C1 0 220pF 1KV
1CS11 47µF 50 V
1 C1 2 220pF 1KV
1 D1 *BYT11 -600 600 V 1A Ultrafast
1 DS 2 *S TPS1H1 00A 100V 1A S chottky
1 DS3 LL4148
1 F1 fuse 0.5 A pico
1 IC1 *VIPer20ADIP
1 IC2 *TL431
1 IC3 H11A817 A (optocoupler)
1 J1 Con nector terminal
1 J2 Con nector terminal
1 L2 Coilcraft PCH-27-103 10µH
1RS2 4.99KΩ 1% 1/8W
1RS3 5.1KΩ 1/8W
1RS4 1.6Ω 1/8W
1 RS5 1.37Ω 1% 1/8 W
1R6 150Ω 1/4W
1R7 5.23KΩ 1% 1/4W
1R8 1.2KΩ 1/4W
1 R9 3.9Ω 1/4W
1 R11 2.7KΩ 1/4W
1RS14 82KΩ 1/4W
1 T1 Cramer Coil CSM 1608-027
COMPONENT LIST
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AN1246 - APPLICATION NOTE
TRANSFORME R SPECIFICATION
CONNECTING THE DEMOBOARD
This demo board has two connectors. Connect a DC voltage source capable of delivering up to 400 volts
DC to connector J1. Be sure to connect the positive source to the + terminal of J1 and the negative to the
- terminal befo re tu rn ing on th e in pu t p ower. The mi nimum vol tage to ope rate thi s d emo boar d is 110
vol t DC. Connect an electronic load or resistive load to J2.
LAYOUT CONSIDERATIONS
Some simple rules to improve performance and minimize noise should be followed:
1. Minimize power loops. The switched power current paths inner loop area must be as small as possible.
This can be ac compli shed by careful layou t of the pri nted circui t board and the us e of surface mou nt
components. This avoids radiated and conducted EMI noise, and improves the efficiency by
eliminating parasitic inductance, thus reducing or eliminating the need for snubbers and EMI filtering.
2 Use separate tra cks for low level signal and power traces carrying fast switching pulses. This can be
seen on the VIPer20A pin 3 on the printed circuit lay out. When signal paths are sharing the same
trace as a power path, instabilities may result. The compensation components, CS6, RS3, and CS4
are on a separate trace connected directly to the source of the device.
BURST M ODE
When the output current is too low, the burst mode operation takes over automatically. This results in
mi ssing cycles as shown on th e foll owing scope wave form (Figur e 2). Vin i s 375 Vdc Iout i s at no load.
As c an be se en, ther e i s one pu lse ou t o f te n p ulses t o r educe pow e r co ns ump tion. The ou tput rippl e is
negligible.
PERFORMANCE AND COST CONSIDERATION
This demo board has been optimized for performance. Cost trade off can be accomplished by configuring
the VIPer for primary regulation. The output regulation will degrade to +/- 5% but the cost of the
optocoupler , the TL431 and 5 other passive components can eliminated. If more output ripple voltage can
be tolerated, than L2 and C8 can be eliminated.
Primary inductance 1.65mH
Core C40 EE16
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AN1246 - APPLICATION NOTE
Figure 2: Burst mode Waveform
1
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AN1246 - APPLICATION NOTE
1
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