KAOHSIUNG HITACHI ELECTRONICS CO.,LTD P.O. BOX 26-27 2,13TH EAST ST. K.E.P.Z. KAOHSIUNG TAIWAN R.O.C. TEL:(07) 8211101(10 LINE) FAX:(07) 821-5860 FOR MESSRS: DATE - Sep 19,2002 CUSTOMERS ACCEPTANCE SPECIFICATIONS SP24V001 CONTENTS No. ITEM __ SHEET No. PAGE 1__|COVER 7B64PS_2701-SP24V001-2 4-1/1 2 _|RECORD OF REVISION 7B64PS_2702-SP24V001-2 2-1/1 3 [MECHANICAL DATA 7B64PS_2703-SP24V001-2 3-4/1 4 |ABSOLUTE MAXIMUM RATINGS __|7B64PS 2704-SP24v001-2 4-1/1 5 |ELECTRICAL CHARACTERISTICS __|7B64PS 2705-SP24V001-2 5-1/2~2/2 6 |OPTICAL CHARACTERISTICS 7B64PS_2706-SP24V001-2 6-1/2~2/2 7_|BLOCK DIAGRAM 7B64PS_2707-SP24V001-2 7-1/1 8 __|INTERFACE TIMING CHART 7B64PS_2708-SP24V001-2 8-1/3~3/3 9 |DIMENSIONAL OUTLINE 7B63PS_2709-SP24V001-2 9-1/3~3/3 10 _|APPEARANCE STANDARD 7B64PS_2710-SP24V001-2 10-1/5~5/5 11_|PRECAUTION IN DESIGN 7B64PS _2711-SP24V001-2 11-1/3~3/3 12_|DESIGNATION OF LOT MARK 7B64PS_2712-SP24V001-2 12-1/1 13_|PRECAUTION FOR USE 7B64PS_2713-SP24V001-2 13-1/1 *When product will be discontinued, customer will be informed by HITACHI with twelve months prior announcement. ACCEPTED BY: proposen av-/iyt (Ch ~/ KAOHSIUNG HITACHI Sh. 7B64PS 2701-SP24V001-2 PAGE | 1-1/1 ELECTRONICS CO.,LTD. |[No. RECORD OF REVISION DATE SHEET No. SUMMARY Sep.19,'02 |7B64PS 2703- Add : (9) Back Light VS: MIN 1000 MIN 1200 SP24V001-2 CFL life time : 50,000h(average) Page 3-1/1 Note : CFL life time = life time for half of CFL brightness. 7B64PS 2703- |Changed : 6.2 SP24V001-2 VL: TYP 360 TYP 430 Page 6-2/2 fL: MIN 30 MIN 40 IKAOHSIUNG HITACHI ELECTRONICS CO.,LTD. DAT Sep.19,02 Sh. No. 7B64PS 2702-SP24V001-2 PAGE 2-1/13. MECHANICAL DATA (1) (2) (3) (4) (5) (6) (7) (8) (9) Part Name Module Size Dot Size Dot Pitch Number of Dots Duty LCD Viewing Direction Back Light SP24V001 257.5(W)mm x 174.0(H)mm x 7.0(D)mm_ max. 0.27 (Wymm x 0.27 (H)mm 0.30 (W)mm x 0.30 (H)mm 640 (W) x 480 (H)dots 1/242 (Display is divided into 2 blocks) Film type black/white (negative . type) the upper polarizer is anti-glare type. The bottom polarizer is transmissive type. 12 O'clock Cold cathode fluorescent lamp CFL life time : 50,000h(average) Note : CFL life time = life time for half of CFL brightness. KAOHSIUNG HITACHI ELECTRONICS CO.,LTD. DATE] Sep.19,02 Sh. PAGE 3-1/1 No. 7B64PS 2703-SP24V001-24. ABSOLUTE MAXIMUM RATINGS 4 Note 1 DOFF,FRAME,LOAD,CP,UD0~UD3,LD0~LD3. Note 2 Make certain you are grounded when handling LCM. 4.2 ENVIRONMENTAL ABSOLUTE MAXIMUM RATINGS OPERATING STORAGE ITEM MIN. MAX. MIN. MAX. COMMENT Ambient Temperature oc 45C | -25C 60'C Note 2,3 Note 6_| Note7 | Humidity Note 1 Note 1 Without condensation 9.8m/s2 11.76mi/s2 Vibration - (1.0G) - (1.2G) |Note 4 Note 5 Shock 490m/s2 490m/s* |3 Times for each (50G) - (50G) direction of Xt YizZ Note 5 Note 5 |pulse width 10mS Corrosive Gas Not Acceptable Not Acceptable Note 1 Ta=40C:85%RH max. Ta>40C:Absolute humidity must be lower than the humidity of 85%RH at 40C. Note 2 Ta at -25C----<48h, at 60C------<168h Note 3 Background color changes slightly depending on ambient temperature. This phenomenon is reversible. Note 4 5Hz~500Hz (Except resonance frequency) for each direction of X* Y~ Z. Any failure caused by connector loosened while testing shall be ignored. Note 5 This module should be operated normally after finish the test. Any failure caused by connector loosened while testing shall be ignored. Note 6 Higher starting voltage of CFL and higher LCD driving voltage are needed while operating at OC. The life time of CFL will be reduced while operating at Oc. Need to make sure of value of IL and characteristics of inverter. Also the response time at 0C will be slower. Note 7 There are possibility that color un-uniformity happened while operating at 45C KAOHSIUNG HITACHI Sh. E| Sep.19,02 B 04- _ ; ELECTRONICS CO.,LTD. DATE) Sep No. 7BG64PS 2704-SP24V001-2. _ |[PAGE/4-1/15. ELECTRICAL CHARACTERISTICS OF LCM 5.1 ELECTRICAL CHARACTERISTICS ITEM SYMBOL| CONDITION MIN. i TYP. | MAX. | UNIT Power Supply Voltage 3.3 for Logic VDD-VSS - 3.0 50 5.25 V Input Voltage Vi H LEVEL 0.8VDD|__- VDD V Note 1 L LEVEL 0 - _|0.2VDD! V Power Supply Circuit VDD-VSS=3.3V |] ~ 22.0 | 32.0 for Logic Current IDD mA Note 2 VDD-VSS=5.0V 20.0 | 30.0 Power Supply Circuit IEE VDD-VSS=3.30V|__- 20.0 | 27.0 mA for LC Driving Note 2 VDD-VSS=5.0V 18.0 | 25.0 Recommended Ta= OC , 0 - 23.9 | 26.5 Vv LC Driving Voltage VDD-VEE| Ta= 25 C_, g=0 - 22.7 - Vv Note 3 Ta=45C . g=0 | 18.5 | 21.6 - V Frame Frequency Note4 fFRAME - 120 130 140 Hz Note 1 DOFF,FRAME,LOAD,CP,UD0~UD3, LDO~LD3. Note 2 fFRAME=140Hz,UD0~UD3=0,1,0,1,....LD0~LD3=1.0,7.0.... VDD-VEE=22.7V,Ta=25 C Note 3 Recommended LC driving voltage fluctuates about = 1.0V by each module. Test pattern is allQ. Note 4 Need to make sure of flickering and rippling of display when setting the frame frequency in your set. KAOHSIUNG HITACHI - ELECTRONICS CO.,LTD. DATE Sep.19,02 Sh. No. 7B64PS8 2705-SP24V001-2 PAGE 5-1/25.2 OPTICAL CHARACTERISTICS BACKLIGHT (LCM, Backlight ON, Ta=25C) ITEM MIN. TYP. | MAX. UNIT NOTE Brightness - (110) - cd/m? Rise Time - 5 - Minute Brightness 80% Brightness Uniformity - - = 30 % Under mentioned X=60 X=240 X=420 Note 2 Brightness control : 100% CEL : Initial, Ta=25C, VDD-VEE=22.7V Display data should be ail ON Note 1 Measurement after 10 minutes of CFL operating. Y=60 Y=320 Y=580 Note 3 Measurement of the following 9 places on the display. Definition of the brightness tolerance. P1| P4| P7 p2| P5| P8| P3| P6| Pg yy ye mth SY Ty sry Max. Brightness or Min. Brightness - Average Brightness x 100 ( Average Brightness ) KAOHSIUNG HITACHI Sh. DATE| Sep.19,'02 2705- V001- _ ELECTRONICS CO.,LTD. p No. 7BE4PS | 705-SP24V001-2 PAGE] 5-2/26. OPTICAL CHARACTERISTICS 6.1 OPTICAL CHARACTERISTICS Note 1 Definition of 6 and K Z (Normal) _ n yo=180" ) a Yo WIN. YN TN * ie y@=0" ) A co tr tf Rise Time Fall Time KAOHSIUNG HITACHI Sh. DATE| Sep.19,'02 7B64PS 2706-SP24V001-2 jPAGH6-1/2 ELECTRONICS CO.,LTD. P No.6.2 ELECTRICAL CHARACTERISTICS OF BACKLIGHT ITEM SYMBOL| MIN. TYP. | MAX. | UNIT NOTE Lamp Voltage VL - 430 - V Ta=25C Frequency fL 40 70 85 KHz Ta=25C Lamp Current IL 2.5 5 5.5 Ma Ta=25C Starting VS - 15 =2 Discharge Voltage Note 2 1200 00 V Tae25C Note 1 Please certainly inform HITACHI before designing lamp drive circuit according to the above specifications. Note 2 Staring discharge voltage is increased when LCM is operating at lower temperature. please check the characteristics of inverter before applying to your set. Note 3 Average life time of CFL will be decreased when LCM is operating at lower temperature. KAOHSIUNG HITACHI ELECTRONICS CO.,LTD. DATE Sep.19,02 Sh. No. 7B64PS 2706-SP24V001-2 PAGE| 6-2/27. BLOCK DIAGRAM ywnosig Buu, 149 : TAOA AaaS 1d9A e JaMod r, LZ | o | f | >| = ~ > bx ZLOl @ ; avol 80 CUI ee) 06x 0 i _ < i} t i SNVYS | o 1 ean~oan PAGE 7-1/1 7B64PS 2707-SP24V001-2 Sh. Sep.19,'02 DATE] Sep No. KAOHSIUNG HITACHI ELECTRONICS CO.,LTD.8. INTERFACE TIMING CHART 8.1 TIMING CHART _ 29.5us=T 334.48 | LOAD e -JUULU UU PU LU LE LL] Dummy Data x1 x2 UD3 ys KOKO Y637 UD2 Kye ye KOKORO Y638 ut Ke OOOO OOO UDO Kya ve KKK KOO Y640 Dummy Data ie X241 X242 LD3 yeas 1277 LD2 Kyeapreag XK KOKO 1276 LD4 Kereadyeap OX OK OKOKER Y1279 LDO yeaa XO _> 1.4.5 min y1280 FRAME (REDUCTION) ee to = Lg LLL ILL 242xT FRAME % 5 | upo~UD3 KE KX Xe amos KOO OFX LDo~LD3. __ an Kad eae amv OGY FXO Note 1 Dummy data: H level. Note 2 Do not in put over 242 pulses to load. KAOHSIUNG HITACHI Sh. ELECTRONICS CO.,LTD. No. DATE Sep.19,'02 7B64PS 2708-SP24V001-2 PAGE 8-1/38.2 TIMING CHARACTERISTICS OC STa=50C VDD=3.3V_+ 0.3V.5V + 0.25V ITEM SYMBOL MIN. TYP. | MAX. UNIT. Clock Frequency fCP - - 6.5 MHz Clock Pulse Width tW 63 - - ns Clock Pise_, Fall Time tr,tf - - 20 ns Data Set Up Time tDSU 50 - - ns Data Hold Time tDHD 50 - - ns Load Set Up Time tLSU 80 - - ns Load_yClock Time tc WBD=3.3V1 _120 _1_- = ns VDD=5V 80 - - Frame Set Up Time tsetup 100 - - ns Frame Hold Time thold 100 - ~ ns Load Pulse Width two 125 - - ns iW iw tw tf 0.8VDD 0.8VDD ** 40.8VDD 0.8VDD cp N 0.2VDD 41 xDD \ ~ tr tDSU {DH UD0~UD3 x 0.8VDD 0.8VDD x Y LDO~LD3 \ 0.2VDD 0.2VDD , tLSU tLC ~~ NIA nN onns 0.8VDD 0.8VDD LOAD 0.2VDD aC NL 0.2vDD tf = tr tsetup thold .| 0.8VDD 0.8VDD FRAME KAOHSIUNG HITACHI Sh. Sep.19,'02 . - ELECTRONICS C0. 1D PATE ep No. 7B64PS 2708-SP24V001-2 PAGE| 8-2/38.3 TIMING OF POWER SUPPLY AND INTERFACE SIGNAL [ng VDD 4.797 . SV 4.75V VDD GND 0~50ms 0~50ms GND Torecnrcnnee SIGNAL SIGNAL AW VALID DATA TH, VAAAMAAMAAAA i GND ede GND VEE f o min VEE / \-20ms min. ey a GND GND NOTEP |20ms min. : 0 min. DOFF / \ DOFF GND GND POWER _ON POWER OFF Note 1 The missing pixels may occur when the LCM is driven beyond above power interface timing sequence. Noie 2 In case of not using DOFF controlling, VEE should be at VDD level or open in this time period. Note 3 Operation of VDD-VSS changing (3.3<->5.0V) should be done after power off. 8.4 POWER SUPPLY FOR LCM (EXAMPLE) VDD == +5V,+3.3V LCM vss te VEE = -22.0V,-23.7V C1,C2 : 3.3uF(Aluminium electrolytic capacitor) VR : 10~20kQ Tr : 2SA673APKC (HFE=100,IC=500mA)or equivalent Tr. N Sh, KAOHSIUNG HITACHI DATE] Sep.19,'02 7 . . . ELECTRONICS CO.,LTD. No. B64PS 2708-SP24V001-2 PAGE 8-3/39.DIMENSIONAL OUTLINE 257.5 +0.7 9.1 DIMENIONAL OUTLINE 233.8 405 (28.0) (200.0) . 30.0 max. 196 min. | & 5 32.0 +0.5 0.3639+0.27=191.97 +0.1 Hse] Ziel 6.5. +0.5 gig/=]} Hl q| (5.5) 3.5 +03 w|2l 2.0 +0.5 L~ 41.18 03 = cao = S =. 2 TL ST = S HV. 2.4 0.2 | o), | GND CN2] | (50.0) g l = | Viewing Direction | qi 0.27 I ts cnt 0.30 ! $ also] /3) 218 EI | HelHe|al| | +31 si 2/ slg} _ =| [pr oO I | | | * | Fi | 2 Dots Area Effective Area Window of Bezel o Zo me aK = == == ae = my == == oa =o 2-R1.05 +0.2~ 3.0 +05 293.5 03 - S 45 +03 2 w& zo LF tf =I = [| | -e= Cohn o HP UNIT = NTS =N a Note 1 Measurement When Adding 9.8x10' Pa (1.0kgficn ) at The Measuring Point. SCALE : mm Sh. A ECTRONIOS Corin, | DATE | Sep.19,02 | Ns, |7864PS 2709-sP24vo01-2 | PAGE| 9-1/39.2 DISPLAY PATTERN 191.97 (640 dots) 143.97 (480 dots) 8) 8 ol 2 oO = || 0.27 " 0.30 Scale: NTS Unit :mm Measurement Tolerance: =0.1 Note 1 Center-gap 60um max. KAOHSIUNG HITACHI ELECTRONICS CO.,LTD. DATE Sh. Sep.19,02 No. 7B64PS 2709-SP24V001-2 PAGE 9-2/39.3 INTERNAL PIN CONNECTION INTERFACE | PIN NO.| SIGNAL | LEVEL FUNCTION 1 FRAME H First Line Marker 2 LOAD H_,L | Data Latch 3 CP H_,L | Data_ Shift 4 DOFF | H/L__|H:ON/L: OFF 5 VDD - Power Supply for Logic 6 VSS - Gnd 7 VEE - Power Supply for LC LCM | WVF1 8 UDO 9 UD1 HL Display Data 10 UD2 (Upper Half) 11 UD3 12 LDO 13 LD Display Data 14 LD2 H/L |(Lower Half) 15 LD3 I/F1 : MOLEX / 53261-1510 (SUITABLE CONNECTOR : MOLEX / 51021-1500) INTERFACE | PIN NO.| SIGNAL | LEVEL FUNCTION 1 GND - CFL Gnd CFL 2 N.C - - CFL W/F 3 N.C - - 4 H.V - Power Supply for CFL CFL I/F1 : Mitsumi M63M83-04 Suitable connector : MITSUMI] _M61M73-04 MITSUMI M60-04-30-114P(Straight) MITSUMI M60-04-30-134P(Angle) KAOHSIUNG HITACHI ELECTRONICS CO.,LTD. DATE Sep.19,'02 Sh. No. 7B64PS8 2709-SP24V001-2 PAGE 9-3/310. APPEARANCE STANDARD 10.1 APPEARANCE INSPECTION CONDITION Visual inspection should be done under the following condition. (1) In the dark room. (2) With CFL panel lighted with prescribed inverter circuit. (3) With eyes 25cm distance from LCM. (4) Viewing angle within 45 degrees from the vertical line to the center of LCD. 10.2 DEFINITION OF EACH ZONE EYE A zone : Within the effective area specified at page 9-1/3 of this document. B zone: Area between the window of bezel line and the effective area line specified at page 9-1/3 of this document. Effective Area Window of Bezel | Sh. KAOHSIUNG HITACH DATE] Sep.19,'02 ELECTRONICS CO.,LTD. No. 7B64PS 2710-SP24V001-2 PAGE 10-1/540.3 APPEARENCE SPECIFICATION (1) LCD APPEARANCE *) If the problem occures about this item, the responsible person of both party (customer and HITACHI) will discuss more detail. No. ITEM CRITERIA A|B Scratches Distinguished one is not acceptable * |. (To be judged by HITACHI standard} Dent Same as above *]/- Wrinkles in Polarizer Same _as above *|- Bubbles Average diameter Dimm) Maximum number Acceptable DS0.2 ____ Ignored 0.2