© 2000 California Micro Devices Corp. All rights reserved.

8/10/2000 1

PACRG

P/Active

• Designed especially for Pentium Pro and RISC-

Product Description

CAMD’s P/Active RG GTL+ Local Bus Terminator is ideal

for Pentium Pro and related high speed bus termination

applications where a resistor approach is deemed suitable.

This device also meets the high-speed bus termination

demands of microprocessors like Motorola’s PowerPC,

DEC’s Alpha, Sun’s SPARC, and SGI’s MIPs processor, as

well as other high performance RISC processors for

embedded control applications.

The PACRG offers 22 terminations per package and meets

processor busses

©2000 California Micro Devices Corp. All rights reserved.

Signal at Termination and Victim Line (TA=25OC) (See Test Circuit)

Channel 1 (500mV/division) Termination Signal, Channel 2 (250mV/division) Victim Voltage. The victim voltage

crosstalk measures 65mV in the critical areas around the system clock. The system clock occurs approximately 4ns

before each data transition. The horizontal dashed lines are 65mV apart. The time scale is 5.0ns/division. The signal

voltage rise and fall times have been adjusted at the driver to conform to Intel specifications.) Measurements made

using Tektronix TDS820 6 GHz Digitizing Oscilloscope with P6207 FET Probes.

Test Circuit Block Diagram

© 2000 California Micro Devices Corp. All rights reserved.

8/10/2000 3

PACRG